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/OK3568_Linux_fs/kernel/arch/powerpc/kernel/
H A Dcacheinfo.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Processor cache information made available to userspace via sysfs;
27 /* per-cpu object for tracking:
28 * - a "cache" kobject for the top-level directory
29 * - a list of "index" objects representing the cpu's local cache hierarchy
32 struct kobject *kobj; /* bare (not embedded) kobject for cache
37 /* "index" object: each cpu's cache directory has an index
38 * subdirectory corresponding to a cache object associated with the
44 struct cache *cache; member
48 * cache type */
[all …]
/OK3568_Linux_fs/kernel/drivers/md/
H A Ddm-cache-target.c8 #include "dm-bio-prison-v2.h"
9 #include "dm-bio-record.h"
10 #include "dm-cache-metadata.h"
12 #include <linux/dm-io.h>
13 #include <linux/dm-kcopyd.h>
22 #define DM_MSG_PREFIX "cache"
25 "A percentage of time allocated for copying to and/or from cache");
27 /*----------------------------------------------------------------*/
33 * cblock: index of a cache block
34 * promotion: movement of a block from origin to cache
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/OK3568_Linux_fs/kernel/drivers/gpu/arm/mali400/mali/common/
H A Dmali_l2_cache.c2 * Copyright (C) 2010-2017 ARM Limited. All rights reserved.
8 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
19 * Size of the Mali L2 cache registers in bytes
24 * Mali L2 cache register numbers
43 * Mali L2 cache commands
44 * These are the commands that can be sent to the Mali L2 cache unit
51 * Mali L2 cache commands
52 * These are the commands that can be sent to the Mali L2 cache unit
61 * Mali L2 cache status bits
68 #define MALI400_L2_MAX_READS_NOT_SET -1
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/OK3568_Linux_fs/kernel/fs/cachefiles/
H A Dbind.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Bind and unbind a cache from the filesystem backing it
25 * bind a directory as a cache
27 int cachefiles_daemon_bind(struct cachefiles_cache *cache, char *args) in cachefiles_daemon_bind() argument
30 cache->frun_percent, in cachefiles_daemon_bind()
31 cache->fcull_percent, in cachefiles_daemon_bind()
32 cache->fstop_percent, in cachefiles_daemon_bind()
33 cache->brun_percent, in cachefiles_daemon_bind()
34 cache->bcull_percent, in cachefiles_daemon_bind()
35 cache->bstop_percent, in cachefiles_daemon_bind()
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H A Ddaemon.c1 // SPDX-License-Identifier: GPL-2.0-or-later
59 int (*handler)(struct cachefiles_cache *cache, char *args);
85 struct cachefiles_cache *cache; in cachefiles_daemon_open() local
91 return -EPERM; in cachefiles_daemon_open()
95 return -EBUSY; in cachefiles_daemon_open()
97 /* allocate a cache record */ in cachefiles_daemon_open()
98 cache = kzalloc(sizeof(struct cachefiles_cache), GFP_KERNEL); in cachefiles_daemon_open()
99 if (!cache) { in cachefiles_daemon_open()
101 return -ENOMEM; in cachefiles_daemon_open()
104 mutex_init(&cache->daemon_mutex); in cachefiles_daemon_open()
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/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/amazon/
H A Dalpine-v3.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "amazon,al-alpine-v3";
14 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-a72";
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/OK3568_Linux_fs/kernel/fs/fscache/
H A Dcache.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* FS-Cache cache handling
8 #define FSCACHE_DEBUG_LEVEL CACHE
21 * look up a cache tag
31 if (strcmp(tag->name, name) == 0) { in __fscache_lookup_cache_tag()
32 atomic_inc(&tag->usage); in __fscache_lookup_cache_tag()
40 /* the tag does not exist - create a candidate */ in __fscache_lookup_cache_tag()
44 return ERR_PTR(-ENOMEM); in __fscache_lookup_cache_tag()
46 atomic_set(&xtag->usage, 1); in __fscache_lookup_cache_tag()
47 strcpy(xtag->name, name); in __fscache_lookup_cache_tag()
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/powerpc/fsl/
H A Dl2cache.txt1 Freescale L2 Cache Controller
3 L2 cache is present in Freescale's QorIQ and QorIQ Qonverge platforms.
4 The cache bindings explained below are Devicetree Specification compliant
8 - compatible : Should include one of the following:
9 "fsl,8540-l2-cache-controller"
10 "fsl,8541-l2-cache-controller"
11 "fsl,8544-l2-cache-controller"
12 "fsl,8548-l2-cache-controller"
13 "fsl,8555-l2-cache-controller"
14 "fsl,8568-l2-cache-controller"
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/OK3568_Linux_fs/kernel/fs/
H A Dmbcache.c1 // SPDX-License-Identifier: GPL-2.0-only
12 * Mbcache is a simple key-value store. Keys need not be unique, however
13 * key-value pairs are expected to be unique (we use this fact in
16 * Ext2 and ext4 use this cache for deduplication of extended attribute blocks.
21 * identifies a cache entry.
24 * and a special "delete entry with given key-value pair" operation. Fixed
33 /* Maximum entries in cache to avoid degrading hash too much */
38 /* Number of entries in cache */
41 /* Work for shrinking when the cache has too many entries */
47 static unsigned long mb_cache_shrink(struct mb_cache *cache,
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/OK3568_Linux_fs/kernel/fs/squashfs/
H A Dcache.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Squashfs - a compressed read only filesystem for Linux
8 * cache.c
15 * This file implements a generic cache implementation used for both caches,
16 * plus functions layered ontop of the generic cache implementation to
19 * To avoid out of memory and fragmentation issues with vmalloc the cache
22 * It should be noted that the cache is not used for file datablocks, these
23 * are decompressed and cached in the page-cache in the normal way. The
24 * cache is only used to temporarily cache fragment and metadata blocks
29 * have been packed with it, these because of locality-of-reference may be read
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/OK3568_Linux_fs/kernel/mm/
H A Dswap_slots.c1 // SPDX-License-Identifier: GPL-2.0
3 * Manage cache of swap slots to be used for and returned from
25 * The swap slots cache is protected by a mutex instead of
43 /* Serialize swap slots cache enable/disable operations */
116 /* if global pool of slot caches too low, deactivate cache */ in check_cache_active()
126 struct swap_slots_cache *cache; in alloc_swap_slot_cache() local
145 return -ENOMEM; in alloc_swap_slot_cache()
151 return -ENOMEM; in alloc_swap_slot_cache()
155 cache = &per_cpu(swp_slots, cpu); in alloc_swap_slot_cache()
156 if (cache->slots || cache->slots_ret) { in alloc_swap_slot_cache()
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/OK3568_Linux_fs/kernel/fs/nfs/
H A Dnfs42xattr.c1 // SPDX-License-Identifier: GPL-2.0
6 * User extended attribute client side cache functions.
21 * a cache structure attached to NFS inodes. This structure is allocated
22 * when needed, and freed when the cache is zapped.
24 * The cache structure contains as hash table of entries, and a pointer
25 * to a special-cased entry for the listxattr cache.
28 * counting. The cache entries use a similar refcounting scheme.
30 * This makes freeing a cache, both from the shrinker and from the
31 * zap cache path, easy. It also means that, in current use cases,
40 * Two shrinkers deal with the cache entries themselves: one for
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/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/s390/cf_z13/
H A Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated…
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi…
17 "Unit": "CPU-M-CF",
21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB1 One-Megabyte Page Writes",
28 …": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a on…
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/socionext/
H A Dsocionext,uniphier-system-cache.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/socionext/socionext,uniphier-system-cache.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UniPhier outer cache controller
10 UniPhier ARM 32-bit SoCs are integrated with a full-custom outer cache
11 controller system. All of them have a level 2 cache controller, and some
12 have a level 3 cache controller as well.
15 - Masahiro Yamada <yamada.masahiro@socionext.com>
19 const: socionext,uniphier-system-cache
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/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/s390/cf_z14/
H A Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated…
10 "Unit": "CPU-M-CF",
14 … written into The Translation Lookaside Buffer 2 (TLB2) and the request was made by the data cache"
17 "Unit": "CPU-M-CF",
21 …ss for a request made by the data cache. Incremented by one for every TLB2 miss in progress for th…
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
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/OK3568_Linux_fs/kernel/drivers/acpi/acpica/
H A Dutcache.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
4 * Module Name: utcache - local cache allocation routines
6 * Copyright (C) 2000 - 2020, Intel Corp.
21 * PARAMETERS: cache_name - Ascii name for the cache
22 * object_size - Size of each cached object
23 * max_depth - Maximum depth of the cache (in objects)
24 * return_cache - Where the new cache object is returned
28 * DESCRIPTION: Create a cache object
36 struct acpi_memory_list *cache; in acpi_os_create_cache() local
44 /* Create the cache object */ in acpi_os_create_cache()
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/OK3568_Linux_fs/kernel/fs/btrfs/tests/
H A Dfree-space-tree-tests.c1 // SPDX-License-Identifier: GPL-2.0
7 #include "btrfs-tests.h"
9 #include "../disk-io.h"
10 #include "../free-space-tree.h"
12 #include "../block-group.h"
21 struct btrfs_block_group *cache, in __check_free_space_extents() argument
34 info = search_free_space_info(trans, cache, path, 0); in __check_free_space_extents()
40 flags = btrfs_free_space_flags(path->nodes[0], info); in __check_free_space_extents()
41 extent_count = btrfs_free_space_extent_count(path->nodes[0], info); in __check_free_space_extents()
45 ret = -EINVAL; in __check_free_space_extents()
[all …]
H A Dfree-space-tests.c1 // SPDX-License-Identifier: GPL-2.0
7 #include "btrfs-tests.h"
9 #include "../disk-io.h"
10 #include "../free-space-cache.h"
11 #include "../block-group.h"
20 static int test_extents(struct btrfs_block_group *cache) in test_extents() argument
27 ret = btrfs_add_free_space(cache, 0, SZ_4M); in test_extents()
33 ret = btrfs_remove_free_space(cache, 0, SZ_4M); in test_extents()
39 if (test_check_exists(cache, 0, SZ_4M)) { in test_extents()
41 return -1; in test_extents()
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/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/ti/
H A Dk3-am654.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
8 #include "k3-am65.dtsi"
12 #address-cells = <1>;
13 #size-cells = <0>;
14 cpu-map {
37 compatible = "arm,cortex-a53";
40 enable-method = "psci";
41 i-cache-size = <0x8000>;
42 i-cache-line-size = <64>;
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/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/s390/cf_z15/
H A Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated…
10 "Unit": "CPU-M-CF",
14 … written into The Translation Lookaside Buffer 2 (TLB2) and the request was made by the data cache"
17 "Unit": "CPU-M-CF",
21 …ss for a request made by the data cache. Incremented by one for every TLB2 miss in progress for th…
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page"
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/OK3568_Linux_fs/kernel/Documentation/filesystems/caching/
H A Dbackend-api.rst1 .. SPDX-License-Identifier: GPL-2.0
4 FS-Cache Cache backend API
7 The FS-Cache system provides an API by which actual caches can be supplied to
8 FS-Cache for it to then serve out to network filesystems and other interested
11 This API is declared in <linux/fscache-cache.h>.
14 Initialising and Registering a Cache
17 To start off, a cache definition must be initialised and registered for each
18 cache the backend wants to make available. For instance, CacheFS does this in
21 The cache definition (struct fscache_cache) should be initialised by calling::
23 void fscache_init_cache(struct fscache_cache *cache,
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/OK3568_Linux_fs/u-boot/arch/x86/lib/
H A Dmrccache.c7 * SPDX-License-Identifier: GPL-2.0
22 struct mrc_data_container *cache) in next_mrc_block() argument
25 u32 mrc_size = sizeof(*cache) + cache->data_size; in next_mrc_block()
26 u8 *region_ptr = (u8 *)cache; in next_mrc_block()
28 if (mrc_size & (MRC_DATA_ALIGN - 1UL)) { in next_mrc_block()
29 mrc_size &= ~(MRC_DATA_ALIGN - 1UL); in next_mrc_block()
38 static int is_mrc_cache(struct mrc_data_container *cache) in is_mrc_cache() argument
40 return cache && (cache->signature == MRC_DATA_SIGNATURE); in is_mrc_cache()
45 struct mrc_data_container *cache, *next; in mrccache_find_current() local
49 base_addr = entry->base + entry->offset; in mrccache_find_current()
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/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/s390/cf_zec12/
H A Dextended.json3 "Unit": "CPU-M-CF",
7 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle…
17 "Unit": "CPU-M-CF",
21 …rectory write to the Level-1 Data cache directory where the returned cache line was sourced from t…
24 "Unit": "CPU-M-CF",
28 …tory write to the Level-1 Instruction cache directory where the returned cache line was sourced fr…
31 "Unit": "CPU-M-CF",
35 …A directory write to the Level-1 Data cache directory where the returned cache line was sourced fr…
[all …]
/OK3568_Linux_fs/kernel/drivers/dma-buf/
H A Ddma-buf-cache.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/dma-buf.h>
9 #include <linux/dma-buf-cache.h>
11 /* NOTE: dma-buf-cache APIs are not irq safe, please DO NOT run in irq context !! */
27 struct dma_buf_cache *cache, *tmp; in dma_buf_cache_destructor() local
29 mutex_lock(&dmabuf->cache_lock); in dma_buf_cache_destructor()
31 data = dmabuf->dtor_data; in dma_buf_cache_destructor()
33 list_for_each_entry_safe(cache, tmp, &data->head, list) { in dma_buf_cache_destructor()
34 if (!IS_ERR_OR_NULL(cache->sg_table)) in dma_buf_cache_destructor()
35 dma_buf_unmap_attachment(cache->attach, in dma_buf_cache_destructor()
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/marvell/
H A Darmada-ap806-quad.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "armada-ap806.dtsi"
12 compatible = "marvell,armada-ap806-quad", "marvell,armada-ap806";
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "arm,cortex-a72";
22 enable-method = "psci";
23 #cooling-cells = <2>;
25 i-cache-size = <0xc000>;
26 i-cache-line-size = <64>;
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