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/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
H A Drv1_clk_mgr_clk.c52 void rv1_dump_clk_registers(struct clk_state_registers *regs, struct clk_bypass *bypass, struct clk… in rv1_dump_clk_registers() argument
58 bypass->dcfclk_bypass = REG_READ(CLK0_CLK8_BYPASS_CNTL) & 0x0007; in rv1_dump_clk_registers()
59 if (bypass->dcfclk_bypass < 0 || bypass->dcfclk_bypass > 4) in rv1_dump_clk_registers()
60 bypass->dcfclk_bypass = 0; in rv1_dump_clk_registers()
69 bypass->dispclk_pypass = REG_READ(CLK0_CLK10_BYPASS_CNTL) & 0x0007; in rv1_dump_clk_registers()
70 if (bypass->dispclk_pypass < 0 || bypass->dispclk_pypass > 4) in rv1_dump_clk_registers()
71 bypass->dispclk_pypass = 0; in rv1_dump_clk_registers()
75 bypass->dprefclk_bypass = REG_READ(CLK0_CLK11_BYPASS_CNTL) & 0x0007; in rv1_dump_clk_registers()
76 if (bypass->dprefclk_bypass < 0 || bypass->dprefclk_bypass > 4) in rv1_dump_clk_registers()
77 bypass->dprefclk_bypass = 0; in rv1_dump_clk_registers()
/OK3568_Linux_fs/kernel/sound/soc/codecs/
H A Dwm8990.c104 SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER3,
106 SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3,
108 SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3,
110 SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER5,
112 SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8990_OUTPUT_MIXER5,
114 SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8990_OUTPUT_MIXER5,
118 SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER4,
120 SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4,
122 SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4,
124 SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER6,
[all …]
H A Dwm8400.c140 SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8400_OUTPUT_MIXER3,
142 SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8400_OUTPUT_MIXER3,
144 SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8400_OUTPUT_MIXER3,
146 SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8400_OUTPUT_MIXER5,
148 SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8400_OUTPUT_MIXER5,
150 SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8400_OUTPUT_MIXER5,
154 SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8400_OUTPUT_MIXER4,
156 SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8400_OUTPUT_MIXER4,
158 SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8400_OUTPUT_MIXER4,
160 SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8400_OUTPUT_MIXER6,
[all …]
H A Dwm8991.c176 SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER3,
178 SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3,
180 SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3,
182 SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER5,
184 SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8991_OUTPUT_MIXER5,
186 SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8991_OUTPUT_MIXER5,
190 SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER4,
192 SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4,
194 SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4,
196 SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER6,
[all …]
H A Dtlv320aic3x.c337 SOC_SINGLE_TLV("Left Line Mixer PGAR Bypass Volume",
342 SOC_SINGLE_TLV("Right Line Mixer PGAL Bypass Volume",
347 SOC_SINGLE_TLV("Left HP Mixer PGAR Bypass Volume",
352 SOC_SINGLE_TLV("Right HP Mixer PGAL Bypass Volume",
357 SOC_SINGLE_TLV("Left HPCOM Mixer PGAR Bypass Volume",
362 SOC_SINGLE_TLV("Right HPCOM Mixer PGAL Bypass Volume",
368 SOC_DOUBLE_R_TLV("Line PGA Bypass Volume",
375 SOC_DOUBLE_R_TLV("HP PGA Bypass Volume",
382 SOC_DOUBLE_R_TLV("HPCOM PGA Bypass Volume",
437 SOC_SINGLE_TLV("Left Line Mixer Line2R Bypass Volume",
[all …]
H A Dwm9712.c166 SOC_SINGLE("PCBeep Bypass Headphone Volume", AC97_PC_BEEP, 12, 7, 1),
167 SOC_SINGLE("PCBeep Bypass Speaker Volume", AC97_PC_BEEP, 8, 7, 1),
168 SOC_SINGLE("PCBeep Bypass Phone Volume", AC97_PC_BEEP, 4, 7, 1),
288 WM9712_HP_MIXER_CTRL("PCBeep Bypass Switch", HPL_MIXER, 5),
290 WM9712_HP_MIXER_CTRL("Phone Bypass Switch", HPL_MIXER, 3),
291 WM9712_HP_MIXER_CTRL("Line Bypass Switch", HPL_MIXER, 2),
298 WM9712_HP_MIXER_CTRL("PCBeep Bypass Switch", HPR_MIXER, 5),
300 WM9712_HP_MIXER_CTRL("Phone Bypass Switch", HPR_MIXER, 3),
301 WM9712_HP_MIXER_CTRL("Line Bypass Switch", HPR_MIXER, 2),
308 SOC_DAPM_SINGLE("PCBeep Bypass Switch", AC97_PC_BEEP, 11, 1, 1),
[all …]
H A Dadau1373.c603 SOC_DAPM_SINGLE("Input 4 Bypass Switch", _reg, 3, 1, 0), \
604 SOC_DAPM_SINGLE("Input 3 Bypass Switch", _reg, 2, 1, 0), \
605 SOC_DAPM_SINGLE("Input 2 Bypass Switch", _reg, 1, 1, 0), \
606 SOC_DAPM_SINGLE("Input 1 Bypass Switch", _reg, 0, 1, 0), \
627 SOC_DAPM_SINGLE("Input 4 Bypass Switch", ADAU1373_LHP_MIX, 3, 1, 0),
628 SOC_DAPM_SINGLE("Input 3 Bypass Switch", ADAU1373_LHP_MIX, 2, 1, 0),
629 SOC_DAPM_SINGLE("Input 2 Bypass Switch", ADAU1373_LHP_MIX, 1, 1, 0),
630 SOC_DAPM_SINGLE("Input 1 Bypass Switch", ADAU1373_LHP_MIX, 0, 1, 0),
636 SOC_DAPM_SINGLE("Input 4 Bypass Switch", ADAU1373_RHP_MIX, 3, 1, 0),
637 SOC_DAPM_SINGLE("Input 3 Bypass Switch", ADAU1373_RHP_MIX, 2, 1, 0),
[all …]
/OK3568_Linux_fs/kernel/include/linux/
H A Dirqbypass.h3 * IRQ offload/bypass manager
18 * The IRQ bypass manager is a simple set of lists and callbacks that allows
20 * consumers (ex. virtualization hardware that allows IRQ bypass or offload)
32 * struct irq_bypass_producer - IRQ bypass producer definition
33 * @node: IRQ bypass manager private list management
41 * The IRQ bypass producer structure represents an interrupt source for
42 * participation in possible host bypass, for instance an interrupt vector
58 * struct irq_bypass_consumer - IRQ bypass consumer definition
59 * @node: IRQ bypass manager private list management
66 * The IRQ bypass consumer structure represents an interrupt sink for
[all …]
/OK3568_Linux_fs/external/camera_engine_rkaiq/rkaiq/algos/agamma/
H A Drk_aiq_algo_agamma_itf.cpp105 bool bypass = true; in processing() local
109 bypass = false; in processing()
111 bypass = false; in processing()
113 bypass = !pAgammaHandle->ifReCalcStManual; in processing()
115 bypass = !pAgammaHandle->ifReCalcStAuto; in processing()
119 bypass = false; in processing()
121 bypass = false; in processing()
123 bypass = !pAgammaHandle->ifReCalcStManual; in processing()
125 bypass = !pAgammaHandle->ifReCalcStAuto; in processing()
128 if (!bypass) AgammaProcessing(pAgammaHandle, pProcRes); in processing()
[all …]
/OK3568_Linux_fs/external/camera_engine_rkaiq/rkaiq/algos/afec/
H A Drk_aiq_uapi_afec_int.cpp31 LOGD_AFEC("Fec setAttr en(%d), bypass(%d), correct_level(%d), direction(%d)\n", in rk_aiq_uapi_afec_SetAttrib()
32 attr.en, attr.bypass, attr.correct_level, attr.direction); in rk_aiq_uapi_afec_SetAttrib()
42 if (fec_contex->user_config.bypass && attr.bypass) { in rk_aiq_uapi_afec_SetAttrib()
43 LOGE_AFEC("failed, bypass fec!\n"); in rk_aiq_uapi_afec_SetAttrib()
55 attrPtr->bypass = fec_contex->user_config.bypass; in rk_aiq_uapi_afec_SetAttrib()
72 LOGD_AFEC("Fec getAttr en(%d), bypass(%d), correct_level(%d), direction(%d)\n", in rk_aiq_uapi_afec_GetAttrib()
73 attr->en, attr->bypass, attr->correct_level, attr->direction); in rk_aiq_uapi_afec_GetAttrib()
/OK3568_Linux_fs/external/camera_engine_rkaiq/rkaiq/algos_camgroup/misc/
H A Drk_aiq_algo_camgroup_agamma_itf.cpp103 bool bypass = true; in processing() local
107 bypass = false; in processing()
109 bypass = false; in processing()
111 bypass = !pAgammaGrpCtx->ifReCalcStManual; in processing()
113 bypass = !pAgammaGrpCtx->ifReCalcStAuto; in processing()
117 bypass = false; in processing()
119 bypass = false; in processing()
121 bypass = !pAgammaGrpCtx->ifReCalcStManual; in processing()
123 bypass = !pAgammaGrpCtx->ifReCalcStAuto; in processing()
126 if (!bypass) in processing()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dclk_mgr.h57 uint32_t CLK1_CLK0_BYPASS_CNTL; //dispclk bypass
58 uint32_t CLK1_CLK1_BYPASS_CNTL; //dppclk bypass
59 uint32_t CLK1_CLK2_BYPASS_CNTL; //dprefclk bypass
60 uint32_t CLK1_CLK3_BYPASS_CNTL; //dcfclk bypass
149 uint32_t CLK0_CLK8_BYPASS_CNTL; //dcfclk bypass
150 uint32_t CLK0_CLK10_BYPASS_CNTL; //dprefclk bypass
151 uint32_t CLK0_CLK11_BYPASS_CNTL; //dispclk bypass
162 uint32_t CLK1_CLK0_BYPASS_CNTL; //dispclk bypass
163 uint32_t CLK1_CLK1_BYPASS_CNTL; //dppclk bypass
164 uint32_t CLK1_CLK2_BYPASS_CNTL; //dprefclk bypass
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3588-vehicle-serdes-display-v21.dtsi680 0034 0005 //bypass des gpio3
682 0037 0006 //bypass des gpio4
760 0058 0002 //bypass ser gpio0
762 005b 0003 //bypass ser gpio1
764 005e 0004 //bypass ser gpio2
766 0061 0005 //bypass ser gpio3
768 0064 0006 //bypass ser gpio4
896 0034 0005 //bypass des gpio3
898 0037 0006 //bypass des gpio4
975 0058 0002 //bypass ser gpio0
[all …]
/OK3568_Linux_fs/kernel/drivers/clk/rockchip/regmap/
H A Dclk-regmap-pll.c69 unsigned int postdiv1, fbdiv, dsmpd, postdiv2, refdiv, frac, bypass; in clk_regmap_pll_recalc_rate() local
77 bypass = (con0 & PLL_BYPASS_MASK) >> PLL_BYPASS_SHIFT; in clk_regmap_pll_recalc_rate()
85 if (bypass) in clk_regmap_pll_recalc_rate()
108 u32 *frac, u8 *dsmpd, u8 *bypass) in clk_pll_round_rate() argument
129 if (bypass) in clk_pll_round_rate()
130 *bypass = true; in clk_pll_round_rate()
226 if (bypass) in clk_pll_round_rate()
227 *bypass = false; in clk_pll_round_rate()
253 u8 refdiv, postdiv1, postdiv2, dsmpd, bypass; in clk_regmap_pll_set_rate() local
259 &postdiv2, &frac, &dsmpd, &bypass); in clk_regmap_pll_set_rate()
[all …]
/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/x86/broadwellde/
H A Dfrontend.json8 …e uops being delivered to the Alloc stage since uops can be delivered by bypass skipping the Instr…
18 …n Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also…
29 …nstruction Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ.",
39 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.",
50 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.",
60 …(IDQ) while the Microcode Sequencer (MS) is busy. Counting includes uops that may bypass the IDQ.",
71 …(IDQ) while the Microcode Sequencer (MS) is busy. Counting includes uops that may bypass the IDQ.",
83 …(DSB) while the Microcode Sequencer (MS) is busy. Counting includes uops that may bypass the IDQ.",
94 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.",
105 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.",
[all …]
/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/x86/broadwell/
H A Dfrontend.json3 …e uops being delivered to the Alloc stage since uops can be delivered by bypass skipping the Instr…
13 …n Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also…
23 …nstruction Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ.",
34 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.",
44 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.",
55 …(IDQ) while the Microcode Sequencer (MS) is busy. Counting includes uops that may bypass the IDQ.",
65 …(IDQ) while the Microcode Sequencer (MS) is busy. Counting includes uops that may bypass the IDQ.",
76 …(DSB) while the Microcode Sequencer (MS) is busy. Counting includes uops that may bypass the IDQ.",
88 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.",
99 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.",
[all …]
/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/x86/broadwellx/
H A Dfrontend.json8 …e uops being delivered to the Alloc stage since uops can be delivered by bypass skipping the Instr…
18 …n Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ. This also…
29 …nstruction Decode Queue (IDQ) from the MITE path. Counting includes uops that may bypass the IDQ.",
39 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.",
50 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.",
60 …(IDQ) while the Microcode Sequencer (MS) is busy. Counting includes uops that may bypass the IDQ.",
71 …(IDQ) while the Microcode Sequencer (MS) is busy. Counting includes uops that may bypass the IDQ.",
83 …(DSB) while the Microcode Sequencer (MS) is busy. Counting includes uops that may bypass the IDQ.",
94 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.",
105 …e (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops that may bypass the IDQ.",
[all …]
/OK3568_Linux_fs/kernel/include/trace/events/
H A Dbcache.h124 TP_PROTO(struct bio *bio, bool hit, bool bypass),
125 TP_ARGS(bio, hit, bypass),
133 __field(bool, bypass )
142 __entry->bypass = bypass;
145 TP_printk("%d,%d %s %llu + %u hit %u bypass %u",
148 __entry->nr_sector, __entry->cache_hit, __entry->bypass)
153 bool writeback, bool bypass),
154 TP_ARGS(c, inode, bio, writeback, bypass),
163 __field(bool, bypass )
173 __entry->bypass = bypass;
[all …]
/OK3568_Linux_fs/u-boot/arch/m68k/cpu/mcf52x2/
H A Dspeed.c37 pllcr = 0x925a3100; /* ~140MHz clock (PLL bypass = 0) */ in get_clocks()
39 pllcr = 0x135a4140; /* ~72MHz clock (PLL bypass = 0) */ in get_clocks()
47 cpll = cpll & 0xfffffffe; /* Set PLL bypass mode = 0 (PSTCLK = crystal) */ in get_clocks()
48 mbar2_writeLong(MCFSIM_PLLCR, cpll); /* Set the PLL to bypass mode (PSTCLK = crystal) */ in get_clocks()
50 pllcr ^= 0x00000001; /* Set pll bypass to 1 */ in get_clocks()
51 mbar2_writeLong(MCFSIM_PLLCR, pllcr); /* Start locking (pll bypass = 1) */ in get_clocks()
/OK3568_Linux_fs/kernel/drivers/regulator/
H A Danatop-regulator.c30 bool bypass; member
65 sel = anatop_reg->bypass ? LDO_FET_FULL_ON : anatop_reg->sel; in anatop_regmap_enable()
85 if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) { in anatop_regmap_core_set_voltage_sel()
100 if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) in anatop_regmap_core_get_voltage_sel()
113 WARN_ON(!anatop_reg->bypass); in anatop_regmap_get_bypass()
115 WARN_ON(anatop_reg->bypass); in anatop_regmap_get_bypass()
117 *enable = anatop_reg->bypass; in anatop_regmap_get_bypass()
126 if (enable == anatop_reg->bypass) in anatop_regmap_set_bypass()
130 anatop_reg->bypass = enable; in anatop_regmap_set_bypass()
270 sreg->bypass = true; in anatop_regulator_probe()
[all …]
/OK3568_Linux_fs/debian/overlay-debug/rockchip-test/audio/acodec_test/
H A Dset_mixer_volume.sh11 amixer set "Left Mixer Left Bypass" $v
12 amixer set "Right Mixer Left Bypass" $v
13 amixer get "Left Mixer Left Bypass"
14 amixer get "Right Mixer Left Bypass"
/OK3568_Linux_fs/external/rockchip-test/audio/acodec_test/
H A Dset_mixer_volume.sh11 amixer set "Left Mixer Left Bypass" $v
12 amixer set "Right Mixer Left Bypass" $v
13 amixer get "Left Mixer Left Bypass"
14 amixer get "Right Mixer Left Bypass"
/OK3568_Linux_fs/kernel/include/trace/hooks/
H A Dtypec.h45 * Handler has to set bypass to override the value that would otherwise be returned by this
50 TP_PROTO(struct tcpci *tcpci, struct tcpci_data *data, int *vbus, int *bypass),
51 TP_ARGS(tcpci, data, vbus, bypass), 1);
68 TP_PROTO(const char *log, bool *bypass),
69 TP_ARGS(log, bypass));
H A Dusb.h17 TP_PROTO(struct usb_device *udev, pm_message_t msg, int *bypass),
18 TP_ARGS(udev, msg, bypass));
21 TP_PROTO(struct usb_device *udev, pm_message_t msg, int *bypass),
22 TP_ARGS(udev, msg, bypass));
/OK3568_Linux_fs/kernel/drivers/clk/at91/
H A Dsckc.c122 bool bypass, in at91_clk_register_slow_osc() argument
148 if (bypass) in at91_clk_register_slow_osc()
374 bool bypass; in at91sam9x5_sckc_register() local
394 bypass = of_property_read_bool(child, "atmel,osc-bypass"); in at91sam9x5_sckc_register()
398 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in at91sam9x5_sckc_register()
405 xtal_name, 1200000, bypass, bits); in at91sam9x5_sckc_register()
468 bool bypass; in of_sam9x60_sckc_setup() local
484 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in of_sam9x60_sckc_setup()
486 xtal_name, 5000000, bypass, in of_sam9x60_sckc_setup()

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