Home
last modified time | relevance | path

Searched full:mx6sl (Results 1 – 25 of 25) sorted by relevance

/OK3568_Linux_fs/buildroot/board/freescale/imx6slevk/
H A Dreadme.txt1 NXP i.MX6SL EVK board
/OK3568_Linux_fs/u-boot/configs/
H A Dwarp_defconfig5 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp/imximage.cfg,MX6SL"
H A Dmx6slevk_spl_defconfig12 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6SL,SYS_I2C"
H A Dmx6slevk_spinor_defconfig6 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL"
H A Dmx6slevk_defconfig6 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL"
/OK3568_Linux_fs/u-boot/cmd/fastboot/
H A DKconfig36 default 0x82000000 if MX6SX || MX6SL || MX6UL || MX6SLL
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/nvmem/
H A Dimx-ocotp.yaml14 i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ, i.MX6SLL,
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-mx6/
H A Dcrm_regs.h310 /* LCDIF_PIX_PODF on i.MX6SL */
381 /* UART_CLK_SEL exists on i.MX6SL/SX/QP */
535 /*LCD on i.MX6SL */
566 /* For i.MX6SL */
801 /* i.MX6SL */
H A Dmx6-ddr.h23 #include "mx6sl-ddr.h"
H A Dimx-regs.h263 /* i.MX6SL/SLL */
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/power/
H A Dfsl,imx-gpc.yaml61 The following additional DOMAIN_INDEX value is valid for i.MX6SL:
/OK3568_Linux_fs/u-boot/include/configs/
H A Dmx6sllevk.h4 * Configuration settings for the Freescale i.MX6SL EVK board.
H A Dmx6slevk.h4 * Configuration settings for the Freescale i.MX6SL EVK board.
/OK3568_Linux_fs/kernel/arch/arm/mach-imx/
H A Danatop.c32 /* Below MISC0_DISCON_HIGH_SNVS is only for i.MX6SL */
/OK3568_Linux_fs/kernel/drivers/soc/imx/
H A Dsoc-imx.c82 soc_id = "i.MX6SL"; in imx_soc_device_init()
/OK3568_Linux_fs/u-boot/arch/arm/mach-imx/mx6/
H A DKconfig35 config MX6SL config
H A Dsoc.c465 * i.MX6SL/SX/UL has same layout. in mmc_get_boot_dev()
603 * not output clock after reset, MX6DL and MX6SL have added 396M pfd in s_init()
H A Dddr.c900 * 2. i.Mx6SL LPDDR2 Script Aid spreadsheet V0.04 designed to generate MMDC
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dimx6sl-tolino-shine3.dts10 * In the Toline Shine 3 ebook reader it is a i.MX6SL
H A De60k02.dtsi12 * the Tolino Shine 3 (with i.MX6SL)
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/mach-imx/
H A Diomux-v3.h147 /* i.MX6SL/SLL */
/OK3568_Linux_fs/kernel/drivers/mmc/host/
H A Dsdhci-esdhc-imx.c102 /* NOTE: the minimum valid tuning start tap for mx6sl is 1 */
400 /* ignore bit[0-15] as it stores cap_1 register val for mx6sl */ in esdhc_readl_le()
1329 * TO1.1, it's harmless for MX6SL in sdhci_esdhc_imx_hwinit()
/OK3568_Linux_fs/kernel/arch/arm/
H A DKconfig.debug461 bool "i.MX6SL Debug UART"
465 on i.MX6SL.
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/
H A Dfsl.yaml253 - description: i.MX6SL based Boards
/OK3568_Linux_fs/buildroot/dl/uboot-tools/
HDu-boot-2021.07.tar.bz2pax_global_header u-boot-2021.07/ u-boot-2021.07/.azure-pipelines.yml ...