xref: /OK3568_Linux_fs/u-boot/include/configs/mx6slevk.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright 2013 Freescale Semiconductor, Inc.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Configuration settings for the Freescale i.MX6SL EVK board.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #ifndef __CONFIG_H
10*4882a593Smuzhiyun #define __CONFIG_H
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include "mx6_common.h"
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #ifdef CONFIG_SPL
15*4882a593Smuzhiyun #include "imx6_spl.h"
16*4882a593Smuzhiyun #endif
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define CONFIG_MACH_TYPE		MACH_TYPE_MX6SL_EVK
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun /* Size of malloc() pool */
21*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN		(3 * SZ_1M)
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define CONFIG_MXC_UART
24*4882a593Smuzhiyun #define CONFIG_MXC_UART_BASE		UART1_IPS_BASE_ADDR
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun /* MMC Configs */
27*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun /* I2C Configs */
30*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC
31*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
32*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
33*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
34*4882a593Smuzhiyun #define CONFIG_SYS_I2C_SPEED		  100000
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #define CONFIG_FEC_MXC
37*4882a593Smuzhiyun #define CONFIG_MII
38*4882a593Smuzhiyun #define IMX_FEC_BASE			ENET_BASE_ADDR
39*4882a593Smuzhiyun #define CONFIG_FEC_XCV_TYPE		RMII
40*4882a593Smuzhiyun #define CONFIG_FEC_MXC_PHYADDR		0
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #define CONFIG_PHY_SMSC
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \
45*4882a593Smuzhiyun 	"script=boot.scr\0" \
46*4882a593Smuzhiyun 	"image=zImage\0" \
47*4882a593Smuzhiyun 	"console=ttymxc0\0" \
48*4882a593Smuzhiyun 	"fdt_high=0xffffffff\0" \
49*4882a593Smuzhiyun 	"initrd_high=0xffffffff\0" \
50*4882a593Smuzhiyun 	"fdt_file=imx6sl-evk.dtb\0" \
51*4882a593Smuzhiyun 	"fdt_addr=0x88000000\0" \
52*4882a593Smuzhiyun 	"boot_fdt=try\0" \
53*4882a593Smuzhiyun 	"ip_dyn=yes\0" \
54*4882a593Smuzhiyun 	"mmcdev=1\0" \
55*4882a593Smuzhiyun 	"mmcpart=1\0" \
56*4882a593Smuzhiyun 	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
57*4882a593Smuzhiyun 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
58*4882a593Smuzhiyun 		"root=${mmcroot}\0" \
59*4882a593Smuzhiyun 	"loadbootscript=" \
60*4882a593Smuzhiyun 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
61*4882a593Smuzhiyun 	"bootscript=echo Running bootscript from mmc ...; " \
62*4882a593Smuzhiyun 		"source\0" \
63*4882a593Smuzhiyun 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
64*4882a593Smuzhiyun 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
65*4882a593Smuzhiyun 	"mmcboot=echo Booting from mmc ...; " \
66*4882a593Smuzhiyun 		"run mmcargs; " \
67*4882a593Smuzhiyun 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
68*4882a593Smuzhiyun 			"if run loadfdt; then " \
69*4882a593Smuzhiyun 				"bootz ${loadaddr} - ${fdt_addr}; " \
70*4882a593Smuzhiyun 			"else " \
71*4882a593Smuzhiyun 				"if test ${boot_fdt} = try; then " \
72*4882a593Smuzhiyun 					"bootz; " \
73*4882a593Smuzhiyun 				"else " \
74*4882a593Smuzhiyun 					"echo WARN: Cannot load the DT; " \
75*4882a593Smuzhiyun 				"fi; " \
76*4882a593Smuzhiyun 			"fi; " \
77*4882a593Smuzhiyun 		"else " \
78*4882a593Smuzhiyun 			"bootz; " \
79*4882a593Smuzhiyun 		"fi;\0" \
80*4882a593Smuzhiyun 	"netargs=setenv bootargs console=${console},${baudrate} " \
81*4882a593Smuzhiyun 		"root=/dev/nfs " \
82*4882a593Smuzhiyun 	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
83*4882a593Smuzhiyun 		"netboot=echo Booting from net ...; " \
84*4882a593Smuzhiyun 		"run netargs; " \
85*4882a593Smuzhiyun 		"if test ${ip_dyn} = yes; then " \
86*4882a593Smuzhiyun 			"setenv get_cmd dhcp; " \
87*4882a593Smuzhiyun 		"else " \
88*4882a593Smuzhiyun 			"setenv get_cmd tftp; " \
89*4882a593Smuzhiyun 		"fi; " \
90*4882a593Smuzhiyun 		"${get_cmd} ${image}; " \
91*4882a593Smuzhiyun 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
92*4882a593Smuzhiyun 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
93*4882a593Smuzhiyun 				"bootz ${loadaddr} - ${fdt_addr}; " \
94*4882a593Smuzhiyun 			"else " \
95*4882a593Smuzhiyun 				"if test ${boot_fdt} = try; then " \
96*4882a593Smuzhiyun 					"bootz; " \
97*4882a593Smuzhiyun 				"else " \
98*4882a593Smuzhiyun 					"echo WARN: Cannot load the DT; " \
99*4882a593Smuzhiyun 				"fi; " \
100*4882a593Smuzhiyun 			"fi; " \
101*4882a593Smuzhiyun 		"else " \
102*4882a593Smuzhiyun 			"bootz; " \
103*4882a593Smuzhiyun 		"fi;\0"
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND \
106*4882a593Smuzhiyun 	   "mmc dev ${mmcdev};" \
107*4882a593Smuzhiyun 	   "mmc dev ${mmcdev}; if mmc rescan; then " \
108*4882a593Smuzhiyun 		   "if run loadbootscript; then " \
109*4882a593Smuzhiyun 			   "run bootscript; " \
110*4882a593Smuzhiyun 		   "else " \
111*4882a593Smuzhiyun 			   "if run loadimage; then " \
112*4882a593Smuzhiyun 				   "run mmcboot; " \
113*4882a593Smuzhiyun 			   "else run netboot; " \
114*4882a593Smuzhiyun 			   "fi; " \
115*4882a593Smuzhiyun 		   "fi; " \
116*4882a593Smuzhiyun 	   "else run netboot; fi"
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun /* Miscellaneous configurable options */
119*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START	0x80000000
120*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + SZ_512M)
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun /* Physical Memory Map */
123*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS		1
124*4882a593Smuzhiyun #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
127*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
128*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET \
131*4882a593Smuzhiyun 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
132*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \
133*4882a593Smuzhiyun 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun /* Environment organization */
136*4882a593Smuzhiyun #define CONFIG_ENV_SIZE			SZ_8K
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun #if defined CONFIG_SPI_BOOT
139*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET               (768 * 1024)
140*4882a593Smuzhiyun #define CONFIG_ENV_SECT_SIZE            (64 * 1024)
141*4882a593Smuzhiyun #define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
142*4882a593Smuzhiyun #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
143*4882a593Smuzhiyun #define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
144*4882a593Smuzhiyun #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
145*4882a593Smuzhiyun #else
146*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET		(8 * SZ_64K)
147*4882a593Smuzhiyun #endif
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun #ifdef CONFIG_CMD_SF
150*4882a593Smuzhiyun #define CONFIG_MXC_SPI
151*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_BUS		0
152*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_CS		0
153*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_SPEED		20000000
154*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
155*4882a593Smuzhiyun #endif
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun /* USB Configs */
158*4882a593Smuzhiyun #ifdef CONFIG_CMD_USB
159*4882a593Smuzhiyun #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
160*4882a593Smuzhiyun #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
161*4882a593Smuzhiyun #define CONFIG_MXC_USB_FLAGS		0
162*4882a593Smuzhiyun #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
163*4882a593Smuzhiyun #endif
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun #define CONFIG_SYS_FSL_USDHC_NUM	3
166*4882a593Smuzhiyun #if defined(CONFIG_ENV_IS_IN_MMC)
167*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV		1	/* SDHC2*/
168*4882a593Smuzhiyun #endif
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun #define CONFIG_IMX_THERMAL
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun #endif				/* __CONFIG_H */
173