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/OK3568_Linux_fs/kernel/drivers/irqchip/
H A Dirq-ti-sci-intr.c24 * @out_irqs: TISCI resource pointer representing INTR irqs.
38 .name = "INTR",
62 struct ti_sci_intr_irq_domain *intr = domain->host_data; in ti_sci_intr_irq_domain_translate() local
68 *type = intr->type; in ti_sci_intr_irq_domain_translate()
75 * @intr: IRQ domain corresponding to Interrupt Router
80 static int ti_sci_intr_xlate_irq(struct ti_sci_intr_irq_domain *intr, u32 irq) in ti_sci_intr_xlate_irq() argument
82 struct device_node *np = dev_of_node(intr->dev); in ti_sci_intr_xlate_irq()
111 struct ti_sci_intr_irq_domain *intr = domain->host_data; in ti_sci_intr_irq_domain_free() local
118 intr->sci->ops.rm_irq_ops.free_irq(intr->sci, in ti_sci_intr_irq_domain_free()
119 intr->ti_sci_id, data->hwirq, in ti_sci_intr_irq_domain_free()
[all …]
H A Dirq-mips-gic.c68 static void gic_clear_pcpu_masks(unsigned int intr) in gic_clear_pcpu_masks() argument
74 clear_bit(intr, per_cpu_ptr(pcpu_masks, i)); in gic_clear_pcpu_masks()
77 static bool gic_local_irq_is_routable(int intr) in gic_local_irq_is_routable() argument
86 switch (intr) { in gic_local_irq_is_routable()
152 unsigned int intr, virq; in gic_handle_shared_int() local
168 for_each_set_bit(intr, pending, gic_shared_intrs) { in gic_handle_shared_int()
170 GIC_SHARED_TO_HWIRQ(intr)); in gic_handle_shared_int()
180 unsigned int intr = GIC_HWIRQ_TO_SHARED(d->hwirq); in gic_mask_irq() local
182 write_gic_rmask(intr); in gic_mask_irq()
183 gic_clear_pcpu_masks(intr); in gic_mask_irq()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_interrupts.h33 * @DPU_IRQ_TYPE_SFI_VIDEO_IN: Video static frame INTR into static
34 * @DPU_IRQ_TYPE_SFI_VIDEO_OUT: Video static frame INTR out-of static
35 * @DPU_IRQ_TYPE_SFI_CMD_0_IN: DSI CMD0 static frame INTR into static
36 * @DPU_IRQ_TYPE_SFI_CMD_0_OUT: DSI CMD0 static frame INTR out-of static
37 * @DPU_IRQ_TYPE_SFI_CMD_1_IN: DSI CMD1 static frame INTR into static
38 * @DPU_IRQ_TYPE_SFI_CMD_1_OUT: DSI CMD1 static frame INTR out-of static
39 * @DPU_IRQ_TYPE_SFI_CMD_2_IN: DSI CMD2 static frame INTR into static
40 * @DPU_IRQ_TYPE_SFI_CMD_2_OUT: DSI CMD2 static frame INTR out-of static
96 * @intr: HW interrupt handle
101 struct dpu_hw_intr *intr,
[all …]
H A Ddpu_hw_interrupts.c253 /* BEGIN MAP_RANGE: 0-31, INTR */
773 static void dpu_hw_intr_dispatch_irq(struct dpu_hw_intr *intr, in dpu_hw_intr_dispatch_irq() argument
784 if (!intr) in dpu_hw_intr_dispatch_irq()
792 spin_lock_irqsave(&intr->irq_lock, irq_flags); in dpu_hw_intr_dispatch_irq()
794 irq_status = intr->save_irq_status[reg_idx]; in dpu_hw_intr_dispatch_irq()
803 if (!test_bit(reg_idx, &intr->irq_mask) || in dpu_hw_intr_dispatch_irq()
808 * Search through matching intr status from irq map. in dpu_hw_intr_dispatch_irq()
827 intr->ops.clear_intr_status_nolock( in dpu_hw_intr_dispatch_irq()
828 intr, irq_idx); in dpu_hw_intr_dispatch_irq()
838 spin_unlock_irqrestore(&intr->irq_lock, irq_flags); in dpu_hw_intr_dispatch_irq()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/cisco/enic/
H A Dvnic_intr.c30 void vnic_intr_free(struct vnic_intr *intr) in vnic_intr_free() argument
32 intr->ctrl = NULL; in vnic_intr_free()
35 int vnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr, in vnic_intr_alloc() argument
38 intr->index = index; in vnic_intr_alloc()
39 intr->vdev = vdev; in vnic_intr_alloc()
41 intr->ctrl = vnic_dev_get_res(vdev, RES_TYPE_INTR_CTRL, index); in vnic_intr_alloc()
42 if (!intr->ctrl) { in vnic_intr_alloc()
43 vdev_err(vdev, "Failed to hook INTR[%d].ctrl resource\n", in vnic_intr_alloc()
51 void vnic_intr_init(struct vnic_intr *intr, u32 coalescing_timer, in vnic_intr_init() argument
54 vnic_intr_coalescing_timer_set(intr, coalescing_timer); in vnic_intr_init()
[all …]
H A Dvnic_intr.h54 static inline void vnic_intr_unmask(struct vnic_intr *intr) in vnic_intr_unmask() argument
56 iowrite32(0, &intr->ctrl->mask); in vnic_intr_unmask()
59 static inline void vnic_intr_mask(struct vnic_intr *intr) in vnic_intr_mask() argument
61 iowrite32(1, &intr->ctrl->mask); in vnic_intr_mask()
64 static inline int vnic_intr_masked(struct vnic_intr *intr) in vnic_intr_masked() argument
66 return ioread32(&intr->ctrl->mask); in vnic_intr_masked()
69 static inline void vnic_intr_return_credits(struct vnic_intr *intr, in vnic_intr_return_credits() argument
79 iowrite32(int_credit_return, &intr->ctrl->int_credit_return); in vnic_intr_return_credits()
82 static inline unsigned int vnic_intr_credits(struct vnic_intr *intr) in vnic_intr_credits() argument
84 return ioread32(&intr->ctrl->int_credits); in vnic_intr_credits()
[all …]
/OK3568_Linux_fs/kernel/arch/mips/include/asm/
H A Dmips-gic.h49 static inline void __iomem *addr_gic_##name(unsigned int intr) \
51 return mips_gic_base + (off) + (intr * (stride)); \
54 static inline unsigned int read_gic_##name(unsigned int intr) \
57 return __raw_readl(addr_gic_##name(intr)); \
64 static inline void write_gic_##name(unsigned int intr, \
68 __raw_writel(val, addr_gic_##name(intr)); \
92 static inline unsigned int read_gic_##name(unsigned int intr) \
98 addr += (intr / 64) * sizeof(uint64_t); \
99 val = __raw_readq(addr) >> intr % 64; \
101 addr += (intr / 32) * sizeof(uint32_t); \
[all …]
/OK3568_Linux_fs/kernel/drivers/scsi/snic/
H A Dvnic_intr.c26 void svnic_intr_free(struct vnic_intr *intr) in svnic_intr_free() argument
28 intr->ctrl = NULL; in svnic_intr_free()
31 int svnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr, in svnic_intr_alloc() argument
34 intr->index = index; in svnic_intr_alloc()
35 intr->vdev = vdev; in svnic_intr_alloc()
37 intr->ctrl = svnic_dev_get_res(vdev, RES_TYPE_INTR_CTRL, index); in svnic_intr_alloc()
38 if (!intr->ctrl) { in svnic_intr_alloc()
39 pr_err("Failed to hook INTR[%d].ctrl resource\n", in svnic_intr_alloc()
47 void svnic_intr_init(struct vnic_intr *intr, unsigned int coalescing_timer, in svnic_intr_init() argument
50 iowrite32(coalescing_timer, &intr->ctrl->coalescing_timer); in svnic_intr_init()
[all …]
H A Dvnic_intr.h54 svnic_intr_unmask(struct vnic_intr *intr) in svnic_intr_unmask() argument
56 iowrite32(0, &intr->ctrl->mask); in svnic_intr_unmask()
60 svnic_intr_mask(struct vnic_intr *intr) in svnic_intr_mask() argument
62 iowrite32(1, &intr->ctrl->mask); in svnic_intr_mask()
66 svnic_intr_return_credits(struct vnic_intr *intr, in svnic_intr_return_credits() argument
78 iowrite32(int_credit_return, &intr->ctrl->int_credit_return); in svnic_intr_return_credits()
82 svnic_intr_credits(struct vnic_intr *intr) in svnic_intr_credits() argument
84 return ioread32(&intr->ctrl->int_credits); in svnic_intr_credits()
88 svnic_intr_return_all_credits(struct vnic_intr *intr) in svnic_intr_return_all_credits() argument
90 unsigned int credits = svnic_intr_credits(intr); in svnic_intr_return_all_credits()
[all …]
/OK3568_Linux_fs/kernel/drivers/scsi/fnic/
H A Dvnic_intr.c27 void vnic_intr_free(struct vnic_intr *intr) in vnic_intr_free() argument
29 intr->ctrl = NULL; in vnic_intr_free()
32 int vnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr, in vnic_intr_alloc() argument
35 intr->index = index; in vnic_intr_alloc()
36 intr->vdev = vdev; in vnic_intr_alloc()
38 intr->ctrl = vnic_dev_get_res(vdev, RES_TYPE_INTR_CTRL, index); in vnic_intr_alloc()
39 if (!intr->ctrl) { in vnic_intr_alloc()
40 printk(KERN_ERR "Failed to hook INTR[%d].ctrl resource\n", in vnic_intr_alloc()
48 void vnic_intr_init(struct vnic_intr *intr, unsigned int coalescing_timer, in vnic_intr_init() argument
51 iowrite32(coalescing_timer, &intr->ctrl->coalescing_timer); in vnic_intr_init()
[all …]
H A Dvnic_intr.h68 static inline void vnic_intr_unmask(struct vnic_intr *intr) in vnic_intr_unmask() argument
70 iowrite32(0, &intr->ctrl->mask); in vnic_intr_unmask()
73 static inline void vnic_intr_mask(struct vnic_intr *intr) in vnic_intr_mask() argument
75 iowrite32(1, &intr->ctrl->mask); in vnic_intr_mask()
78 static inline void vnic_intr_return_credits(struct vnic_intr *intr, in vnic_intr_return_credits() argument
88 iowrite32(int_credit_return, &intr->ctrl->int_credit_return); in vnic_intr_return_credits()
91 static inline unsigned int vnic_intr_credits(struct vnic_intr *intr) in vnic_intr_credits() argument
93 return ioread32(&intr->ctrl->int_credits); in vnic_intr_credits()
96 static inline void vnic_intr_return_all_credits(struct vnic_intr *intr) in vnic_intr_return_all_credits() argument
98 unsigned int credits = vnic_intr_credits(intr); in vnic_intr_return_all_credits()
[all …]
H A Dfnic_isr.c44 vnic_intr_return_all_credits(&fnic->intr[FNIC_INTX_NOTIFY]); in fnic_isr_legacy()
49 vnic_intr_return_all_credits(&fnic->intr[FNIC_INTX_ERR]); in fnic_isr_legacy()
58 vnic_intr_return_credits(&fnic->intr[FNIC_INTX_WQ_RQ_COPYWQ], in fnic_isr_legacy()
60 1 /* unmask intr */, in fnic_isr_legacy()
61 1 /* reset intr timer */); in fnic_isr_legacy()
79 vnic_intr_return_credits(&fnic->intr[0], in fnic_isr_msi()
81 1 /* unmask intr */, in fnic_isr_msi()
82 1 /* reset intr timer */); in fnic_isr_msi()
96 vnic_intr_return_credits(&fnic->intr[FNIC_MSIX_RQ], in fnic_isr_msix_rq()
98 1 /* unmask intr */, in fnic_isr_msix_rq()
[all …]
/OK3568_Linux_fs/u-boot/arch/m68k/include/asm/
H A Dm5249.h43 #define MCFSIM_SWIVR 0x02 /* SW Watchdog intr reg (r/w) */
48 #define MCFSIM_ICR0 0x4c /* Intr Ctrl reg 0 (r/w) */
49 #define MCFSIM_ICR1 0x4d /* Intr Ctrl reg 1 (r/w) */
50 #define MCFSIM_ICR2 0x4e /* Intr Ctrl reg 2 (r/w) */
51 #define MCFSIM_ICR3 0x4f /* Intr Ctrl reg 3 (r/w) */
52 #define MCFSIM_ICR4 0x50 /* Intr Ctrl reg 4 (r/w) */
53 #define MCFSIM_ICR5 0x51 /* Intr Ctrl reg 5 (r/w) */
54 #define MCFSIM_ICR6 0x52 /* Intr Ctrl reg 6 (r/w) */
55 #define MCFSIM_ICR7 0x53 /* Intr Ctrl reg 7 (r/w) */
56 #define MCFSIM_ICR8 0x54 /* Intr Ctrl reg 8 (r/w) */
[all …]
H A Dm5307.h54 #define MCFSIM_ICR_AUTOVEC 0x80 /* Auto-vectored intr */
55 #define MCFSIM_ICR_LEVEL0 0x00 /* Level 0 intr */
56 #define MCFSIM_ICR_LEVEL1 0x04 /* Level 1 intr */
57 #define MCFSIM_ICR_LEVEL2 0x08 /* Level 2 intr */
58 #define MCFSIM_ICR_LEVEL3 0x0c /* Level 3 intr */
59 #define MCFSIM_ICR_LEVEL4 0x10 /* Level 4 intr */
60 #define MCFSIM_ICR_LEVEL5 0x14 /* Level 5 intr */
61 #define MCFSIM_ICR_LEVEL6 0x18 /* Level 6 intr */
62 #define MCFSIM_ICR_LEVEL7 0x1c /* Level 7 intr */
64 #define MCFSIM_ICR_PRI0 0x00 /* Priority 0 intr */
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852be/phl/hal_g6/rtl8852b/pci/
H A Drtl8852be_halinit.c557 hal_com->intr.halt_c2h_int.val_default = (u32)( in hal_init_default_value_8852be()
561 hal_com->intr.watchdog_timer_int.val_default = (u32)( in hal_init_default_value_8852be()
567 hal_com->intr.halt_c2h_int.val_mask = hal_com->intr.halt_c2h_int.val_default; in hal_init_default_value_8852be()
568 hal_com->intr.watchdog_timer_int.val_mask = hal_com->intr.watchdog_timer_int.val_default; in hal_init_default_value_8852be()
571 hal_com->int_mask[0], hal_com->int_mask[1], hal_com->intr.halt_c2h_int.val_mask, in hal_init_default_value_8852be()
572 hal_com->intr.watchdog_timer_int.val_mask ); in hal_init_default_value_8852be()
581 hal_write32(hal_com, R_AX_HIMR0, hal_com->intr.halt_c2h_int.val_mask); in hal_enable_int_8852be()
582 hal_write32(hal_com, R_AX_HD0IMR, hal_com->intr.watchdog_timer_int.val_mask); in hal_enable_int_8852be()
625 hal_com->intr.halt_c2h_int.intr = hal_read32(hal_com, R_AX_HISR0); in hal_recognize_int_8852be()
626 hal_com->intr.halt_c2h_int.intr &= hal_com->intr.halt_c2h_int.val_mask; in hal_recognize_int_8852be()
[all …]
/OK3568_Linux_fs/kernel/drivers/usb/mtu3/
H A Dmtu3_trace.h38 TP_PROTO(u32 intr),
39 TP_ARGS(intr),
41 __field(u32, intr)
44 __entry->intr = intr;
46 TP_printk("(%08x) %s %s %s %s %s %s", __entry->intr,
47 __entry->intr & HOT_RST_INTR ? "HOT_RST" : "",
48 __entry->intr & WARM_RST_INTR ? "WARM_RST" : "",
49 __entry->intr & ENTER_U3_INTR ? "ENT_U3" : "",
50 __entry->intr & EXIT_U3_INTR ? "EXIT_U3" : "",
51 __entry->intr & VBUS_RISE_INTR ? "VBUS_RISE" : "",
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/zydas/zd1211rw/
H A Dzd_usb.c361 struct zd_usb_interrupt *intr = &usb->intr; in handle_regs_int_override() local
364 spin_lock_irqsave(&intr->lock, flags); in handle_regs_int_override()
365 if (atomic_read(&intr->read_regs_enabled)) { in handle_regs_int_override()
366 atomic_set(&intr->read_regs_enabled, 0); in handle_regs_int_override()
367 intr->read_regs_int_overridden = 1; in handle_regs_int_override()
368 complete(&intr->read_regs.completion); in handle_regs_int_override()
370 spin_unlock_irqrestore(&intr->lock, flags); in handle_regs_int_override()
376 struct zd_usb_interrupt *intr = &usb->intr; in handle_regs_int() local
381 spin_lock_irqsave(&intr->lock, flags); in handle_regs_int()
391 } else if (atomic_read(&intr->read_regs_enabled)) { in handle_regs_int()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/nvkm/engine/ce/
H A Dgp100.c66 u32 intr = nvkm_rd32(device, 0x104410 + base) & mask; in gp100_ce_intr() local
67 if (intr & 0x00000001) { //XXX: guess in gp100_ce_intr()
70 intr &= ~0x00000001; in gp100_ce_intr()
72 if (intr & 0x00000002) { //XXX: guess in gp100_ce_intr()
75 intr &= ~0x00000002; in gp100_ce_intr()
77 if (intr & 0x00000004) { in gp100_ce_intr()
80 intr &= ~0x00000004; in gp100_ce_intr()
82 if (intr) { in gp100_ce_intr()
83 nvkm_warn(subdev, "intr %08x\n", intr); in gp100_ce_intr()
84 nvkm_wr32(device, 0x104410 + base, intr); in gp100_ce_intr()
[all …]
H A Dgk104.c65 u32 intr = nvkm_rd32(device, 0x104908 + base) & mask; in gk104_ce_intr() local
66 if (intr & 0x00000001) { in gk104_ce_intr()
69 intr &= ~0x00000001; in gk104_ce_intr()
71 if (intr & 0x00000002) { in gk104_ce_intr()
74 intr &= ~0x00000002; in gk104_ce_intr()
76 if (intr & 0x00000004) { in gk104_ce_intr()
79 intr &= ~0x00000004; in gk104_ce_intr()
81 if (intr) { in gk104_ce_intr()
82 nvkm_warn(subdev, "intr %08x\n", intr); in gk104_ce_intr()
83 nvkm_wr32(device, 0x104908 + base, intr); in gk104_ce_intr()
[all …]
/OK3568_Linux_fs/kernel/drivers/scsi/
H A Dmac53c94.c46 int intr; member
200 int nb, stat, seq, intr; in mac53c94_interrupt() local
209 intr = readb(&regs->interrupt); in mac53c94_interrupt()
212 printk(KERN_DEBUG "mac53c94_intr, intr=%x stat=%x seq=%x phase=%d\n", in mac53c94_interrupt()
213 intr, stat, seq, state->phase); in mac53c94_interrupt()
216 if (intr & INTR_RESET) { in mac53c94_interrupt()
224 if (intr & INTR_ILL_CMD) { in mac53c94_interrupt()
225 printk(KERN_ERR "53c94: invalid cmd, intr=%x stat=%x seq=%x phase=%d\n", in mac53c94_interrupt()
226 intr, stat, seq, state->phase); in mac53c94_interrupt()
233 printk("53c94: bad error, intr=%x stat=%x seq=%x phase=%d\n", in mac53c94_interrupt()
[all …]
/OK3568_Linux_fs/kernel/arch/m68k/include/asm/
H A Dmcfintc.h31 #define MCFSIM_ICR_AUTOVEC 0x80 /* Auto-vectored intr */
32 #define MCFSIM_ICR_LEVEL0 0x00 /* Level 0 intr */
33 #define MCFSIM_ICR_LEVEL1 0x04 /* Level 1 intr */
34 #define MCFSIM_ICR_LEVEL2 0x08 /* Level 2 intr */
35 #define MCFSIM_ICR_LEVEL3 0x0c /* Level 3 intr */
36 #define MCFSIM_ICR_LEVEL4 0x10 /* Level 4 intr */
37 #define MCFSIM_ICR_LEVEL5 0x14 /* Level 5 intr */
38 #define MCFSIM_ICR_LEVEL6 0x18 /* Level 6 intr */
39 #define MCFSIM_ICR_LEVEL7 0x1c /* Level 7 intr */
41 #define MCFSIM_ICR_PRI0 0x00 /* Priority 0 intr */
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/host1x/
H A Dintr.c16 #include "intr.h"
165 spin_lock(&syncpt->intr.lock); in process_wait_list()
167 remove_completed_waiters(&syncpt->intr.wait_head, threshold, in process_wait_list()
170 empty = list_empty(&syncpt->intr.wait_head); in process_wait_list()
174 reset_threshold_interrupt(host, &syncpt->intr.wait_head, in process_wait_list()
177 spin_unlock(&syncpt->intr.lock); in process_wait_list()
194 container_of(syncpt_intr, struct host1x_syncpt, intr); in syncpt_thresh_work()
225 spin_lock(&syncpt->intr.lock); in host1x_intr_add_action()
227 queue_was_empty = list_empty(&syncpt->intr.wait_head); in host1x_intr_add_action()
229 if (add_waiter_to_queue(waiter, &syncpt->intr.wait_head)) { in host1x_intr_add_action()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/mediatek/mt76/mt7603/
H A Dcore.c16 u32 intr; in mt7603_irq_handler() local
18 intr = mt76_rr(dev, MT_INT_SOURCE_CSR); in mt7603_irq_handler()
19 mt76_wr(dev, MT_INT_SOURCE_CSR, intr); in mt7603_irq_handler()
24 trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask); in mt7603_irq_handler()
26 intr &= dev->mt76.mmio.irqmask; in mt7603_irq_handler()
28 if (intr & MT_INT_MAC_IRQ3) { in mt7603_irq_handler()
39 if (intr & MT_INT_TX_DONE_ALL) { in mt7603_irq_handler()
44 if (intr & MT_INT_RX_DONE(0)) { in mt7603_irq_handler()
49 if (intr & MT_INT_RX_DONE(1)) { in mt7603_irq_handler()
/OK3568_Linux_fs/u-boot/drivers/net/
H A De1000_spi.c18 * This may be interrupted with Ctrl-C if "intr" is true, otherwise it will
22 const void *dout_mem, void *din_mem, bool intr) in e1000_spi_xfer() argument
37 if (intr && ctrlc()) in e1000_spi_xfer()
172 static int e1000_spi_eeprom_enable_wr(struct e1000_hw *hw, bool intr) in e1000_spi_eeprom_enable_wr() argument
176 return e1000_spi_xfer(hw, 8*sizeof(op), op, NULL, intr); in e1000_spi_eeprom_enable_wr()
184 bool intr) in e1000_spi_eeprom_disable_wr() argument
188 return e1000_spi_xfer(hw, 8*sizeof(op), op, NULL, intr); in e1000_spi_eeprom_disable_wr()
192 u8 status, bool intr) in e1000_spi_eeprom_write_status() argument
196 return e1000_spi_xfer(hw, 8*sizeof(op), op, NULL, intr); in e1000_spi_eeprom_write_status()
199 static int e1000_spi_eeprom_read_status(struct e1000_hw *hw, bool intr) in e1000_spi_eeprom_read_status() argument
[all …]
/OK3568_Linux_fs/kernel/drivers/mtd/nand/onenand/
H A Donenand_omap2.c129 static void wait_err(char *msg, int state, unsigned int ctrl, unsigned int intr) in wait_err() argument
131 printk(KERN_ERR "onenand_wait: %s! state %d ctrl 0x%04x intr 0x%04x\n", in wait_err()
132 msg, state, ctrl, intr); in wait_err()
136 unsigned int intr) in wait_warn() argument
139 "intr 0x%04x\n", msg, state, ctrl, intr); in wait_warn()
146 unsigned int intr = 0; in omap2_onenand_wait() local
170 intr = read_reg(c, ONENAND_REG_INTERRUPT); in omap2_onenand_wait()
171 if (intr & ONENAND_INT_MASTER) in omap2_onenand_wait()
176 wait_err("controller error", state, ctrl, intr); in omap2_onenand_wait()
179 if ((intr & intr_flags) == intr_flags) in omap2_onenand_wait()
[all …]

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