1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2008 Cisco Systems, Inc. All rights reserved.
3*4882a593Smuzhiyun * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * This program is free software; you may redistribute it and/or modify
6*4882a593Smuzhiyun * it under the terms of the GNU General Public License as published by
7*4882a593Smuzhiyun * the Free Software Foundation; version 2 of the License.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11*4882a593Smuzhiyun * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13*4882a593Smuzhiyun * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14*4882a593Smuzhiyun * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15*4882a593Smuzhiyun * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16*4882a593Smuzhiyun * SOFTWARE.
17*4882a593Smuzhiyun */
18*4882a593Smuzhiyun #include <linux/string.h>
19*4882a593Smuzhiyun #include <linux/errno.h>
20*4882a593Smuzhiyun #include <linux/pci.h>
21*4882a593Smuzhiyun #include <linux/interrupt.h>
22*4882a593Smuzhiyun #include <scsi/libfc.h>
23*4882a593Smuzhiyun #include <scsi/fc_frame.h>
24*4882a593Smuzhiyun #include "vnic_dev.h"
25*4882a593Smuzhiyun #include "vnic_intr.h"
26*4882a593Smuzhiyun #include "vnic_stats.h"
27*4882a593Smuzhiyun #include "fnic_io.h"
28*4882a593Smuzhiyun #include "fnic.h"
29*4882a593Smuzhiyun
fnic_isr_legacy(int irq,void * data)30*4882a593Smuzhiyun static irqreturn_t fnic_isr_legacy(int irq, void *data)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun struct fnic *fnic = data;
33*4882a593Smuzhiyun u32 pba;
34*4882a593Smuzhiyun unsigned long work_done = 0;
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun pba = vnic_intr_legacy_pba(fnic->legacy_pba);
37*4882a593Smuzhiyun if (!pba)
38*4882a593Smuzhiyun return IRQ_NONE;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun fnic->fnic_stats.misc_stats.last_isr_time = jiffies;
41*4882a593Smuzhiyun atomic64_inc(&fnic->fnic_stats.misc_stats.isr_count);
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun if (pba & (1 << FNIC_INTX_NOTIFY)) {
44*4882a593Smuzhiyun vnic_intr_return_all_credits(&fnic->intr[FNIC_INTX_NOTIFY]);
45*4882a593Smuzhiyun fnic_handle_link_event(fnic);
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun if (pba & (1 << FNIC_INTX_ERR)) {
49*4882a593Smuzhiyun vnic_intr_return_all_credits(&fnic->intr[FNIC_INTX_ERR]);
50*4882a593Smuzhiyun fnic_log_q_error(fnic);
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun if (pba & (1 << FNIC_INTX_WQ_RQ_COPYWQ)) {
54*4882a593Smuzhiyun work_done += fnic_wq_copy_cmpl_handler(fnic, io_completions);
55*4882a593Smuzhiyun work_done += fnic_wq_cmpl_handler(fnic, -1);
56*4882a593Smuzhiyun work_done += fnic_rq_cmpl_handler(fnic, -1);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun vnic_intr_return_credits(&fnic->intr[FNIC_INTX_WQ_RQ_COPYWQ],
59*4882a593Smuzhiyun work_done,
60*4882a593Smuzhiyun 1 /* unmask intr */,
61*4882a593Smuzhiyun 1 /* reset intr timer */);
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun return IRQ_HANDLED;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
fnic_isr_msi(int irq,void * data)67*4882a593Smuzhiyun static irqreturn_t fnic_isr_msi(int irq, void *data)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun struct fnic *fnic = data;
70*4882a593Smuzhiyun unsigned long work_done = 0;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun fnic->fnic_stats.misc_stats.last_isr_time = jiffies;
73*4882a593Smuzhiyun atomic64_inc(&fnic->fnic_stats.misc_stats.isr_count);
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun work_done += fnic_wq_copy_cmpl_handler(fnic, io_completions);
76*4882a593Smuzhiyun work_done += fnic_wq_cmpl_handler(fnic, -1);
77*4882a593Smuzhiyun work_done += fnic_rq_cmpl_handler(fnic, -1);
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun vnic_intr_return_credits(&fnic->intr[0],
80*4882a593Smuzhiyun work_done,
81*4882a593Smuzhiyun 1 /* unmask intr */,
82*4882a593Smuzhiyun 1 /* reset intr timer */);
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun return IRQ_HANDLED;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
fnic_isr_msix_rq(int irq,void * data)87*4882a593Smuzhiyun static irqreturn_t fnic_isr_msix_rq(int irq, void *data)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun struct fnic *fnic = data;
90*4882a593Smuzhiyun unsigned long rq_work_done = 0;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun fnic->fnic_stats.misc_stats.last_isr_time = jiffies;
93*4882a593Smuzhiyun atomic64_inc(&fnic->fnic_stats.misc_stats.isr_count);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun rq_work_done = fnic_rq_cmpl_handler(fnic, -1);
96*4882a593Smuzhiyun vnic_intr_return_credits(&fnic->intr[FNIC_MSIX_RQ],
97*4882a593Smuzhiyun rq_work_done,
98*4882a593Smuzhiyun 1 /* unmask intr */,
99*4882a593Smuzhiyun 1 /* reset intr timer */);
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun return IRQ_HANDLED;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
fnic_isr_msix_wq(int irq,void * data)104*4882a593Smuzhiyun static irqreturn_t fnic_isr_msix_wq(int irq, void *data)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun struct fnic *fnic = data;
107*4882a593Smuzhiyun unsigned long wq_work_done = 0;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun fnic->fnic_stats.misc_stats.last_isr_time = jiffies;
110*4882a593Smuzhiyun atomic64_inc(&fnic->fnic_stats.misc_stats.isr_count);
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun wq_work_done = fnic_wq_cmpl_handler(fnic, -1);
113*4882a593Smuzhiyun vnic_intr_return_credits(&fnic->intr[FNIC_MSIX_WQ],
114*4882a593Smuzhiyun wq_work_done,
115*4882a593Smuzhiyun 1 /* unmask intr */,
116*4882a593Smuzhiyun 1 /* reset intr timer */);
117*4882a593Smuzhiyun return IRQ_HANDLED;
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun
fnic_isr_msix_wq_copy(int irq,void * data)120*4882a593Smuzhiyun static irqreturn_t fnic_isr_msix_wq_copy(int irq, void *data)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun struct fnic *fnic = data;
123*4882a593Smuzhiyun unsigned long wq_copy_work_done = 0;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun fnic->fnic_stats.misc_stats.last_isr_time = jiffies;
126*4882a593Smuzhiyun atomic64_inc(&fnic->fnic_stats.misc_stats.isr_count);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun wq_copy_work_done = fnic_wq_copy_cmpl_handler(fnic, io_completions);
129*4882a593Smuzhiyun vnic_intr_return_credits(&fnic->intr[FNIC_MSIX_WQ_COPY],
130*4882a593Smuzhiyun wq_copy_work_done,
131*4882a593Smuzhiyun 1 /* unmask intr */,
132*4882a593Smuzhiyun 1 /* reset intr timer */);
133*4882a593Smuzhiyun return IRQ_HANDLED;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun
fnic_isr_msix_err_notify(int irq,void * data)136*4882a593Smuzhiyun static irqreturn_t fnic_isr_msix_err_notify(int irq, void *data)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun struct fnic *fnic = data;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun fnic->fnic_stats.misc_stats.last_isr_time = jiffies;
141*4882a593Smuzhiyun atomic64_inc(&fnic->fnic_stats.misc_stats.isr_count);
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun vnic_intr_return_all_credits(&fnic->intr[FNIC_MSIX_ERR_NOTIFY]);
144*4882a593Smuzhiyun fnic_log_q_error(fnic);
145*4882a593Smuzhiyun fnic_handle_link_event(fnic);
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun return IRQ_HANDLED;
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
fnic_free_intr(struct fnic * fnic)150*4882a593Smuzhiyun void fnic_free_intr(struct fnic *fnic)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun int i;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun switch (vnic_dev_get_intr_mode(fnic->vdev)) {
155*4882a593Smuzhiyun case VNIC_DEV_INTR_MODE_INTX:
156*4882a593Smuzhiyun case VNIC_DEV_INTR_MODE_MSI:
157*4882a593Smuzhiyun free_irq(pci_irq_vector(fnic->pdev, 0), fnic);
158*4882a593Smuzhiyun break;
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun case VNIC_DEV_INTR_MODE_MSIX:
161*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(fnic->msix); i++)
162*4882a593Smuzhiyun if (fnic->msix[i].requested)
163*4882a593Smuzhiyun free_irq(pci_irq_vector(fnic->pdev, i),
164*4882a593Smuzhiyun fnic->msix[i].devid);
165*4882a593Smuzhiyun break;
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun default:
168*4882a593Smuzhiyun break;
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
fnic_request_intr(struct fnic * fnic)172*4882a593Smuzhiyun int fnic_request_intr(struct fnic *fnic)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun int err = 0;
175*4882a593Smuzhiyun int i;
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun switch (vnic_dev_get_intr_mode(fnic->vdev)) {
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun case VNIC_DEV_INTR_MODE_INTX:
180*4882a593Smuzhiyun err = request_irq(pci_irq_vector(fnic->pdev, 0),
181*4882a593Smuzhiyun &fnic_isr_legacy, IRQF_SHARED, DRV_NAME, fnic);
182*4882a593Smuzhiyun break;
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun case VNIC_DEV_INTR_MODE_MSI:
185*4882a593Smuzhiyun err = request_irq(pci_irq_vector(fnic->pdev, 0), &fnic_isr_msi,
186*4882a593Smuzhiyun 0, fnic->name, fnic);
187*4882a593Smuzhiyun break;
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun case VNIC_DEV_INTR_MODE_MSIX:
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun sprintf(fnic->msix[FNIC_MSIX_RQ].devname,
192*4882a593Smuzhiyun "%.11s-fcs-rq", fnic->name);
193*4882a593Smuzhiyun fnic->msix[FNIC_MSIX_RQ].isr = fnic_isr_msix_rq;
194*4882a593Smuzhiyun fnic->msix[FNIC_MSIX_RQ].devid = fnic;
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun sprintf(fnic->msix[FNIC_MSIX_WQ].devname,
197*4882a593Smuzhiyun "%.11s-fcs-wq", fnic->name);
198*4882a593Smuzhiyun fnic->msix[FNIC_MSIX_WQ].isr = fnic_isr_msix_wq;
199*4882a593Smuzhiyun fnic->msix[FNIC_MSIX_WQ].devid = fnic;
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun sprintf(fnic->msix[FNIC_MSIX_WQ_COPY].devname,
202*4882a593Smuzhiyun "%.11s-scsi-wq", fnic->name);
203*4882a593Smuzhiyun fnic->msix[FNIC_MSIX_WQ_COPY].isr = fnic_isr_msix_wq_copy;
204*4882a593Smuzhiyun fnic->msix[FNIC_MSIX_WQ_COPY].devid = fnic;
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun sprintf(fnic->msix[FNIC_MSIX_ERR_NOTIFY].devname,
207*4882a593Smuzhiyun "%.11s-err-notify", fnic->name);
208*4882a593Smuzhiyun fnic->msix[FNIC_MSIX_ERR_NOTIFY].isr =
209*4882a593Smuzhiyun fnic_isr_msix_err_notify;
210*4882a593Smuzhiyun fnic->msix[FNIC_MSIX_ERR_NOTIFY].devid = fnic;
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(fnic->msix); i++) {
213*4882a593Smuzhiyun err = request_irq(pci_irq_vector(fnic->pdev, i),
214*4882a593Smuzhiyun fnic->msix[i].isr, 0,
215*4882a593Smuzhiyun fnic->msix[i].devname,
216*4882a593Smuzhiyun fnic->msix[i].devid);
217*4882a593Smuzhiyun if (err) {
218*4882a593Smuzhiyun shost_printk(KERN_ERR, fnic->lport->host,
219*4882a593Smuzhiyun "MSIX: request_irq"
220*4882a593Smuzhiyun " failed %d\n", err);
221*4882a593Smuzhiyun fnic_free_intr(fnic);
222*4882a593Smuzhiyun break;
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun fnic->msix[i].requested = 1;
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun break;
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun default:
229*4882a593Smuzhiyun break;
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun return err;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
fnic_set_intr_mode(struct fnic * fnic)235*4882a593Smuzhiyun int fnic_set_intr_mode(struct fnic *fnic)
236*4882a593Smuzhiyun {
237*4882a593Smuzhiyun unsigned int n = ARRAY_SIZE(fnic->rq);
238*4882a593Smuzhiyun unsigned int m = ARRAY_SIZE(fnic->wq);
239*4882a593Smuzhiyun unsigned int o = ARRAY_SIZE(fnic->wq_copy);
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun /*
242*4882a593Smuzhiyun * Set interrupt mode (INTx, MSI, MSI-X) depending
243*4882a593Smuzhiyun * system capabilities.
244*4882a593Smuzhiyun *
245*4882a593Smuzhiyun * Try MSI-X first
246*4882a593Smuzhiyun *
247*4882a593Smuzhiyun * We need n RQs, m WQs, o Copy WQs, n+m+o CQs, and n+m+o+1 INTRs
248*4882a593Smuzhiyun * (last INTR is used for WQ/RQ errors and notification area)
249*4882a593Smuzhiyun */
250*4882a593Smuzhiyun if (fnic->rq_count >= n &&
251*4882a593Smuzhiyun fnic->raw_wq_count >= m &&
252*4882a593Smuzhiyun fnic->wq_copy_count >= o &&
253*4882a593Smuzhiyun fnic->cq_count >= n + m + o) {
254*4882a593Smuzhiyun int vecs = n + m + o + 1;
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun if (pci_alloc_irq_vectors(fnic->pdev, vecs, vecs,
257*4882a593Smuzhiyun PCI_IRQ_MSIX) == vecs) {
258*4882a593Smuzhiyun fnic->rq_count = n;
259*4882a593Smuzhiyun fnic->raw_wq_count = m;
260*4882a593Smuzhiyun fnic->wq_copy_count = o;
261*4882a593Smuzhiyun fnic->wq_count = m + o;
262*4882a593Smuzhiyun fnic->cq_count = n + m + o;
263*4882a593Smuzhiyun fnic->intr_count = vecs;
264*4882a593Smuzhiyun fnic->err_intr_offset = FNIC_MSIX_ERR_NOTIFY;
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun FNIC_ISR_DBG(KERN_DEBUG, fnic->lport->host,
267*4882a593Smuzhiyun "Using MSI-X Interrupts\n");
268*4882a593Smuzhiyun vnic_dev_set_intr_mode(fnic->vdev,
269*4882a593Smuzhiyun VNIC_DEV_INTR_MODE_MSIX);
270*4882a593Smuzhiyun return 0;
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun /*
275*4882a593Smuzhiyun * Next try MSI
276*4882a593Smuzhiyun * We need 1 RQ, 1 WQ, 1 WQ_COPY, 3 CQs, and 1 INTR
277*4882a593Smuzhiyun */
278*4882a593Smuzhiyun if (fnic->rq_count >= 1 &&
279*4882a593Smuzhiyun fnic->raw_wq_count >= 1 &&
280*4882a593Smuzhiyun fnic->wq_copy_count >= 1 &&
281*4882a593Smuzhiyun fnic->cq_count >= 3 &&
282*4882a593Smuzhiyun fnic->intr_count >= 1 &&
283*4882a593Smuzhiyun pci_alloc_irq_vectors(fnic->pdev, 1, 1, PCI_IRQ_MSI) == 1) {
284*4882a593Smuzhiyun fnic->rq_count = 1;
285*4882a593Smuzhiyun fnic->raw_wq_count = 1;
286*4882a593Smuzhiyun fnic->wq_copy_count = 1;
287*4882a593Smuzhiyun fnic->wq_count = 2;
288*4882a593Smuzhiyun fnic->cq_count = 3;
289*4882a593Smuzhiyun fnic->intr_count = 1;
290*4882a593Smuzhiyun fnic->err_intr_offset = 0;
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun FNIC_ISR_DBG(KERN_DEBUG, fnic->lport->host,
293*4882a593Smuzhiyun "Using MSI Interrupts\n");
294*4882a593Smuzhiyun vnic_dev_set_intr_mode(fnic->vdev, VNIC_DEV_INTR_MODE_MSI);
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun return 0;
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun /*
300*4882a593Smuzhiyun * Next try INTx
301*4882a593Smuzhiyun * We need 1 RQ, 1 WQ, 1 WQ_COPY, 3 CQs, and 3 INTRs
302*4882a593Smuzhiyun * 1 INTR is used for all 3 queues, 1 INTR for queue errors
303*4882a593Smuzhiyun * 1 INTR for notification area
304*4882a593Smuzhiyun */
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun if (fnic->rq_count >= 1 &&
307*4882a593Smuzhiyun fnic->raw_wq_count >= 1 &&
308*4882a593Smuzhiyun fnic->wq_copy_count >= 1 &&
309*4882a593Smuzhiyun fnic->cq_count >= 3 &&
310*4882a593Smuzhiyun fnic->intr_count >= 3) {
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun fnic->rq_count = 1;
313*4882a593Smuzhiyun fnic->raw_wq_count = 1;
314*4882a593Smuzhiyun fnic->wq_copy_count = 1;
315*4882a593Smuzhiyun fnic->cq_count = 3;
316*4882a593Smuzhiyun fnic->intr_count = 3;
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun FNIC_ISR_DBG(KERN_DEBUG, fnic->lport->host,
319*4882a593Smuzhiyun "Using Legacy Interrupts\n");
320*4882a593Smuzhiyun vnic_dev_set_intr_mode(fnic->vdev, VNIC_DEV_INTR_MODE_INTX);
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun return 0;
323*4882a593Smuzhiyun }
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun vnic_dev_set_intr_mode(fnic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun return -EINVAL;
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun
fnic_clear_intr_mode(struct fnic * fnic)330*4882a593Smuzhiyun void fnic_clear_intr_mode(struct fnic *fnic)
331*4882a593Smuzhiyun {
332*4882a593Smuzhiyun pci_free_irq_vectors(fnic->pdev);
333*4882a593Smuzhiyun vnic_dev_set_intr_mode(fnic->vdev, VNIC_DEV_INTR_MODE_INTX);
334*4882a593Smuzhiyun }
335*4882a593Smuzhiyun
336