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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/msm/
H A Dhdmi.txt1 Qualcomm adreno/snapdragon hdmi output
4 - compatible: one of the following
5 * "qcom,hdmi-tx-8996"
6 * "qcom,hdmi-tx-8994"
7 * "qcom,hdmi-tx-8084"
8 * "qcom,hdmi-tx-8974"
9 * "qcom,hdmi-tx-8660"
10 * "qcom,hdmi-tx-8960"
11 - reg: Physical base address and length of the controller's registers
12 - reg-names: "core_physical"
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/bridge/
H A Drenesas,dw-hdmi.txt1 Renesas Gen3 DWC HDMI TX Encoder
4 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
7 These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
9 following device-specific properties.
14 - compatible : Shall contain one or more of
15 - "renesas,r8a774a1-hdmi" for R8A774A1 (RZ/G2M) compatible HDMI TX
16 - "renesas,r8a774b1-hdmi" for R8A774B1 (RZ/G2N) compatible HDMI TX
17 - "renesas,r8a774e1-hdmi" for R8A774E1 (RZ/G2H) compatible HDMI TX
18 - "renesas,r8a7795-hdmi" for R8A7795 (R-Car H3) compatible HDMI TX
19 - "renesas,r8a7796-hdmi" for R8A7796 (R-Car M3-W) compatible HDMI TX
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H A Ddw_hdmi.txt1 Synopsys DesignWare HDMI TX Encoder
4 This document defines device tree properties for the Synopsys DesignWare HDMI
5 TX Encoder (DWC HDMI TX). It doesn't constitue a device tree binding
6 specification by itself but is meant to be referenced by platform-specific
13 - reg: Memory mapped base address and length of the DWC HDMI TX registers.
15 - reg-io-width: Width of the registers specified by the reg property. The
19 - interrupts: Reference to the DWC HDMI TX interrupt.
21 - clocks: References to all the clocks specified in the clock-names property
22 as specified in Documentation/devicetree/bindings/clock/clock-bindings.txt.
24 - clock-names: The DWC HDMI TX uses the following clocks.
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/hdmi/
H A Dhdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <sound/hdmi-codec.h>
12 #include "hdmi.h"
14 void msm_hdmi_set_mode(struct hdmi *hdmi, bool power_on) in msm_hdmi_set_mode() argument
19 spin_lock_irqsave(&hdmi->reg_lock, flags); in msm_hdmi_set_mode()
22 if (!hdmi->hdmi_mode) { in msm_hdmi_set_mode()
24 hdmi_write(hdmi, REG_HDMI_CTRL, ctrl); in msm_hdmi_set_mode()
33 hdmi_write(hdmi, REG_HDMI_CTRL, ctrl); in msm_hdmi_set_mode()
34 spin_unlock_irqrestore(&hdmi->reg_lock, flags); in msm_hdmi_set_mode()
35 DBG("HDMI Core: %s, HDMI_CTRL=0x%08x", in msm_hdmi_set_mode()
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/
H A Dallwinner,sun4i-a10-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 HDMI Controller Device Tree Bindings
10 The HDMI Encoder supports the HDMI video and audio outputs, and does
14 - Chen-Yu Tsai <wens@csie.org>
15 - Maxime Ripard <mripard@kernel.org>
20 - const: allwinner,sun4i-a10-hdmi
21 - const: allwinner,sun5i-a10s-hdmi
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H A Dallwinner,sun8i-a83t-dw-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A83t DWC HDMI TX Encoder Device Tree Bindings
10 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller
14 These DT bindings follow the Synopsys DWC HDMI TX bindings defined
16 the following device-specific properties.
19 - Chen-Yu Tsai <wens@csie.org>
20 - Maxime Ripard <mripard@kernel.org>
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H A Damlogic,meson-dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/display/amlogic,meson-dw-hdmi.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Amlogic specific extensions to the Synopsys Designware HDMI Controller
11 - Neil Armstrong <narmstrong@baylibre.com>
14 - $ref: /schemas/sound/name-prefix.yaml#
18 - A Synopsys DesignWare HDMI Controller IP
19 - A TOP control block controlling the Clocks and PHY
20 - A custom HDMI PHY in order to convert video to TMDS signal
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H A Damlogic,meson-vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Neil Armstrong <narmstrong@baylibre.com>
17 DMC|---------------VPU (Video Processing Unit)----------------|------HHI------|
19 D |-------| |----| | | | | HDMI PLL |
20 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |
21 R |-------| |----| Processing | | | | |
22 | osd2 | | | |---| Enci ----------|----|-----VDAC------|
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/imx/
H A Dhdmi.txt1 Freescale i.MX6 DWC HDMI TX Encoder
4 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
7 These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
9 following device-specific properties.
14 - compatible : Shall be one of "fsl,imx6q-hdmi" or "fsl,imx6dl-hdmi".
15 - reg: See dw_hdmi.txt.
16 - interrupts: HDMI interrupt number
17 - clocks: See dw_hdmi.txt.
18 - clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
19 - ports: See dw_hdmi.txt. The DWC HDMI shall have between one and four ports,
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/rockchip/
H A Ddw_hdmi-rockchip.txt1 Rockchip DWC HDMI TX Encoder
4 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
7 These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
9 following device-specific properties.
14 - compatible: should be one of the following:
15 "rockchip,rk3228-dw-hdmi"
16 "rockchip,rk3288-dw-hdmi"
17 "rockchip,rk3328-dw-hdmi"
18 "rockchip,rk3368-dw-hdmi"
19 "rockchip,rk3399-dw-hdmi"
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/OK3568_Linux_fs/kernel/drivers/media/i2c/adv748x/
H A Dadv748x-csi2.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for Analog Devices ADV748X CSI-2 Transmitter
11 #include <media/v4l2-ctrls.h>
12 #include <media/v4l2-device.h>
13 #include <media/v4l2-ioctl.h>
17 static int adv748x_csi2_set_virtual_channel(struct adv748x_csi2 *tx, in adv748x_csi2_set_virtual_channel() argument
20 return tx_write(tx, ADV748X_CSI_VC_REF, vc << ADV748X_CSI_VC_REF_SHIFT); in adv748x_csi2_set_virtual_channel()
26 * @tx: CSI2 private entity
29 * @src_pad: Pad number of source to link to this @tx
35 static int adv748x_csi2_register_link(struct adv748x_csi2 *tx, in adv748x_csi2_register_link() argument
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H A Dadv748x-core.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for Analog Devices ADV748X HDMI receiver with AFE
21 #include <linux/v4l2-dv-timings.h>
23 #include <media/v4l2-ctrls.h>
24 #include <media/v4l2-device.h>
25 #include <media/v4l2-dv-timings.h>
26 #include <media/v4l2-fwnode.h>
27 #include <media/v4l2-ioctl.h>
31 /* -----------------------------------------------------------------------------
48 ADV748X_REGMAP_CONF("hdmi"),
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H A Dadv748x-hdmi.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for Analog Devices ADV748X HDMI receiver and Component Processor (CP)
11 #include <media/v4l2-ctrls.h>
12 #include <media/v4l2-device.h>
13 #include <media/v4l2-dv-timings.h>
14 #include <media/v4l2-ioctl.h>
16 #include <uapi/linux/v4l2-dv-timings.h>
20 /* -----------------------------------------------------------------------------
21 * HDMI and CP
29 /* V4L2_DV_BT_CEA_720X480I59_94 - 0.5 MHz */
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H A Dadv748x.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Driver for Analog Devices ADV748X video decoder and HDMI receiver
14 * Analog HDMI MHL 4-Lane 1-Lane
46 * enum adv748x_ports - Device tree port number definitions
73 /* CSI2 transmitters can have 2 internal connections, HDMI/AFE */
94 #define is_tx_enabled(_tx) ((_tx)->state->endpoints[(_tx)->port] != NULL)
95 #define is_txa(_tx) ((_tx) == &(_tx)->state->txa)
96 #define is_txb(_tx) ((_tx) == &(_tx)->state->txb)
100 ((_state)->endpoints[ADV748X_PORT_AIN0] != NULL || \
101 (_state)->endpoints[ADV748X_PORT_AIN1] != NULL || \
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/OK3568_Linux_fs/kernel/sound/soc/qcom/
H A Dlpass.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2010-2011,2013-2015,2020 The Linux Foundation. All rights reserved.
5 * lpass.h - Definitions for the QTi LPASS
15 #include <dt-bindings/sound/qcom,lpass.h>
16 #include "lpass-hdmi.h"
27 return -EINVAL; \
58 /* AHB-I/X bus clocks inside the low-power audio subsystem (LPASS) */
76 /* low-power audio interface (LPAIF) registers */
80 /* regmap backed by the low-power audio interface (LPAIF) registers */
84 /* interrupts from the low-power audio interface (LPAIF) */
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/sun4i/
H A Dsun4i_hdmi_i2c.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
25 static int fifo_transfer(struct sun4i_hdmi *hdmi, u8 *buf, int len, bool read) in fifo_transfer() argument
41 (hdmi->variant->ddc_fifo_thres_incl ? 0 : 1); in fifo_transfer()
45 * For TX the threshold is for an empty FIFO. in fifo_transfer()
50 if (regmap_field_read_poll_timeout(hdmi->field_ddc_int_status, reg, in fifo_transfer()
53 return -ETIMEDOUT; in fifo_transfer()
56 return -EIO; in fifo_transfer()
59 readsb(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len); in fifo_transfer()
61 writesb(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len); in fifo_transfer()
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/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxbb-odroidc2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "meson-gxbb.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
14 compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
15 model = "Hardkernel ODROID-C2";
23 stdout-path = "serial0:115200n8";
31 usb_otg_pwr: regulator-usb-pwrs {
32 compatible = "regulator-fixed";
34 regulator-name = "USB_OTG_PWR";
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H A Dmeson-gxbb-nanopi-k2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-gxbb.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
12 compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb";
21 stdout-path = "serial0:115200n8";
30 compatible = "gpio-leds";
32 led-stat {
33 label = "nanopi-k2:blue:stat";
35 default-state = "on";
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H A Dmeson-g12b-gtking.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "meson-g12b-w400.dtsi"
11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
15 model = "Beelink GT-King";
17 spdif_dit: audio-codec-1 {
18 #sound-dai-cells = <0>;
19 compatible = "linux,spdif-dit";
21 sound-name-prefix = "DIT";
25 compatible = "amlogic,axg-sound-card";
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/meson/
H A Dmeson_dw_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
25 #include <linux/media-bus-format.h>
34 #define DRIVER_NAME "meson-dw-hdmi"
35 #define DRIVER_DESC "Amlogic Meson HDMI-TX DRM driver"
38 * DOC: HDMI Output
40 * HDMI Output is composed of :
42 * - A Synopsys DesignWare HDMI Controller IP
43 * - A TOP control block controlling the Clocks and PHY
44 * - A custom HDMI PHY in order convert video to TMDS signal
49 * | HDMI TOP |<= HPD
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/media/i2c/
H A Drk628.txt1 * RK628 HDMI-RX to MIPI CSI2-TX Bridge
3 The RK628 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts
4 a HDMI stream to MIPI CSI-2 TX. It is programmable through I2C.
7 - compatible: value should be "rockchip,rk628-csi-v4l2"
8 - reg: I2C device address
11 - reset-gpios: gpio phandle GPIO connected to the reset pin
12 - enable-gpios: a GPIO spec for the enable pin
13 - plugin-det-gpios: HDMI 5V detect pin
14 - interrupts: GPIO connected to the interrupt pin
15 - data-lanes: should be <1 2 3 4> for four-lane operation,
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,hdmi.txt1 Mediatek HDMI Encoder
4 The Mediatek HDMI encoder can generate HDMI 1.4a or MHL 2.0 signals from
8 - compatible: Should be "mediatek,<chip>-hdmi".
9 - the supported chips are mt2701, mt7623 and mt8173
10 - reg: Physical base address and length of the controller's registers
11 - interrupts: The interrupt signal from the function block.
12 - clocks: device clocks
13 See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
14 - clock-names: must contain "pixel", "pll", "bclk", and "spdif".
15 - phys: phandle link to the HDMI PHY node.
[all …]
/OK3568_Linux_fs/kernel/sound/soc/intel/boards/
H A Dkbl_da7219_max98357a.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright(c) 2017-18 Intel Corporation.
22 #include "../../codecs/da7219-aad.h"
24 #define KBL_DIALOG_CODEC_DAI "da7219-hifi"
56 struct snd_soc_dapm_context *dapm = w->dapm; in platform_clock_control()
57 struct snd_soc_card *card = dapm->card; in platform_clock_control()
63 dev_err(card->dev, "Codec dai not found; Unable to set/unset codec pll\n"); in platform_clock_control()
64 return -EIO; in platform_clock_control()
71 dev_err(card->dev, "failed to stop PLL: %d\n", ret); in platform_clock_control()
76 dev_err(card->dev, "failed to start PLL: %d\n", ret); in platform_clock_control()
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H A Dbxt_rt298.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Intel Broxton-P I2S Machine Driver
5 * Copyright (C) 2014-2016, Intel Corporation. All rights reserved.
16 #include <sound/soc-acpi.h>
81 /* HP jack connectors - unknown if we have jack detect */
91 {"HDMI1", NULL, "hif5-0 Output"},
92 {"HDMI2", NULL, "hif6-0 Output"},
93 {"HDMI2", NULL, "hif7-0 Output"},
96 { "AIF1 Playback", NULL, "ssp5 Tx"},
97 { "ssp5 Tx", NULL, "codec0_out"},
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/OK3568_Linux_fs/u-boot/drivers/video/
H A Ddw_hdmi.c6 * SPDX-License-Identifier: GPL-2.0+
56 static void hdmi_write(struct dw_hdmi *hdmi, u8 val, int offset) in hdmi_write() argument
58 switch (hdmi->reg_io_width) { in hdmi_write()
60 writeb(val, hdmi->ioaddr + offset); in hdmi_write()
63 writel(val, hdmi->ioaddr + (offset << 2)); in hdmi_write()
71 static u8 hdmi_read(struct dw_hdmi *hdmi, int offset) in hdmi_read() argument
73 switch (hdmi->reg_io_width) { in hdmi_read()
75 return readb(hdmi->ioaddr + offset); in hdmi_read()
77 return readl(hdmi->ioaddr + (offset << 2)); in hdmi_read()
86 static void hdmi_mod(struct dw_hdmi *hdmi, unsigned reg, u8 mask, u8 data) in hdmi_mod() argument
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