1*4882a593SmuzhiyunSynopsys DesignWare HDMI TX Encoder 2*4882a593Smuzhiyun=================================== 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunThis document defines device tree properties for the Synopsys DesignWare HDMI 5*4882a593SmuzhiyunTX Encoder (DWC HDMI TX). It doesn't constitue a device tree binding 6*4882a593Smuzhiyunspecification by itself but is meant to be referenced by platform-specific 7*4882a593Smuzhiyundevice tree bindings. 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunWhen referenced from platform device tree bindings the properties defined in 10*4882a593Smuzhiyunthis document are defined as follows. The platform device tree bindings are 11*4882a593Smuzhiyunresponsible for defining whether each property is required or optional. 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun- reg: Memory mapped base address and length of the DWC HDMI TX registers. 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun- reg-io-width: Width of the registers specified by the reg property. The 16*4882a593Smuzhiyun value is expressed in bytes and must be equal to 1 or 4 if specified. The 17*4882a593Smuzhiyun register width defaults to 1 if the property is not present. 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun- interrupts: Reference to the DWC HDMI TX interrupt. 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun- clocks: References to all the clocks specified in the clock-names property 22*4882a593Smuzhiyun as specified in Documentation/devicetree/bindings/clock/clock-bindings.txt. 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun- clock-names: The DWC HDMI TX uses the following clocks. 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun - "iahb" is the bus clock for either AHB and APB (mandatory). 27*4882a593Smuzhiyun - "isfr" is the internal register configuration clock (mandatory). 28*4882a593Smuzhiyun - "cec" is the HDMI CEC controller main clock (optional). 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun- ports: The connectivity of the DWC HDMI TX with the rest of the system is 31*4882a593Smuzhiyun expressed in using ports as specified in the device graph bindings defined 32*4882a593Smuzhiyun in Documentation/devicetree/bindings/graph.txt. The numbering of the ports 33*4882a593Smuzhiyun is platform-specific. 34