Searched full:emc_mrs_wait_cnt (Results 1 – 8 of 8) sorted by relevance
412 0x000c000c /* EMC_MRS_WAIT_CNT */516 0x000c000c /* EMC_MRS_WAIT_CNT */620 0x000c000c /* EMC_MRS_WAIT_CNT */724 0x000c000c /* EMC_MRS_WAIT_CNT */826 0x018b000c /* EMC_MRS_WAIT_CNT */929 0x0156000c /* EMC_MRS_WAIT_CNT */1037 0x000c000c /* EMC_MRS_WAIT_CNT */1141 0x000c000c /* EMC_MRS_WAIT_CNT */1245 0x000c000c /* EMC_MRS_WAIT_CNT */1349 0x000c000c /* EMC_MRS_WAIT_CNT */[all …]
107 0x0156000c /* EMC_MRS_WAIT_CNT */211 0x018b000c /* EMC_MRS_WAIT_CNT */314 0x0155000c /* EMC_MRS_WAIT_CNT */
84 #define EMC_MRS_WAIT_CNT 0xc8 macro456 u32 emc_mrs_wait_cnt; member702 val = (timing->emc_mrs_wait_cnt in tegra_emc_prepare_timing_change()708 val = timing->emc_mrs_wait_cnt in tegra_emc_prepare_timing_change()713 writel(val, emc->regs + EMC_MRS_WAIT_CNT); in tegra_emc_prepare_timing_change()929 EMC_READ_PROP(emc_mrs_wait_cnt, "nvidia,emc-mrs-wait-cnt") in load_one_timing_from_dt()
74 #define EMC_MRS_WAIT_CNT 0x0c8 macro303 [82] = EMC_MRS_WAIT_CNT,621 writel_relaxed(val, emc->regs + EMC_MRS_WAIT_CNT); in emc_prepare_timing_change()
76 #define EMC_MRS_WAIT_CNT 0xc8 macro
1033 } else if (offset == EMC_MRS_WAIT_CNT && in tegra210_emc_r21021_set_clock()1694 EMC_MRS_WAIT_CNT); in tegra210_emc_r21021_set_clock()
238 EMC_MRS_WAIT_CNT,
187 - description: EMC_MRS_WAIT_CNT326 0x0155000c /* EMC_MRS_WAIT_CNT */