1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun/ { 4*4882a593Smuzhiyun memory-controller@7000f000 { 5*4882a593Smuzhiyun emc-timings-0 { 6*4882a593Smuzhiyun nvidia,ram-code = <0>; /* Elpida EDJ2108EDBG-DJL-F */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun timing-25500000 { 9*4882a593Smuzhiyun clock-frequency = <25500000>; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun nvidia,emem-configuration = < 12*4882a593Smuzhiyun 0x00020001 /* MC_EMEM_ARB_CFG */ 13*4882a593Smuzhiyun 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 14*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 15*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 16*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 17*4882a593Smuzhiyun 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 18*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */ 19*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 20*4882a593Smuzhiyun 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 21*4882a593Smuzhiyun 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 22*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 23*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */ 24*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */ 25*4882a593Smuzhiyun 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 26*4882a593Smuzhiyun 0x06020102 /* MC_EMEM_ARB_DA_TURNS */ 27*4882a593Smuzhiyun 0x000a0502 /* MC_EMEM_ARB_DA_COVERS */ 28*4882a593Smuzhiyun 0x74830303 /* MC_EMEM_ARB_MISC0 */ 29*4882a593Smuzhiyun 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 30*4882a593Smuzhiyun >; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun timing-51000000 { 34*4882a593Smuzhiyun clock-frequency = <51000000>; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun nvidia,emem-configuration = < 37*4882a593Smuzhiyun 0x00010001 /* MC_EMEM_ARB_CFG */ 38*4882a593Smuzhiyun 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 39*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 40*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 41*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 42*4882a593Smuzhiyun 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 43*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */ 44*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 45*4882a593Smuzhiyun 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 46*4882a593Smuzhiyun 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 47*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 48*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */ 49*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */ 50*4882a593Smuzhiyun 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 51*4882a593Smuzhiyun 0x06020102 /* MC_EMEM_ARB_DA_TURNS */ 52*4882a593Smuzhiyun 0x000a0502 /* MC_EMEM_ARB_DA_COVERS */ 53*4882a593Smuzhiyun 0x73430303 /* MC_EMEM_ARB_MISC0 */ 54*4882a593Smuzhiyun 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 55*4882a593Smuzhiyun >; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun timing-102000000 { 59*4882a593Smuzhiyun clock-frequency = <102000000>; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun nvidia,emem-configuration = < 62*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_CFG */ 63*4882a593Smuzhiyun 0xc0000030 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 64*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 65*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 66*4882a593Smuzhiyun 0x00000003 /* MC_EMEM_ARB_TIMING_RC */ 67*4882a593Smuzhiyun 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 68*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */ 69*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 70*4882a593Smuzhiyun 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 71*4882a593Smuzhiyun 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 72*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 73*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */ 74*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */ 75*4882a593Smuzhiyun 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 76*4882a593Smuzhiyun 0x06020102 /* MC_EMEM_ARB_DA_TURNS */ 77*4882a593Smuzhiyun 0x000a0503 /* MC_EMEM_ARB_DA_COVERS */ 78*4882a593Smuzhiyun 0x72830504 /* MC_EMEM_ARB_MISC0 */ 79*4882a593Smuzhiyun 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 80*4882a593Smuzhiyun >; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun timing-204000000 { 84*4882a593Smuzhiyun clock-frequency = <204000000>; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun nvidia,emem-configuration = < 87*4882a593Smuzhiyun 0x00000003 /* MC_EMEM_ARB_CFG */ 88*4882a593Smuzhiyun 0xc0000025 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 89*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 90*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 91*4882a593Smuzhiyun 0x00000005 /* MC_EMEM_ARB_TIMING_RC */ 92*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_RAS */ 93*4882a593Smuzhiyun 0x00000003 /* MC_EMEM_ARB_TIMING_FAW */ 94*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 95*4882a593Smuzhiyun 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 96*4882a593Smuzhiyun 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 97*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 98*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */ 99*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */ 100*4882a593Smuzhiyun 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 101*4882a593Smuzhiyun 0x06020102 /* MC_EMEM_ARB_DA_TURNS */ 102*4882a593Smuzhiyun 0x000a0505 /* MC_EMEM_ARB_DA_COVERS */ 103*4882a593Smuzhiyun 0x72440a06 /* MC_EMEM_ARB_MISC0 */ 104*4882a593Smuzhiyun 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 105*4882a593Smuzhiyun >; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun timing-333500000 { 109*4882a593Smuzhiyun clock-frequency = <333500000>; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun nvidia,emem-configuration = < 112*4882a593Smuzhiyun 0x00000005 /* MC_EMEM_ARB_CFG */ 113*4882a593Smuzhiyun 0xc000003d /* MC_EMEM_ARB_OUTSTANDING_REQ */ 114*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 115*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_RP */ 116*4882a593Smuzhiyun 0x00000008 /* MC_EMEM_ARB_TIMING_RC */ 117*4882a593Smuzhiyun 0x00000004 /* MC_EMEM_ARB_TIMING_RAS */ 118*4882a593Smuzhiyun 0x00000004 /* MC_EMEM_ARB_TIMING_FAW */ 119*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 120*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 121*4882a593Smuzhiyun 0x00000007 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 122*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 123*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 124*4882a593Smuzhiyun 0x00000003 /* MC_EMEM_ARB_TIMING_R2W */ 125*4882a593Smuzhiyun 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 126*4882a593Smuzhiyun 0x06030202 /* MC_EMEM_ARB_DA_TURNS */ 127*4882a593Smuzhiyun 0x000b0608 /* MC_EMEM_ARB_DA_COVERS */ 128*4882a593Smuzhiyun 0x70850f09 /* MC_EMEM_ARB_MISC0 */ 129*4882a593Smuzhiyun 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 130*4882a593Smuzhiyun >; 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun timing-667000000 { 134*4882a593Smuzhiyun clock-frequency = <667000000>; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun nvidia,emem-configuration = < 137*4882a593Smuzhiyun 0x0000000a /* MC_EMEM_ARB_CFG */ 138*4882a593Smuzhiyun 0xc0000079 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 139*4882a593Smuzhiyun 0x00000003 /* MC_EMEM_ARB_TIMING_RCD */ 140*4882a593Smuzhiyun 0x00000004 /* MC_EMEM_ARB_TIMING_RP */ 141*4882a593Smuzhiyun 0x00000010 /* MC_EMEM_ARB_TIMING_RC */ 142*4882a593Smuzhiyun 0x0000000b /* MC_EMEM_ARB_TIMING_RAS */ 143*4882a593Smuzhiyun 0x0000000a /* MC_EMEM_ARB_TIMING_FAW */ 144*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 145*4882a593Smuzhiyun 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 146*4882a593Smuzhiyun 0x0000000b /* MC_EMEM_ARB_TIMING_WAP2PRE */ 147*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 148*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 149*4882a593Smuzhiyun 0x00000004 /* MC_EMEM_ARB_TIMING_R2W */ 150*4882a593Smuzhiyun 0x00000008 /* MC_EMEM_ARB_TIMING_W2R */ 151*4882a593Smuzhiyun 0x08040202 /* MC_EMEM_ARB_DA_TURNS */ 152*4882a593Smuzhiyun 0x00130b10 /* MC_EMEM_ARB_DA_COVERS */ 153*4882a593Smuzhiyun 0x70ea1f11 /* MC_EMEM_ARB_MISC0 */ 154*4882a593Smuzhiyun 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 155*4882a593Smuzhiyun >; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun emc-timings-1 { 160*4882a593Smuzhiyun nvidia,ram-code = <1>; /* Hynix H5TC2G83CFR */ 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun timing-25500000 { 163*4882a593Smuzhiyun clock-frequency = <25500000>; 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun nvidia,emem-configuration = < 166*4882a593Smuzhiyun 0x00020001 /* MC_EMEM_ARB_CFG */ 167*4882a593Smuzhiyun 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 168*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 169*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 170*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 171*4882a593Smuzhiyun 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 172*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */ 173*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 174*4882a593Smuzhiyun 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 175*4882a593Smuzhiyun 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 176*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 177*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */ 178*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */ 179*4882a593Smuzhiyun 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 180*4882a593Smuzhiyun 0x06020102 /* MC_EMEM_ARB_DA_TURNS */ 181*4882a593Smuzhiyun 0x000a0502 /* MC_EMEM_ARB_DA_COVERS */ 182*4882a593Smuzhiyun 0x74830303 /* MC_EMEM_ARB_MISC0 */ 183*4882a593Smuzhiyun 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 184*4882a593Smuzhiyun >; 185*4882a593Smuzhiyun }; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun timing-51000000 { 188*4882a593Smuzhiyun clock-frequency = <51000000>; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun nvidia,emem-configuration = < 191*4882a593Smuzhiyun 0x00010001 /* MC_EMEM_ARB_CFG */ 192*4882a593Smuzhiyun 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 193*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 194*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 195*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 196*4882a593Smuzhiyun 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 197*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */ 198*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 199*4882a593Smuzhiyun 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 200*4882a593Smuzhiyun 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 201*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 202*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */ 203*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */ 204*4882a593Smuzhiyun 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 205*4882a593Smuzhiyun 0x06020102 /* MC_EMEM_ARB_DA_TURNS */ 206*4882a593Smuzhiyun 0x000a0502 /* MC_EMEM_ARB_DA_COVERS */ 207*4882a593Smuzhiyun 0x73430303 /* MC_EMEM_ARB_MISC0 */ 208*4882a593Smuzhiyun 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 209*4882a593Smuzhiyun >; 210*4882a593Smuzhiyun }; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun timing-102000000 { 213*4882a593Smuzhiyun clock-frequency = <102000000>; 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun nvidia,emem-configuration = < 216*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_CFG */ 217*4882a593Smuzhiyun 0xc0000030 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 218*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 219*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 220*4882a593Smuzhiyun 0x00000003 /* MC_EMEM_ARB_TIMING_RC */ 221*4882a593Smuzhiyun 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 222*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */ 223*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 224*4882a593Smuzhiyun 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 225*4882a593Smuzhiyun 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 226*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 227*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */ 228*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */ 229*4882a593Smuzhiyun 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 230*4882a593Smuzhiyun 0x06020102 /* MC_EMEM_ARB_DA_TURNS */ 231*4882a593Smuzhiyun 0x000a0503 /* MC_EMEM_ARB_DA_COVERS */ 232*4882a593Smuzhiyun 0x72830504 /* MC_EMEM_ARB_MISC0 */ 233*4882a593Smuzhiyun 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 234*4882a593Smuzhiyun >; 235*4882a593Smuzhiyun }; 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun timing-204000000 { 238*4882a593Smuzhiyun clock-frequency = <204000000>; 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun nvidia,emem-configuration = < 241*4882a593Smuzhiyun 0x00000003 /* MC_EMEM_ARB_CFG */ 242*4882a593Smuzhiyun 0xc0000025 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 243*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 244*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 245*4882a593Smuzhiyun 0x00000005 /* MC_EMEM_ARB_TIMING_RC */ 246*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_RAS */ 247*4882a593Smuzhiyun 0x00000003 /* MC_EMEM_ARB_TIMING_FAW */ 248*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 249*4882a593Smuzhiyun 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 250*4882a593Smuzhiyun 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 251*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 252*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */ 253*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */ 254*4882a593Smuzhiyun 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 255*4882a593Smuzhiyun 0x06020102 /* MC_EMEM_ARB_DA_TURNS */ 256*4882a593Smuzhiyun 0x000a0505 /* MC_EMEM_ARB_DA_COVERS */ 257*4882a593Smuzhiyun 0x72440a06 /* MC_EMEM_ARB_MISC0 */ 258*4882a593Smuzhiyun 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 259*4882a593Smuzhiyun >; 260*4882a593Smuzhiyun }; 261*4882a593Smuzhiyun 262*4882a593Smuzhiyun timing-333500000 { 263*4882a593Smuzhiyun clock-frequency = <333500000>; 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun nvidia,emem-configuration = < 266*4882a593Smuzhiyun 0x00000005 /* MC_EMEM_ARB_CFG */ 267*4882a593Smuzhiyun 0xc000003d /* MC_EMEM_ARB_OUTSTANDING_REQ */ 268*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 269*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_RP */ 270*4882a593Smuzhiyun 0x00000008 /* MC_EMEM_ARB_TIMING_RC */ 271*4882a593Smuzhiyun 0x00000004 /* MC_EMEM_ARB_TIMING_RAS */ 272*4882a593Smuzhiyun 0x00000004 /* MC_EMEM_ARB_TIMING_FAW */ 273*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 274*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 275*4882a593Smuzhiyun 0x00000007 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 276*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 277*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 278*4882a593Smuzhiyun 0x00000003 /* MC_EMEM_ARB_TIMING_R2W */ 279*4882a593Smuzhiyun 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 280*4882a593Smuzhiyun 0x06030202 /* MC_EMEM_ARB_DA_TURNS */ 281*4882a593Smuzhiyun 0x000b0608 /* MC_EMEM_ARB_DA_COVERS */ 282*4882a593Smuzhiyun 0x70850f09 /* MC_EMEM_ARB_MISC0 */ 283*4882a593Smuzhiyun 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 284*4882a593Smuzhiyun >; 285*4882a593Smuzhiyun }; 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun timing-667000000 { 288*4882a593Smuzhiyun clock-frequency = <667000000>; 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun nvidia,emem-configuration = < 291*4882a593Smuzhiyun 0x0000000a /* MC_EMEM_ARB_CFG */ 292*4882a593Smuzhiyun 0xc0000079 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 293*4882a593Smuzhiyun 0x00000003 /* MC_EMEM_ARB_TIMING_RCD */ 294*4882a593Smuzhiyun 0x00000004 /* MC_EMEM_ARB_TIMING_RP */ 295*4882a593Smuzhiyun 0x00000010 /* MC_EMEM_ARB_TIMING_RC */ 296*4882a593Smuzhiyun 0x0000000b /* MC_EMEM_ARB_TIMING_RAS */ 297*4882a593Smuzhiyun 0x0000000a /* MC_EMEM_ARB_TIMING_FAW */ 298*4882a593Smuzhiyun 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 299*4882a593Smuzhiyun 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 300*4882a593Smuzhiyun 0x0000000b /* MC_EMEM_ARB_TIMING_WAP2PRE */ 301*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 302*4882a593Smuzhiyun 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 303*4882a593Smuzhiyun 0x00000004 /* MC_EMEM_ARB_TIMING_R2W */ 304*4882a593Smuzhiyun 0x00000008 /* MC_EMEM_ARB_TIMING_W2R */ 305*4882a593Smuzhiyun 0x08040202 /* MC_EMEM_ARB_DA_TURNS */ 306*4882a593Smuzhiyun 0x00130b10 /* MC_EMEM_ARB_DA_COVERS */ 307*4882a593Smuzhiyun 0x70ea1f11 /* MC_EMEM_ARB_MISC0 */ 308*4882a593Smuzhiyun 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 309*4882a593Smuzhiyun >; 310*4882a593Smuzhiyun }; 311*4882a593Smuzhiyun }; 312*4882a593Smuzhiyun }; 313*4882a593Smuzhiyun 314*4882a593Smuzhiyun memory-controller@7000f400 { 315*4882a593Smuzhiyun emc-timings-0 { 316*4882a593Smuzhiyun nvidia,ram-code = <0>; /* Elpida EDJ2108EDBG-DJL-F */ 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun timing-25500000 { 319*4882a593Smuzhiyun clock-frequency = <25500000>; 320*4882a593Smuzhiyun 321*4882a593Smuzhiyun nvidia,emc-auto-cal-interval = <0x001fffff>; 322*4882a593Smuzhiyun nvidia,emc-mode-1 = <0x80100003>; 323*4882a593Smuzhiyun nvidia,emc-mode-2 = <0x80200008>; 324*4882a593Smuzhiyun nvidia,emc-mode-reset = <0x80001221>; 325*4882a593Smuzhiyun nvidia,emc-zcal-cnt-long = <0x00000040>; 326*4882a593Smuzhiyun nvidia,emc-cfg-dyn-self-ref; 327*4882a593Smuzhiyun nvidia,emc-cfg-periodic-qrst; 328*4882a593Smuzhiyun 329*4882a593Smuzhiyun nvidia,emc-configuration = < 330*4882a593Smuzhiyun 0x00000001 /* EMC_RC */ 331*4882a593Smuzhiyun 0x00000004 /* EMC_RFC */ 332*4882a593Smuzhiyun 0x00000000 /* EMC_RAS */ 333*4882a593Smuzhiyun 0x00000000 /* EMC_RP */ 334*4882a593Smuzhiyun 0x00000002 /* EMC_R2W */ 335*4882a593Smuzhiyun 0x0000000a /* EMC_W2R */ 336*4882a593Smuzhiyun 0x00000005 /* EMC_R2P */ 337*4882a593Smuzhiyun 0x0000000b /* EMC_W2P */ 338*4882a593Smuzhiyun 0x00000000 /* EMC_RD_RCD */ 339*4882a593Smuzhiyun 0x00000000 /* EMC_WR_RCD */ 340*4882a593Smuzhiyun 0x00000003 /* EMC_RRD */ 341*4882a593Smuzhiyun 0x00000001 /* EMC_REXT */ 342*4882a593Smuzhiyun 0x00000000 /* EMC_WEXT */ 343*4882a593Smuzhiyun 0x00000005 /* EMC_WDV */ 344*4882a593Smuzhiyun 0x00000005 /* EMC_QUSE */ 345*4882a593Smuzhiyun 0x00000004 /* EMC_QRST */ 346*4882a593Smuzhiyun 0x0000000a /* EMC_QSAFE */ 347*4882a593Smuzhiyun 0x0000000b /* EMC_RDV */ 348*4882a593Smuzhiyun 0x000000c0 /* EMC_REFRESH */ 349*4882a593Smuzhiyun 0x00000000 /* EMC_BURST_REFRESH_NUM */ 350*4882a593Smuzhiyun 0x00000030 /* EMC_PRE_REFRESH_REQ_CNT */ 351*4882a593Smuzhiyun 0x00000002 /* EMC_PDEX2WR */ 352*4882a593Smuzhiyun 0x00000002 /* EMC_PDEX2RD */ 353*4882a593Smuzhiyun 0x00000001 /* EMC_PCHG2PDEN */ 354*4882a593Smuzhiyun 0x00000000 /* EMC_ACT2PDEN */ 355*4882a593Smuzhiyun 0x00000007 /* EMC_AR2PDEN */ 356*4882a593Smuzhiyun 0x0000000f /* EMC_RW2PDEN */ 357*4882a593Smuzhiyun 0x00000005 /* EMC_TXSR */ 358*4882a593Smuzhiyun 0x00000005 /* EMC_TXSRDLL */ 359*4882a593Smuzhiyun 0x00000004 /* EMC_TCKE */ 360*4882a593Smuzhiyun 0x00000001 /* EMC_TFAW */ 361*4882a593Smuzhiyun 0x00000000 /* EMC_TRPAB */ 362*4882a593Smuzhiyun 0x00000004 /* EMC_TCLKSTABLE */ 363*4882a593Smuzhiyun 0x00000005 /* EMC_TCLKSTOP */ 364*4882a593Smuzhiyun 0x000000c7 /* EMC_TREFBW */ 365*4882a593Smuzhiyun 0x00000006 /* EMC_QUSE_EXTRA */ 366*4882a593Smuzhiyun 0x00000004 /* EMC_FBIO_CFG6 */ 367*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_WRITE */ 368*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_READ */ 369*4882a593Smuzhiyun 0x00004288 /* EMC_FBIO_CFG5 */ 370*4882a593Smuzhiyun 0x007800a4 /* EMC_CFG_DIG_DLL */ 371*4882a593Smuzhiyun 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 372*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS0 */ 373*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS1 */ 374*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS2 */ 375*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS3 */ 376*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS4 */ 377*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS5 */ 378*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS6 */ 379*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS7 */ 380*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 381*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 382*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 383*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 384*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 385*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 386*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 387*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 388*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 389*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 390*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 391*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 392*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 393*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 394*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 395*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 396*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ0 */ 397*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ1 */ 398*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ2 */ 399*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ3 */ 400*4882a593Smuzhiyun 0x000002a0 /* EMC_XM2CMDPADCTRL */ 401*4882a593Smuzhiyun 0x0800211c /* EMC_XM2DQSPADCTRL2 */ 402*4882a593Smuzhiyun 0x00000000 /* EMC_XM2DQPADCTRL2 */ 403*4882a593Smuzhiyun 0x77fff884 /* EMC_XM2CLKPADCTRL */ 404*4882a593Smuzhiyun 0x01f1f108 /* EMC_XM2COMPPADCTRL */ 405*4882a593Smuzhiyun 0x05057404 /* EMC_XM2VTTGENPADCTRL */ 406*4882a593Smuzhiyun 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */ 407*4882a593Smuzhiyun 0x08000168 /* EMC_XM2QUSEPADCTRL */ 408*4882a593Smuzhiyun 0x08000000 /* EMC_XM2DQSPADCTRL3 */ 409*4882a593Smuzhiyun 0x00000802 /* EMC_CTT_TERM_CTRL */ 410*4882a593Smuzhiyun 0x00000000 /* EMC_ZCAL_INTERVAL */ 411*4882a593Smuzhiyun 0x00000040 /* EMC_ZCAL_WAIT_CNT */ 412*4882a593Smuzhiyun 0x000c000c /* EMC_MRS_WAIT_CNT */ 413*4882a593Smuzhiyun 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 414*4882a593Smuzhiyun 0x00000000 /* EMC_CTT */ 415*4882a593Smuzhiyun 0x00000000 /* EMC_CTT_DURATION */ 416*4882a593Smuzhiyun 0x80000287 /* EMC_DYN_SELF_REF_CONTROL */ 417*4882a593Smuzhiyun 0xe8000000 /* EMC_FBIO_SPARE */ 418*4882a593Smuzhiyun 0xff00ff00 /* EMC_CFG_RSV */ 419*4882a593Smuzhiyun >; 420*4882a593Smuzhiyun }; 421*4882a593Smuzhiyun 422*4882a593Smuzhiyun timing-51000000 { 423*4882a593Smuzhiyun clock-frequency = <51000000>; 424*4882a593Smuzhiyun 425*4882a593Smuzhiyun nvidia,emc-auto-cal-interval = <0x001fffff>; 426*4882a593Smuzhiyun nvidia,emc-mode-1 = <0x80100003>; 427*4882a593Smuzhiyun nvidia,emc-mode-2 = <0x80200008>; 428*4882a593Smuzhiyun nvidia,emc-mode-reset = <0x80001221>; 429*4882a593Smuzhiyun nvidia,emc-zcal-cnt-long = <0x00000040>; 430*4882a593Smuzhiyun nvidia,emc-cfg-dyn-self-ref; 431*4882a593Smuzhiyun nvidia,emc-cfg-periodic-qrst; 432*4882a593Smuzhiyun 433*4882a593Smuzhiyun nvidia,emc-configuration = < 434*4882a593Smuzhiyun 0x00000002 /* EMC_RC */ 435*4882a593Smuzhiyun 0x00000008 /* EMC_RFC */ 436*4882a593Smuzhiyun 0x00000001 /* EMC_RAS */ 437*4882a593Smuzhiyun 0x00000000 /* EMC_RP */ 438*4882a593Smuzhiyun 0x00000002 /* EMC_R2W */ 439*4882a593Smuzhiyun 0x0000000a /* EMC_W2R */ 440*4882a593Smuzhiyun 0x00000005 /* EMC_R2P */ 441*4882a593Smuzhiyun 0x0000000b /* EMC_W2P */ 442*4882a593Smuzhiyun 0x00000000 /* EMC_RD_RCD */ 443*4882a593Smuzhiyun 0x00000000 /* EMC_WR_RCD */ 444*4882a593Smuzhiyun 0x00000003 /* EMC_RRD */ 445*4882a593Smuzhiyun 0x00000001 /* EMC_REXT */ 446*4882a593Smuzhiyun 0x00000000 /* EMC_WEXT */ 447*4882a593Smuzhiyun 0x00000005 /* EMC_WDV */ 448*4882a593Smuzhiyun 0x00000005 /* EMC_QUSE */ 449*4882a593Smuzhiyun 0x00000004 /* EMC_QRST */ 450*4882a593Smuzhiyun 0x0000000a /* EMC_QSAFE */ 451*4882a593Smuzhiyun 0x0000000b /* EMC_RDV */ 452*4882a593Smuzhiyun 0x00000181 /* EMC_REFRESH */ 453*4882a593Smuzhiyun 0x00000000 /* EMC_BURST_REFRESH_NUM */ 454*4882a593Smuzhiyun 0x00000060 /* EMC_PRE_REFRESH_REQ_CNT */ 455*4882a593Smuzhiyun 0x00000002 /* EMC_PDEX2WR */ 456*4882a593Smuzhiyun 0x00000002 /* EMC_PDEX2RD */ 457*4882a593Smuzhiyun 0x00000001 /* EMC_PCHG2PDEN */ 458*4882a593Smuzhiyun 0x00000000 /* EMC_ACT2PDEN */ 459*4882a593Smuzhiyun 0x00000007 /* EMC_AR2PDEN */ 460*4882a593Smuzhiyun 0x0000000f /* EMC_RW2PDEN */ 461*4882a593Smuzhiyun 0x00000009 /* EMC_TXSR */ 462*4882a593Smuzhiyun 0x00000009 /* EMC_TXSRDLL */ 463*4882a593Smuzhiyun 0x00000004 /* EMC_TCKE */ 464*4882a593Smuzhiyun 0x00000002 /* EMC_TFAW */ 465*4882a593Smuzhiyun 0x00000000 /* EMC_TRPAB */ 466*4882a593Smuzhiyun 0x00000004 /* EMC_TCLKSTABLE */ 467*4882a593Smuzhiyun 0x00000005 /* EMC_TCLKSTOP */ 468*4882a593Smuzhiyun 0x0000018e /* EMC_TREFBW */ 469*4882a593Smuzhiyun 0x00000006 /* EMC_QUSE_EXTRA */ 470*4882a593Smuzhiyun 0x00000004 /* EMC_FBIO_CFG6 */ 471*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_WRITE */ 472*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_READ */ 473*4882a593Smuzhiyun 0x00004288 /* EMC_FBIO_CFG5 */ 474*4882a593Smuzhiyun 0x007800a4 /* EMC_CFG_DIG_DLL */ 475*4882a593Smuzhiyun 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 476*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS0 */ 477*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS1 */ 478*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS2 */ 479*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS3 */ 480*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS4 */ 481*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS5 */ 482*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS6 */ 483*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS7 */ 484*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 485*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 486*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 487*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 488*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 489*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 490*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 491*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 492*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 493*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 494*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 495*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 496*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 497*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 498*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 499*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 500*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ0 */ 501*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ1 */ 502*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ2 */ 503*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ3 */ 504*4882a593Smuzhiyun 0x000002a0 /* EMC_XM2CMDPADCTRL */ 505*4882a593Smuzhiyun 0x0800211c /* EMC_XM2DQSPADCTRL2 */ 506*4882a593Smuzhiyun 0x00000000 /* EMC_XM2DQPADCTRL2 */ 507*4882a593Smuzhiyun 0x77fff884 /* EMC_XM2CLKPADCTRL */ 508*4882a593Smuzhiyun 0x01f1f108 /* EMC_XM2COMPPADCTRL */ 509*4882a593Smuzhiyun 0x05057404 /* EMC_XM2VTTGENPADCTRL */ 510*4882a593Smuzhiyun 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */ 511*4882a593Smuzhiyun 0x08000168 /* EMC_XM2QUSEPADCTRL */ 512*4882a593Smuzhiyun 0x08000000 /* EMC_XM2DQSPADCTRL3 */ 513*4882a593Smuzhiyun 0x00000802 /* EMC_CTT_TERM_CTRL */ 514*4882a593Smuzhiyun 0x00000000 /* EMC_ZCAL_INTERVAL */ 515*4882a593Smuzhiyun 0x00000040 /* EMC_ZCAL_WAIT_CNT */ 516*4882a593Smuzhiyun 0x000c000c /* EMC_MRS_WAIT_CNT */ 517*4882a593Smuzhiyun 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 518*4882a593Smuzhiyun 0x00000000 /* EMC_CTT */ 519*4882a593Smuzhiyun 0x00000000 /* EMC_CTT_DURATION */ 520*4882a593Smuzhiyun 0x8000040b /* EMC_DYN_SELF_REF_CONTROL */ 521*4882a593Smuzhiyun 0xe8000000 /* EMC_FBIO_SPARE */ 522*4882a593Smuzhiyun 0xff00ff00 /* EMC_CFG_RSV */ 523*4882a593Smuzhiyun >; 524*4882a593Smuzhiyun }; 525*4882a593Smuzhiyun 526*4882a593Smuzhiyun timing-102000000 { 527*4882a593Smuzhiyun clock-frequency = <102000000>; 528*4882a593Smuzhiyun 529*4882a593Smuzhiyun nvidia,emc-auto-cal-interval = <0x001fffff>; 530*4882a593Smuzhiyun nvidia,emc-mode-1 = <0x80100003>; 531*4882a593Smuzhiyun nvidia,emc-mode-2 = <0x80200008>; 532*4882a593Smuzhiyun nvidia,emc-mode-reset = <0x80001221>; 533*4882a593Smuzhiyun nvidia,emc-zcal-cnt-long = <0x00000040>; 534*4882a593Smuzhiyun nvidia,emc-cfg-dyn-self-ref; 535*4882a593Smuzhiyun nvidia,emc-cfg-periodic-qrst; 536*4882a593Smuzhiyun 537*4882a593Smuzhiyun nvidia,emc-configuration = < 538*4882a593Smuzhiyun 0x00000005 /* EMC_RC */ 539*4882a593Smuzhiyun 0x00000010 /* EMC_RFC */ 540*4882a593Smuzhiyun 0x00000003 /* EMC_RAS */ 541*4882a593Smuzhiyun 0x00000001 /* EMC_RP */ 542*4882a593Smuzhiyun 0x00000002 /* EMC_R2W */ 543*4882a593Smuzhiyun 0x0000000a /* EMC_W2R */ 544*4882a593Smuzhiyun 0x00000005 /* EMC_R2P */ 545*4882a593Smuzhiyun 0x0000000b /* EMC_W2P */ 546*4882a593Smuzhiyun 0x00000001 /* EMC_RD_RCD */ 547*4882a593Smuzhiyun 0x00000001 /* EMC_WR_RCD */ 548*4882a593Smuzhiyun 0x00000003 /* EMC_RRD */ 549*4882a593Smuzhiyun 0x00000001 /* EMC_REXT */ 550*4882a593Smuzhiyun 0x00000000 /* EMC_WEXT */ 551*4882a593Smuzhiyun 0x00000005 /* EMC_WDV */ 552*4882a593Smuzhiyun 0x00000005 /* EMC_QUSE */ 553*4882a593Smuzhiyun 0x00000004 /* EMC_QRST */ 554*4882a593Smuzhiyun 0x0000000a /* EMC_QSAFE */ 555*4882a593Smuzhiyun 0x0000000b /* EMC_RDV */ 556*4882a593Smuzhiyun 0x00000303 /* EMC_REFRESH */ 557*4882a593Smuzhiyun 0x00000000 /* EMC_BURST_REFRESH_NUM */ 558*4882a593Smuzhiyun 0x000000c0 /* EMC_PRE_REFRESH_REQ_CNT */ 559*4882a593Smuzhiyun 0x00000002 /* EMC_PDEX2WR */ 560*4882a593Smuzhiyun 0x00000002 /* EMC_PDEX2RD */ 561*4882a593Smuzhiyun 0x00000001 /* EMC_PCHG2PDEN */ 562*4882a593Smuzhiyun 0x00000000 /* EMC_ACT2PDEN */ 563*4882a593Smuzhiyun 0x00000007 /* EMC_AR2PDEN */ 564*4882a593Smuzhiyun 0x0000000f /* EMC_RW2PDEN */ 565*4882a593Smuzhiyun 0x00000012 /* EMC_TXSR */ 566*4882a593Smuzhiyun 0x00000012 /* EMC_TXSRDLL */ 567*4882a593Smuzhiyun 0x00000004 /* EMC_TCKE */ 568*4882a593Smuzhiyun 0x00000004 /* EMC_TFAW */ 569*4882a593Smuzhiyun 0x00000000 /* EMC_TRPAB */ 570*4882a593Smuzhiyun 0x00000004 /* EMC_TCLKSTABLE */ 571*4882a593Smuzhiyun 0x00000005 /* EMC_TCLKSTOP */ 572*4882a593Smuzhiyun 0x0000031c /* EMC_TREFBW */ 573*4882a593Smuzhiyun 0x00000006 /* EMC_QUSE_EXTRA */ 574*4882a593Smuzhiyun 0x00000004 /* EMC_FBIO_CFG6 */ 575*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_WRITE */ 576*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_READ */ 577*4882a593Smuzhiyun 0x00004288 /* EMC_FBIO_CFG5 */ 578*4882a593Smuzhiyun 0x007800a4 /* EMC_CFG_DIG_DLL */ 579*4882a593Smuzhiyun 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 580*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS0 */ 581*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS1 */ 582*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS2 */ 583*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS3 */ 584*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS4 */ 585*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS5 */ 586*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS6 */ 587*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS7 */ 588*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 589*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 590*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 591*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 592*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 593*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 594*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 595*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 596*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 597*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 598*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 599*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 600*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 601*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 602*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 603*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 604*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ0 */ 605*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ1 */ 606*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ2 */ 607*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ3 */ 608*4882a593Smuzhiyun 0x000002a0 /* EMC_XM2CMDPADCTRL */ 609*4882a593Smuzhiyun 0x0800211c /* EMC_XM2DQSPADCTRL2 */ 610*4882a593Smuzhiyun 0x00000000 /* EMC_XM2DQPADCTRL2 */ 611*4882a593Smuzhiyun 0x77fff884 /* EMC_XM2CLKPADCTRL */ 612*4882a593Smuzhiyun 0x01f1f108 /* EMC_XM2COMPPADCTRL */ 613*4882a593Smuzhiyun 0x05057404 /* EMC_XM2VTTGENPADCTRL */ 614*4882a593Smuzhiyun 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */ 615*4882a593Smuzhiyun 0x08000168 /* EMC_XM2QUSEPADCTRL */ 616*4882a593Smuzhiyun 0x08000000 /* EMC_XM2DQSPADCTRL3 */ 617*4882a593Smuzhiyun 0x00000802 /* EMC_CTT_TERM_CTRL */ 618*4882a593Smuzhiyun 0x00000000 /* EMC_ZCAL_INTERVAL */ 619*4882a593Smuzhiyun 0x00000040 /* EMC_ZCAL_WAIT_CNT */ 620*4882a593Smuzhiyun 0x000c000c /* EMC_MRS_WAIT_CNT */ 621*4882a593Smuzhiyun 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 622*4882a593Smuzhiyun 0x00000000 /* EMC_CTT */ 623*4882a593Smuzhiyun 0x00000000 /* EMC_CTT_DURATION */ 624*4882a593Smuzhiyun 0x80000713 /* EMC_DYN_SELF_REF_CONTROL */ 625*4882a593Smuzhiyun 0xe8000000 /* EMC_FBIO_SPARE */ 626*4882a593Smuzhiyun 0xff00ff00 /* EMC_CFG_RSV */ 627*4882a593Smuzhiyun >; 628*4882a593Smuzhiyun }; 629*4882a593Smuzhiyun 630*4882a593Smuzhiyun timing-204000000 { 631*4882a593Smuzhiyun clock-frequency = <204000000>; 632*4882a593Smuzhiyun 633*4882a593Smuzhiyun nvidia,emc-auto-cal-interval = <0x001fffff>; 634*4882a593Smuzhiyun nvidia,emc-mode-1 = <0x80100003>; 635*4882a593Smuzhiyun nvidia,emc-mode-2 = <0x80200008>; 636*4882a593Smuzhiyun nvidia,emc-mode-reset = <0x80001221>; 637*4882a593Smuzhiyun nvidia,emc-zcal-cnt-long = <0x00000040>; 638*4882a593Smuzhiyun nvidia,emc-cfg-dyn-self-ref; 639*4882a593Smuzhiyun nvidia,emc-cfg-periodic-qrst; 640*4882a593Smuzhiyun 641*4882a593Smuzhiyun nvidia,emc-configuration = < 642*4882a593Smuzhiyun 0x0000000a /* EMC_RC */ 643*4882a593Smuzhiyun 0x00000020 /* EMC_RFC */ 644*4882a593Smuzhiyun 0x00000007 /* EMC_RAS */ 645*4882a593Smuzhiyun 0x00000002 /* EMC_RP */ 646*4882a593Smuzhiyun 0x00000002 /* EMC_R2W */ 647*4882a593Smuzhiyun 0x0000000a /* EMC_W2R */ 648*4882a593Smuzhiyun 0x00000005 /* EMC_R2P */ 649*4882a593Smuzhiyun 0x0000000b /* EMC_W2P */ 650*4882a593Smuzhiyun 0x00000002 /* EMC_RD_RCD */ 651*4882a593Smuzhiyun 0x00000002 /* EMC_WR_RCD */ 652*4882a593Smuzhiyun 0x00000003 /* EMC_RRD */ 653*4882a593Smuzhiyun 0x00000001 /* EMC_REXT */ 654*4882a593Smuzhiyun 0x00000000 /* EMC_WEXT */ 655*4882a593Smuzhiyun 0x00000005 /* EMC_WDV */ 656*4882a593Smuzhiyun 0x00000005 /* EMC_QUSE */ 657*4882a593Smuzhiyun 0x00000004 /* EMC_QRST */ 658*4882a593Smuzhiyun 0x0000000a /* EMC_QSAFE */ 659*4882a593Smuzhiyun 0x0000000b /* EMC_RDV */ 660*4882a593Smuzhiyun 0x00000607 /* EMC_REFRESH */ 661*4882a593Smuzhiyun 0x00000000 /* EMC_BURST_REFRESH_NUM */ 662*4882a593Smuzhiyun 0x00000181 /* EMC_PRE_REFRESH_REQ_CNT */ 663*4882a593Smuzhiyun 0x00000002 /* EMC_PDEX2WR */ 664*4882a593Smuzhiyun 0x00000002 /* EMC_PDEX2RD */ 665*4882a593Smuzhiyun 0x00000001 /* EMC_PCHG2PDEN */ 666*4882a593Smuzhiyun 0x00000000 /* EMC_ACT2PDEN */ 667*4882a593Smuzhiyun 0x00000007 /* EMC_AR2PDEN */ 668*4882a593Smuzhiyun 0x0000000f /* EMC_RW2PDEN */ 669*4882a593Smuzhiyun 0x00000023 /* EMC_TXSR */ 670*4882a593Smuzhiyun 0x00000023 /* EMC_TXSRDLL */ 671*4882a593Smuzhiyun 0x00000004 /* EMC_TCKE */ 672*4882a593Smuzhiyun 0x00000007 /* EMC_TFAW */ 673*4882a593Smuzhiyun 0x00000000 /* EMC_TRPAB */ 674*4882a593Smuzhiyun 0x00000004 /* EMC_TCLKSTABLE */ 675*4882a593Smuzhiyun 0x00000005 /* EMC_TCLKSTOP */ 676*4882a593Smuzhiyun 0x00000638 /* EMC_TREFBW */ 677*4882a593Smuzhiyun 0x00000006 /* EMC_QUSE_EXTRA */ 678*4882a593Smuzhiyun 0x00000006 /* EMC_FBIO_CFG6 */ 679*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_WRITE */ 680*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_READ */ 681*4882a593Smuzhiyun 0x00004288 /* EMC_FBIO_CFG5 */ 682*4882a593Smuzhiyun 0x004400a4 /* EMC_CFG_DIG_DLL */ 683*4882a593Smuzhiyun 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 684*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQS0 */ 685*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQS1 */ 686*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQS2 */ 687*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQS3 */ 688*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQS4 */ 689*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQS5 */ 690*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQS6 */ 691*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQS7 */ 692*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 693*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 694*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 695*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 696*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 697*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 698*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 699*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 700*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 701*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 702*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 703*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 704*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 705*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 706*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 707*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 708*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQ0 */ 709*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQ1 */ 710*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQ2 */ 711*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQ3 */ 712*4882a593Smuzhiyun 0x000002a0 /* EMC_XM2CMDPADCTRL */ 713*4882a593Smuzhiyun 0x0800211c /* EMC_XM2DQSPADCTRL2 */ 714*4882a593Smuzhiyun 0x00000000 /* EMC_XM2DQPADCTRL2 */ 715*4882a593Smuzhiyun 0x77fff884 /* EMC_XM2CLKPADCTRL */ 716*4882a593Smuzhiyun 0x01f1f108 /* EMC_XM2COMPPADCTRL */ 717*4882a593Smuzhiyun 0x05057404 /* EMC_XM2VTTGENPADCTRL */ 718*4882a593Smuzhiyun 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */ 719*4882a593Smuzhiyun 0x08000168 /* EMC_XM2QUSEPADCTRL */ 720*4882a593Smuzhiyun 0x08000000 /* EMC_XM2DQSPADCTRL3 */ 721*4882a593Smuzhiyun 0x00000802 /* EMC_CTT_TERM_CTRL */ 722*4882a593Smuzhiyun 0x00020000 /* EMC_ZCAL_INTERVAL */ 723*4882a593Smuzhiyun 0x00000100 /* EMC_ZCAL_WAIT_CNT */ 724*4882a593Smuzhiyun 0x000c000c /* EMC_MRS_WAIT_CNT */ 725*4882a593Smuzhiyun 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 726*4882a593Smuzhiyun 0x00000000 /* EMC_CTT */ 727*4882a593Smuzhiyun 0x00000000 /* EMC_CTT_DURATION */ 728*4882a593Smuzhiyun 0x80000d22 /* EMC_DYN_SELF_REF_CONTROL */ 729*4882a593Smuzhiyun 0xe8000000 /* EMC_FBIO_SPARE */ 730*4882a593Smuzhiyun 0xff00ff00 /* EMC_CFG_RSV */ 731*4882a593Smuzhiyun >; 732*4882a593Smuzhiyun }; 733*4882a593Smuzhiyun 734*4882a593Smuzhiyun timing-333500000 { 735*4882a593Smuzhiyun clock-frequency = <333500000>; 736*4882a593Smuzhiyun 737*4882a593Smuzhiyun nvidia,emc-auto-cal-interval = <0x001fffff>; 738*4882a593Smuzhiyun nvidia,emc-mode-1 = <0x80100002>; 739*4882a593Smuzhiyun nvidia,emc-mode-2 = <0x80200000>; 740*4882a593Smuzhiyun nvidia,emc-mode-reset = <0x80000321>; 741*4882a593Smuzhiyun nvidia,emc-zcal-cnt-long = <0x00000040>; 742*4882a593Smuzhiyun 743*4882a593Smuzhiyun nvidia,emc-configuration = < 744*4882a593Smuzhiyun 0x0000000f /* EMC_RC */ 745*4882a593Smuzhiyun 0x00000034 /* EMC_RFC */ 746*4882a593Smuzhiyun 0x0000000a /* EMC_RAS */ 747*4882a593Smuzhiyun 0x00000003 /* EMC_RP */ 748*4882a593Smuzhiyun 0x00000003 /* EMC_R2W */ 749*4882a593Smuzhiyun 0x00000008 /* EMC_W2R */ 750*4882a593Smuzhiyun 0x00000002 /* EMC_R2P */ 751*4882a593Smuzhiyun 0x00000009 /* EMC_W2P */ 752*4882a593Smuzhiyun 0x00000003 /* EMC_RD_RCD */ 753*4882a593Smuzhiyun 0x00000003 /* EMC_WR_RCD */ 754*4882a593Smuzhiyun 0x00000002 /* EMC_RRD */ 755*4882a593Smuzhiyun 0x00000001 /* EMC_REXT */ 756*4882a593Smuzhiyun 0x00000000 /* EMC_WEXT */ 757*4882a593Smuzhiyun 0x00000004 /* EMC_WDV */ 758*4882a593Smuzhiyun 0x00000006 /* EMC_QUSE */ 759*4882a593Smuzhiyun 0x00000004 /* EMC_QRST */ 760*4882a593Smuzhiyun 0x0000000a /* EMC_QSAFE */ 761*4882a593Smuzhiyun 0x0000000c /* EMC_RDV */ 762*4882a593Smuzhiyun 0x000009e9 /* EMC_REFRESH */ 763*4882a593Smuzhiyun 0x00000000 /* EMC_BURST_REFRESH_NUM */ 764*4882a593Smuzhiyun 0x0000027a /* EMC_PRE_REFRESH_REQ_CNT */ 765*4882a593Smuzhiyun 0x00000001 /* EMC_PDEX2WR */ 766*4882a593Smuzhiyun 0x00000008 /* EMC_PDEX2RD */ 767*4882a593Smuzhiyun 0x00000001 /* EMC_PCHG2PDEN */ 768*4882a593Smuzhiyun 0x00000000 /* EMC_ACT2PDEN */ 769*4882a593Smuzhiyun 0x00000007 /* EMC_AR2PDEN */ 770*4882a593Smuzhiyun 0x0000000e /* EMC_RW2PDEN */ 771*4882a593Smuzhiyun 0x00000039 /* EMC_TXSR */ 772*4882a593Smuzhiyun 0x00000200 /* EMC_TXSRDLL */ 773*4882a593Smuzhiyun 0x00000004 /* EMC_TCKE */ 774*4882a593Smuzhiyun 0x0000000a /* EMC_TFAW */ 775*4882a593Smuzhiyun 0x00000000 /* EMC_TRPAB */ 776*4882a593Smuzhiyun 0x00000004 /* EMC_TCLKSTABLE */ 777*4882a593Smuzhiyun 0x00000005 /* EMC_TCLKSTOP */ 778*4882a593Smuzhiyun 0x00000a2a /* EMC_TREFBW */ 779*4882a593Smuzhiyun 0x00000000 /* EMC_QUSE_EXTRA */ 780*4882a593Smuzhiyun 0x00000004 /* EMC_FBIO_CFG6 */ 781*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_WRITE */ 782*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_READ */ 783*4882a593Smuzhiyun 0x00007088 /* EMC_FBIO_CFG5 */ 784*4882a593Smuzhiyun 0x002600a4 /* EMC_CFG_DIG_DLL */ 785*4882a593Smuzhiyun 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 786*4882a593Smuzhiyun 0x0003c000 /* EMC_DLL_XFORM_DQS0 */ 787*4882a593Smuzhiyun 0x0003c000 /* EMC_DLL_XFORM_DQS1 */ 788*4882a593Smuzhiyun 0x0003c000 /* EMC_DLL_XFORM_DQS2 */ 789*4882a593Smuzhiyun 0x0003c000 /* EMC_DLL_XFORM_DQS3 */ 790*4882a593Smuzhiyun 0x00014000 /* EMC_DLL_XFORM_DQS4 */ 791*4882a593Smuzhiyun 0x00014000 /* EMC_DLL_XFORM_DQS5 */ 792*4882a593Smuzhiyun 0x00014000 /* EMC_DLL_XFORM_DQS6 */ 793*4882a593Smuzhiyun 0x00014000 /* EMC_DLL_XFORM_DQS7 */ 794*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 795*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 796*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 797*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 798*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 799*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 800*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 801*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 802*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 803*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 804*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 805*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 806*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 807*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 808*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 809*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 810*4882a593Smuzhiyun 0x00048000 /* EMC_DLL_XFORM_DQ0 */ 811*4882a593Smuzhiyun 0x00048000 /* EMC_DLL_XFORM_DQ1 */ 812*4882a593Smuzhiyun 0x00048000 /* EMC_DLL_XFORM_DQ2 */ 813*4882a593Smuzhiyun 0x00048000 /* EMC_DLL_XFORM_DQ3 */ 814*4882a593Smuzhiyun 0x000002a0 /* EMC_XM2CMDPADCTRL */ 815*4882a593Smuzhiyun 0x0800013d /* EMC_XM2DQSPADCTRL2 */ 816*4882a593Smuzhiyun 0x00000000 /* EMC_XM2DQPADCTRL2 */ 817*4882a593Smuzhiyun 0x77fff884 /* EMC_XM2CLKPADCTRL */ 818*4882a593Smuzhiyun 0x01f1f508 /* EMC_XM2COMPPADCTRL */ 819*4882a593Smuzhiyun 0x05057404 /* EMC_XM2VTTGENPADCTRL */ 820*4882a593Smuzhiyun 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */ 821*4882a593Smuzhiyun 0x080001e8 /* EMC_XM2QUSEPADCTRL */ 822*4882a593Smuzhiyun 0x08000021 /* EMC_XM2DQSPADCTRL3 */ 823*4882a593Smuzhiyun 0x00000802 /* EMC_CTT_TERM_CTRL */ 824*4882a593Smuzhiyun 0x00020000 /* EMC_ZCAL_INTERVAL */ 825*4882a593Smuzhiyun 0x00000100 /* EMC_ZCAL_WAIT_CNT */ 826*4882a593Smuzhiyun 0x018b000c /* EMC_MRS_WAIT_CNT */ 827*4882a593Smuzhiyun 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 828*4882a593Smuzhiyun 0x00000000 /* EMC_CTT */ 829*4882a593Smuzhiyun 0x00000000 /* EMC_CTT_DURATION */ 830*4882a593Smuzhiyun 0x800014d4 /* EMC_DYN_SELF_REF_CONTROL */ 831*4882a593Smuzhiyun 0xe8000000 /* EMC_FBIO_SPARE */ 832*4882a593Smuzhiyun 0xff00ff89 /* EMC_CFG_RSV */ 833*4882a593Smuzhiyun >; 834*4882a593Smuzhiyun }; 835*4882a593Smuzhiyun 836*4882a593Smuzhiyun timing-667000000 { 837*4882a593Smuzhiyun clock-frequency = <667000000>; 838*4882a593Smuzhiyun 839*4882a593Smuzhiyun nvidia,emc-auto-cal-interval = <0x001fffff>; 840*4882a593Smuzhiyun nvidia,emc-mode-1 = <0x80100002>; 841*4882a593Smuzhiyun nvidia,emc-mode-2 = <0x80200018>; 842*4882a593Smuzhiyun nvidia,emc-mode-reset = <0x80000b71>; 843*4882a593Smuzhiyun nvidia,emc-zcal-cnt-long = <0x00000040>; 844*4882a593Smuzhiyun nvidia,emc-cfg-periodic-qrst; 845*4882a593Smuzhiyun 846*4882a593Smuzhiyun nvidia,emc-configuration = < 847*4882a593Smuzhiyun 0x0000001f /* EMC_RC */ 848*4882a593Smuzhiyun 0x00000069 /* EMC_RFC */ 849*4882a593Smuzhiyun 0x00000017 /* EMC_RAS */ 850*4882a593Smuzhiyun 0x00000007 /* EMC_RP */ 851*4882a593Smuzhiyun 0x00000005 /* EMC_R2W */ 852*4882a593Smuzhiyun 0x0000000c /* EMC_W2R */ 853*4882a593Smuzhiyun 0x00000003 /* EMC_R2P */ 854*4882a593Smuzhiyun 0x00000011 /* EMC_W2P */ 855*4882a593Smuzhiyun 0x00000007 /* EMC_RD_RCD */ 856*4882a593Smuzhiyun 0x00000007 /* EMC_WR_RCD */ 857*4882a593Smuzhiyun 0x00000002 /* EMC_RRD */ 858*4882a593Smuzhiyun 0x00000001 /* EMC_REXT */ 859*4882a593Smuzhiyun 0x00000000 /* EMC_WEXT */ 860*4882a593Smuzhiyun 0x00000007 /* EMC_WDV */ 861*4882a593Smuzhiyun 0x0000000b /* EMC_QUSE */ 862*4882a593Smuzhiyun 0x00000009 /* EMC_QRST */ 863*4882a593Smuzhiyun 0x0000000b /* EMC_QSAFE */ 864*4882a593Smuzhiyun 0x00000011 /* EMC_RDV */ 865*4882a593Smuzhiyun 0x00001412 /* EMC_REFRESH */ 866*4882a593Smuzhiyun 0x00000000 /* EMC_BURST_REFRESH_NUM */ 867*4882a593Smuzhiyun 0x00000504 /* EMC_PRE_REFRESH_REQ_CNT */ 868*4882a593Smuzhiyun 0x00000002 /* EMC_PDEX2WR */ 869*4882a593Smuzhiyun 0x0000000e /* EMC_PDEX2RD */ 870*4882a593Smuzhiyun 0x00000001 /* EMC_PCHG2PDEN */ 871*4882a593Smuzhiyun 0x00000000 /* EMC_ACT2PDEN */ 872*4882a593Smuzhiyun 0x0000000c /* EMC_AR2PDEN */ 873*4882a593Smuzhiyun 0x00000016 /* EMC_RW2PDEN */ 874*4882a593Smuzhiyun 0x00000072 /* EMC_TXSR */ 875*4882a593Smuzhiyun 0x00000200 /* EMC_TXSRDLL */ 876*4882a593Smuzhiyun 0x00000005 /* EMC_TCKE */ 877*4882a593Smuzhiyun 0x00000015 /* EMC_TFAW */ 878*4882a593Smuzhiyun 0x00000000 /* EMC_TRPAB */ 879*4882a593Smuzhiyun 0x00000006 /* EMC_TCLKSTABLE */ 880*4882a593Smuzhiyun 0x00000007 /* EMC_TCLKSTOP */ 881*4882a593Smuzhiyun 0x00001453 /* EMC_TREFBW */ 882*4882a593Smuzhiyun 0x0000000c /* EMC_QUSE_EXTRA */ 883*4882a593Smuzhiyun 0x00000004 /* EMC_FBIO_CFG6 */ 884*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_WRITE */ 885*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_READ */ 886*4882a593Smuzhiyun 0x00005088 /* EMC_FBIO_CFG5 */ 887*4882a593Smuzhiyun 0xf00b0191 /* EMC_CFG_DIG_DLL */ 888*4882a593Smuzhiyun 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 889*4882a593Smuzhiyun 0x00000008 /* EMC_DLL_XFORM_DQS0 */ 890*4882a593Smuzhiyun 0x00000008 /* EMC_DLL_XFORM_DQS1 */ 891*4882a593Smuzhiyun 0x00000008 /* EMC_DLL_XFORM_DQS2 */ 892*4882a593Smuzhiyun 0x00000008 /* EMC_DLL_XFORM_DQS3 */ 893*4882a593Smuzhiyun 0x0000000a /* EMC_DLL_XFORM_DQS4 */ 894*4882a593Smuzhiyun 0x0000000a /* EMC_DLL_XFORM_DQS5 */ 895*4882a593Smuzhiyun 0x0000000a /* EMC_DLL_XFORM_DQS6 */ 896*4882a593Smuzhiyun 0x0000000a /* EMC_DLL_XFORM_DQS7 */ 897*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 898*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 899*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 900*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 901*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 902*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 903*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 904*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 905*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 906*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 907*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 908*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 909*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 910*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 911*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 912*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 913*4882a593Smuzhiyun 0x0000000c /* EMC_DLL_XFORM_DQ0 */ 914*4882a593Smuzhiyun 0x0000000c /* EMC_DLL_XFORM_DQ1 */ 915*4882a593Smuzhiyun 0x0000000c /* EMC_DLL_XFORM_DQ2 */ 916*4882a593Smuzhiyun 0x0000000c /* EMC_DLL_XFORM_DQ3 */ 917*4882a593Smuzhiyun 0x000002a0 /* EMC_XM2CMDPADCTRL */ 918*4882a593Smuzhiyun 0x0600013d /* EMC_XM2DQSPADCTRL2 */ 919*4882a593Smuzhiyun 0x22220000 /* EMC_XM2DQPADCTRL2 */ 920*4882a593Smuzhiyun 0x77fff884 /* EMC_XM2CLKPADCTRL */ 921*4882a593Smuzhiyun 0x01f1f501 /* EMC_XM2COMPPADCTRL */ 922*4882a593Smuzhiyun 0x07077404 /* EMC_XM2VTTGENPADCTRL */ 923*4882a593Smuzhiyun 0x54000000 /* EMC_XM2VTTGENPADCTRL2 */ 924*4882a593Smuzhiyun 0x080001e8 /* EMC_XM2QUSEPADCTRL */ 925*4882a593Smuzhiyun 0x0a000021 /* EMC_XM2DQSPADCTRL3 */ 926*4882a593Smuzhiyun 0x00000802 /* EMC_CTT_TERM_CTRL */ 927*4882a593Smuzhiyun 0x00020000 /* EMC_ZCAL_INTERVAL */ 928*4882a593Smuzhiyun 0x00000100 /* EMC_ZCAL_WAIT_CNT */ 929*4882a593Smuzhiyun 0x0156000c /* EMC_MRS_WAIT_CNT */ 930*4882a593Smuzhiyun 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 931*4882a593Smuzhiyun 0x00000000 /* EMC_CTT */ 932*4882a593Smuzhiyun 0x00000000 /* EMC_CTT_DURATION */ 933*4882a593Smuzhiyun 0x800028a5 /* EMC_DYN_SELF_REF_CONTROL */ 934*4882a593Smuzhiyun 0xf8000000 /* EMC_FBIO_SPARE */ 935*4882a593Smuzhiyun 0xff00ff49 /* EMC_CFG_RSV */ 936*4882a593Smuzhiyun >; 937*4882a593Smuzhiyun }; 938*4882a593Smuzhiyun }; 939*4882a593Smuzhiyun 940*4882a593Smuzhiyun emc-timings-1 { 941*4882a593Smuzhiyun nvidia,ram-code = <1>; /* Hynix H5TC2G83CFR */ 942*4882a593Smuzhiyun 943*4882a593Smuzhiyun timing-25500000 { 944*4882a593Smuzhiyun clock-frequency = <25500000>; 945*4882a593Smuzhiyun 946*4882a593Smuzhiyun nvidia,emc-auto-cal-interval = <0x001fffff>; 947*4882a593Smuzhiyun nvidia,emc-mode-1 = <0x80100003>; 948*4882a593Smuzhiyun nvidia,emc-mode-2 = <0x80200008>; 949*4882a593Smuzhiyun nvidia,emc-mode-reset = <0x80001221>; 950*4882a593Smuzhiyun nvidia,emc-zcal-cnt-long = <0x00000040>; 951*4882a593Smuzhiyun nvidia,emc-cfg-dyn-self-ref; 952*4882a593Smuzhiyun nvidia,emc-cfg-periodic-qrst; 953*4882a593Smuzhiyun 954*4882a593Smuzhiyun nvidia,emc-configuration = < 955*4882a593Smuzhiyun 0x00000001 /* EMC_RC */ 956*4882a593Smuzhiyun 0x00000004 /* EMC_RFC */ 957*4882a593Smuzhiyun 0x00000000 /* EMC_RAS */ 958*4882a593Smuzhiyun 0x00000000 /* EMC_RP */ 959*4882a593Smuzhiyun 0x00000002 /* EMC_R2W */ 960*4882a593Smuzhiyun 0x0000000a /* EMC_W2R */ 961*4882a593Smuzhiyun 0x00000005 /* EMC_R2P */ 962*4882a593Smuzhiyun 0x0000000b /* EMC_W2P */ 963*4882a593Smuzhiyun 0x00000000 /* EMC_RD_RCD */ 964*4882a593Smuzhiyun 0x00000000 /* EMC_WR_RCD */ 965*4882a593Smuzhiyun 0x00000003 /* EMC_RRD */ 966*4882a593Smuzhiyun 0x00000001 /* EMC_REXT */ 967*4882a593Smuzhiyun 0x00000000 /* EMC_WEXT */ 968*4882a593Smuzhiyun 0x00000005 /* EMC_WDV */ 969*4882a593Smuzhiyun 0x00000005 /* EMC_QUSE */ 970*4882a593Smuzhiyun 0x00000004 /* EMC_QRST */ 971*4882a593Smuzhiyun 0x0000000a /* EMC_QSAFE */ 972*4882a593Smuzhiyun 0x0000000b /* EMC_RDV */ 973*4882a593Smuzhiyun 0x000000c0 /* EMC_REFRESH */ 974*4882a593Smuzhiyun 0x00000000 /* EMC_BURST_REFRESH_NUM */ 975*4882a593Smuzhiyun 0x00000030 /* EMC_PRE_REFRESH_REQ_CNT */ 976*4882a593Smuzhiyun 0x00000002 /* EMC_PDEX2WR */ 977*4882a593Smuzhiyun 0x00000002 /* EMC_PDEX2RD */ 978*4882a593Smuzhiyun 0x00000001 /* EMC_PCHG2PDEN */ 979*4882a593Smuzhiyun 0x00000000 /* EMC_ACT2PDEN */ 980*4882a593Smuzhiyun 0x00000007 /* EMC_AR2PDEN */ 981*4882a593Smuzhiyun 0x0000000f /* EMC_RW2PDEN */ 982*4882a593Smuzhiyun 0x00000005 /* EMC_TXSR */ 983*4882a593Smuzhiyun 0x00000005 /* EMC_TXSRDLL */ 984*4882a593Smuzhiyun 0x00000004 /* EMC_TCKE */ 985*4882a593Smuzhiyun 0x00000001 /* EMC_TFAW */ 986*4882a593Smuzhiyun 0x00000000 /* EMC_TRPAB */ 987*4882a593Smuzhiyun 0x00000004 /* EMC_TCLKSTABLE */ 988*4882a593Smuzhiyun 0x00000005 /* EMC_TCLKSTOP */ 989*4882a593Smuzhiyun 0x000000c7 /* EMC_TREFBW */ 990*4882a593Smuzhiyun 0x00000006 /* EMC_QUSE_EXTRA */ 991*4882a593Smuzhiyun 0x00000004 /* EMC_FBIO_CFG6 */ 992*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_WRITE */ 993*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_READ */ 994*4882a593Smuzhiyun 0x00004288 /* EMC_FBIO_CFG5 */ 995*4882a593Smuzhiyun 0x007800a4 /* EMC_CFG_DIG_DLL */ 996*4882a593Smuzhiyun 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 997*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS0 */ 998*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS1 */ 999*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS2 */ 1000*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS3 */ 1001*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS4 */ 1002*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS5 */ 1003*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS6 */ 1004*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS7 */ 1005*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 1006*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 1007*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 1008*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 1009*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 1010*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 1011*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 1012*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 1013*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 1014*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 1015*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 1016*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 1017*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 1018*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 1019*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 1020*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 1021*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ0 */ 1022*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ1 */ 1023*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ2 */ 1024*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ3 */ 1025*4882a593Smuzhiyun 0x000002a0 /* EMC_XM2CMDPADCTRL */ 1026*4882a593Smuzhiyun 0x0800211c /* EMC_XM2DQSPADCTRL2 */ 1027*4882a593Smuzhiyun 0x00000000 /* EMC_XM2DQPADCTRL2 */ 1028*4882a593Smuzhiyun 0x77fff884 /* EMC_XM2CLKPADCTRL */ 1029*4882a593Smuzhiyun 0x01f1f108 /* EMC_XM2COMPPADCTRL */ 1030*4882a593Smuzhiyun 0x05057404 /* EMC_XM2VTTGENPADCTRL */ 1031*4882a593Smuzhiyun 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */ 1032*4882a593Smuzhiyun 0x08000168 /* EMC_XM2QUSEPADCTRL */ 1033*4882a593Smuzhiyun 0x08000000 /* EMC_XM2DQSPADCTRL3 */ 1034*4882a593Smuzhiyun 0x00000802 /* EMC_CTT_TERM_CTRL */ 1035*4882a593Smuzhiyun 0x00000000 /* EMC_ZCAL_INTERVAL */ 1036*4882a593Smuzhiyun 0x00000040 /* EMC_ZCAL_WAIT_CNT */ 1037*4882a593Smuzhiyun 0x000c000c /* EMC_MRS_WAIT_CNT */ 1038*4882a593Smuzhiyun 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 1039*4882a593Smuzhiyun 0x00000000 /* EMC_CTT */ 1040*4882a593Smuzhiyun 0x00000000 /* EMC_CTT_DURATION */ 1041*4882a593Smuzhiyun 0x80000287 /* EMC_DYN_SELF_REF_CONTROL */ 1042*4882a593Smuzhiyun 0xe8000000 /* EMC_FBIO_SPARE */ 1043*4882a593Smuzhiyun 0xff00ff00 /* EMC_CFG_RSV */ 1044*4882a593Smuzhiyun >; 1045*4882a593Smuzhiyun }; 1046*4882a593Smuzhiyun 1047*4882a593Smuzhiyun timing-51000000 { 1048*4882a593Smuzhiyun clock-frequency = <51000000>; 1049*4882a593Smuzhiyun 1050*4882a593Smuzhiyun nvidia,emc-auto-cal-interval = <0x001fffff>; 1051*4882a593Smuzhiyun nvidia,emc-mode-1 = <0x80100003>; 1052*4882a593Smuzhiyun nvidia,emc-mode-2 = <0x80200008>; 1053*4882a593Smuzhiyun nvidia,emc-mode-reset = <0x80001221>; 1054*4882a593Smuzhiyun nvidia,emc-zcal-cnt-long = <0x00000040>; 1055*4882a593Smuzhiyun nvidia,emc-cfg-dyn-self-ref; 1056*4882a593Smuzhiyun nvidia,emc-cfg-periodic-qrst; 1057*4882a593Smuzhiyun 1058*4882a593Smuzhiyun nvidia,emc-configuration = < 1059*4882a593Smuzhiyun 0x00000002 /* EMC_RC */ 1060*4882a593Smuzhiyun 0x00000008 /* EMC_RFC */ 1061*4882a593Smuzhiyun 0x00000001 /* EMC_RAS */ 1062*4882a593Smuzhiyun 0x00000000 /* EMC_RP */ 1063*4882a593Smuzhiyun 0x00000002 /* EMC_R2W */ 1064*4882a593Smuzhiyun 0x0000000a /* EMC_W2R */ 1065*4882a593Smuzhiyun 0x00000005 /* EMC_R2P */ 1066*4882a593Smuzhiyun 0x0000000b /* EMC_W2P */ 1067*4882a593Smuzhiyun 0x00000000 /* EMC_RD_RCD */ 1068*4882a593Smuzhiyun 0x00000000 /* EMC_WR_RCD */ 1069*4882a593Smuzhiyun 0x00000003 /* EMC_RRD */ 1070*4882a593Smuzhiyun 0x00000001 /* EMC_REXT */ 1071*4882a593Smuzhiyun 0x00000000 /* EMC_WEXT */ 1072*4882a593Smuzhiyun 0x00000005 /* EMC_WDV */ 1073*4882a593Smuzhiyun 0x00000005 /* EMC_QUSE */ 1074*4882a593Smuzhiyun 0x00000004 /* EMC_QRST */ 1075*4882a593Smuzhiyun 0x0000000a /* EMC_QSAFE */ 1076*4882a593Smuzhiyun 0x0000000b /* EMC_RDV */ 1077*4882a593Smuzhiyun 0x00000181 /* EMC_REFRESH */ 1078*4882a593Smuzhiyun 0x00000000 /* EMC_BURST_REFRESH_NUM */ 1079*4882a593Smuzhiyun 0x00000060 /* EMC_PRE_REFRESH_REQ_CNT */ 1080*4882a593Smuzhiyun 0x00000002 /* EMC_PDEX2WR */ 1081*4882a593Smuzhiyun 0x00000002 /* EMC_PDEX2RD */ 1082*4882a593Smuzhiyun 0x00000001 /* EMC_PCHG2PDEN */ 1083*4882a593Smuzhiyun 0x00000000 /* EMC_ACT2PDEN */ 1084*4882a593Smuzhiyun 0x00000007 /* EMC_AR2PDEN */ 1085*4882a593Smuzhiyun 0x0000000f /* EMC_RW2PDEN */ 1086*4882a593Smuzhiyun 0x00000009 /* EMC_TXSR */ 1087*4882a593Smuzhiyun 0x00000009 /* EMC_TXSRDLL */ 1088*4882a593Smuzhiyun 0x00000004 /* EMC_TCKE */ 1089*4882a593Smuzhiyun 0x00000002 /* EMC_TFAW */ 1090*4882a593Smuzhiyun 0x00000000 /* EMC_TRPAB */ 1091*4882a593Smuzhiyun 0x00000004 /* EMC_TCLKSTABLE */ 1092*4882a593Smuzhiyun 0x00000005 /* EMC_TCLKSTOP */ 1093*4882a593Smuzhiyun 0x0000018e /* EMC_TREFBW */ 1094*4882a593Smuzhiyun 0x00000006 /* EMC_QUSE_EXTRA */ 1095*4882a593Smuzhiyun 0x00000004 /* EMC_FBIO_CFG6 */ 1096*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_WRITE */ 1097*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_READ */ 1098*4882a593Smuzhiyun 0x00004288 /* EMC_FBIO_CFG5 */ 1099*4882a593Smuzhiyun 0x007800a4 /* EMC_CFG_DIG_DLL */ 1100*4882a593Smuzhiyun 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 1101*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS0 */ 1102*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS1 */ 1103*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS2 */ 1104*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS3 */ 1105*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS4 */ 1106*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS5 */ 1107*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS6 */ 1108*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS7 */ 1109*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 1110*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 1111*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 1112*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 1113*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 1114*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 1115*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 1116*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 1117*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 1118*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 1119*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 1120*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 1121*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 1122*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 1123*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 1124*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 1125*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ0 */ 1126*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ1 */ 1127*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ2 */ 1128*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ3 */ 1129*4882a593Smuzhiyun 0x000002a0 /* EMC_XM2CMDPADCTRL */ 1130*4882a593Smuzhiyun 0x0800211c /* EMC_XM2DQSPADCTRL2 */ 1131*4882a593Smuzhiyun 0x00000000 /* EMC_XM2DQPADCTRL2 */ 1132*4882a593Smuzhiyun 0x77fff884 /* EMC_XM2CLKPADCTRL */ 1133*4882a593Smuzhiyun 0x01f1f108 /* EMC_XM2COMPPADCTRL */ 1134*4882a593Smuzhiyun 0x05057404 /* EMC_XM2VTTGENPADCTRL */ 1135*4882a593Smuzhiyun 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */ 1136*4882a593Smuzhiyun 0x08000168 /* EMC_XM2QUSEPADCTRL */ 1137*4882a593Smuzhiyun 0x08000000 /* EMC_XM2DQSPADCTRL3 */ 1138*4882a593Smuzhiyun 0x00000802 /* EMC_CTT_TERM_CTRL */ 1139*4882a593Smuzhiyun 0x00000000 /* EMC_ZCAL_INTERVAL */ 1140*4882a593Smuzhiyun 0x00000040 /* EMC_ZCAL_WAIT_CNT */ 1141*4882a593Smuzhiyun 0x000c000c /* EMC_MRS_WAIT_CNT */ 1142*4882a593Smuzhiyun 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 1143*4882a593Smuzhiyun 0x00000000 /* EMC_CTT */ 1144*4882a593Smuzhiyun 0x00000000 /* EMC_CTT_DURATION */ 1145*4882a593Smuzhiyun 0x8000040b /* EMC_DYN_SELF_REF_CONTROL */ 1146*4882a593Smuzhiyun 0xe8000000 /* EMC_FBIO_SPARE */ 1147*4882a593Smuzhiyun 0xff00ff00 /* EMC_CFG_RSV */ 1148*4882a593Smuzhiyun >; 1149*4882a593Smuzhiyun }; 1150*4882a593Smuzhiyun 1151*4882a593Smuzhiyun timing-102000000 { 1152*4882a593Smuzhiyun clock-frequency = <102000000>; 1153*4882a593Smuzhiyun 1154*4882a593Smuzhiyun nvidia,emc-auto-cal-interval = <0x001fffff>; 1155*4882a593Smuzhiyun nvidia,emc-mode-1 = <0x80100003>; 1156*4882a593Smuzhiyun nvidia,emc-mode-2 = <0x80200008>; 1157*4882a593Smuzhiyun nvidia,emc-mode-reset = <0x80001221>; 1158*4882a593Smuzhiyun nvidia,emc-zcal-cnt-long = <0x00000040>; 1159*4882a593Smuzhiyun nvidia,emc-cfg-dyn-self-ref; 1160*4882a593Smuzhiyun nvidia,emc-cfg-periodic-qrst; 1161*4882a593Smuzhiyun 1162*4882a593Smuzhiyun nvidia,emc-configuration = < 1163*4882a593Smuzhiyun 0x00000005 /* EMC_RC */ 1164*4882a593Smuzhiyun 0x00000010 /* EMC_RFC */ 1165*4882a593Smuzhiyun 0x00000003 /* EMC_RAS */ 1166*4882a593Smuzhiyun 0x00000001 /* EMC_RP */ 1167*4882a593Smuzhiyun 0x00000002 /* EMC_R2W */ 1168*4882a593Smuzhiyun 0x0000000a /* EMC_W2R */ 1169*4882a593Smuzhiyun 0x00000005 /* EMC_R2P */ 1170*4882a593Smuzhiyun 0x0000000b /* EMC_W2P */ 1171*4882a593Smuzhiyun 0x00000001 /* EMC_RD_RCD */ 1172*4882a593Smuzhiyun 0x00000001 /* EMC_WR_RCD */ 1173*4882a593Smuzhiyun 0x00000003 /* EMC_RRD */ 1174*4882a593Smuzhiyun 0x00000001 /* EMC_REXT */ 1175*4882a593Smuzhiyun 0x00000000 /* EMC_WEXT */ 1176*4882a593Smuzhiyun 0x00000005 /* EMC_WDV */ 1177*4882a593Smuzhiyun 0x00000005 /* EMC_QUSE */ 1178*4882a593Smuzhiyun 0x00000004 /* EMC_QRST */ 1179*4882a593Smuzhiyun 0x0000000a /* EMC_QSAFE */ 1180*4882a593Smuzhiyun 0x0000000b /* EMC_RDV */ 1181*4882a593Smuzhiyun 0x00000303 /* EMC_REFRESH */ 1182*4882a593Smuzhiyun 0x00000000 /* EMC_BURST_REFRESH_NUM */ 1183*4882a593Smuzhiyun 0x000000c0 /* EMC_PRE_REFRESH_REQ_CNT */ 1184*4882a593Smuzhiyun 0x00000002 /* EMC_PDEX2WR */ 1185*4882a593Smuzhiyun 0x00000002 /* EMC_PDEX2RD */ 1186*4882a593Smuzhiyun 0x00000001 /* EMC_PCHG2PDEN */ 1187*4882a593Smuzhiyun 0x00000000 /* EMC_ACT2PDEN */ 1188*4882a593Smuzhiyun 0x00000007 /* EMC_AR2PDEN */ 1189*4882a593Smuzhiyun 0x0000000f /* EMC_RW2PDEN */ 1190*4882a593Smuzhiyun 0x00000012 /* EMC_TXSR */ 1191*4882a593Smuzhiyun 0x00000012 /* EMC_TXSRDLL */ 1192*4882a593Smuzhiyun 0x00000004 /* EMC_TCKE */ 1193*4882a593Smuzhiyun 0x00000004 /* EMC_TFAW */ 1194*4882a593Smuzhiyun 0x00000000 /* EMC_TRPAB */ 1195*4882a593Smuzhiyun 0x00000004 /* EMC_TCLKSTABLE */ 1196*4882a593Smuzhiyun 0x00000005 /* EMC_TCLKSTOP */ 1197*4882a593Smuzhiyun 0x0000031c /* EMC_TREFBW */ 1198*4882a593Smuzhiyun 0x00000006 /* EMC_QUSE_EXTRA */ 1199*4882a593Smuzhiyun 0x00000004 /* EMC_FBIO_CFG6 */ 1200*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_WRITE */ 1201*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_READ */ 1202*4882a593Smuzhiyun 0x00004288 /* EMC_FBIO_CFG5 */ 1203*4882a593Smuzhiyun 0x007800a4 /* EMC_CFG_DIG_DLL */ 1204*4882a593Smuzhiyun 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 1205*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS0 */ 1206*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS1 */ 1207*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS2 */ 1208*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS3 */ 1209*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS4 */ 1210*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS5 */ 1211*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS6 */ 1212*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQS7 */ 1213*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 1214*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 1215*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 1216*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 1217*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 1218*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 1219*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 1220*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 1221*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 1222*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 1223*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 1224*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 1225*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 1226*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 1227*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 1228*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 1229*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ0 */ 1230*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ1 */ 1231*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ2 */ 1232*4882a593Smuzhiyun 0x000fc000 /* EMC_DLL_XFORM_DQ3 */ 1233*4882a593Smuzhiyun 0x000002a0 /* EMC_XM2CMDPADCTRL */ 1234*4882a593Smuzhiyun 0x0800211c /* EMC_XM2DQSPADCTRL2 */ 1235*4882a593Smuzhiyun 0x00000000 /* EMC_XM2DQPADCTRL2 */ 1236*4882a593Smuzhiyun 0x77fff884 /* EMC_XM2CLKPADCTRL */ 1237*4882a593Smuzhiyun 0x01f1f108 /* EMC_XM2COMPPADCTRL */ 1238*4882a593Smuzhiyun 0x05057404 /* EMC_XM2VTTGENPADCTRL */ 1239*4882a593Smuzhiyun 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */ 1240*4882a593Smuzhiyun 0x08000168 /* EMC_XM2QUSEPADCTRL */ 1241*4882a593Smuzhiyun 0x08000000 /* EMC_XM2DQSPADCTRL3 */ 1242*4882a593Smuzhiyun 0x00000802 /* EMC_CTT_TERM_CTRL */ 1243*4882a593Smuzhiyun 0x00000000 /* EMC_ZCAL_INTERVAL */ 1244*4882a593Smuzhiyun 0x00000040 /* EMC_ZCAL_WAIT_CNT */ 1245*4882a593Smuzhiyun 0x000c000c /* EMC_MRS_WAIT_CNT */ 1246*4882a593Smuzhiyun 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 1247*4882a593Smuzhiyun 0x00000000 /* EMC_CTT */ 1248*4882a593Smuzhiyun 0x00000000 /* EMC_CTT_DURATION */ 1249*4882a593Smuzhiyun 0x80000713 /* EMC_DYN_SELF_REF_CONTROL */ 1250*4882a593Smuzhiyun 0xe8000000 /* EMC_FBIO_SPARE */ 1251*4882a593Smuzhiyun 0xff00ff00 /* EMC_CFG_RSV */ 1252*4882a593Smuzhiyun >; 1253*4882a593Smuzhiyun }; 1254*4882a593Smuzhiyun 1255*4882a593Smuzhiyun timing-204000000 { 1256*4882a593Smuzhiyun clock-frequency = <204000000>; 1257*4882a593Smuzhiyun 1258*4882a593Smuzhiyun nvidia,emc-auto-cal-interval = <0x001fffff>; 1259*4882a593Smuzhiyun nvidia,emc-mode-1 = <0x80100003>; 1260*4882a593Smuzhiyun nvidia,emc-mode-2 = <0x80200008>; 1261*4882a593Smuzhiyun nvidia,emc-mode-reset = <0x80001221>; 1262*4882a593Smuzhiyun nvidia,emc-zcal-cnt-long = <0x00000040>; 1263*4882a593Smuzhiyun nvidia,emc-cfg-dyn-self-ref; 1264*4882a593Smuzhiyun nvidia,emc-cfg-periodic-qrst; 1265*4882a593Smuzhiyun 1266*4882a593Smuzhiyun nvidia,emc-configuration = < 1267*4882a593Smuzhiyun 0x0000000a /* EMC_RC */ 1268*4882a593Smuzhiyun 0x00000020 /* EMC_RFC */ 1269*4882a593Smuzhiyun 0x00000007 /* EMC_RAS */ 1270*4882a593Smuzhiyun 0x00000002 /* EMC_RP */ 1271*4882a593Smuzhiyun 0x00000002 /* EMC_R2W */ 1272*4882a593Smuzhiyun 0x0000000a /* EMC_W2R */ 1273*4882a593Smuzhiyun 0x00000005 /* EMC_R2P */ 1274*4882a593Smuzhiyun 0x0000000b /* EMC_W2P */ 1275*4882a593Smuzhiyun 0x00000002 /* EMC_RD_RCD */ 1276*4882a593Smuzhiyun 0x00000002 /* EMC_WR_RCD */ 1277*4882a593Smuzhiyun 0x00000003 /* EMC_RRD */ 1278*4882a593Smuzhiyun 0x00000001 /* EMC_REXT */ 1279*4882a593Smuzhiyun 0x00000000 /* EMC_WEXT */ 1280*4882a593Smuzhiyun 0x00000005 /* EMC_WDV */ 1281*4882a593Smuzhiyun 0x00000005 /* EMC_QUSE */ 1282*4882a593Smuzhiyun 0x00000004 /* EMC_QRST */ 1283*4882a593Smuzhiyun 0x0000000a /* EMC_QSAFE */ 1284*4882a593Smuzhiyun 0x0000000b /* EMC_RDV */ 1285*4882a593Smuzhiyun 0x00000607 /* EMC_REFRESH */ 1286*4882a593Smuzhiyun 0x00000000 /* EMC_BURST_REFRESH_NUM */ 1287*4882a593Smuzhiyun 0x00000181 /* EMC_PRE_REFRESH_REQ_CNT */ 1288*4882a593Smuzhiyun 0x00000002 /* EMC_PDEX2WR */ 1289*4882a593Smuzhiyun 0x00000002 /* EMC_PDEX2RD */ 1290*4882a593Smuzhiyun 0x00000001 /* EMC_PCHG2PDEN */ 1291*4882a593Smuzhiyun 0x00000000 /* EMC_ACT2PDEN */ 1292*4882a593Smuzhiyun 0x00000007 /* EMC_AR2PDEN */ 1293*4882a593Smuzhiyun 0x0000000f /* EMC_RW2PDEN */ 1294*4882a593Smuzhiyun 0x00000023 /* EMC_TXSR */ 1295*4882a593Smuzhiyun 0x00000023 /* EMC_TXSRDLL */ 1296*4882a593Smuzhiyun 0x00000004 /* EMC_TCKE */ 1297*4882a593Smuzhiyun 0x00000007 /* EMC_TFAW */ 1298*4882a593Smuzhiyun 0x00000000 /* EMC_TRPAB */ 1299*4882a593Smuzhiyun 0x00000004 /* EMC_TCLKSTABLE */ 1300*4882a593Smuzhiyun 0x00000005 /* EMC_TCLKSTOP */ 1301*4882a593Smuzhiyun 0x00000638 /* EMC_TREFBW */ 1302*4882a593Smuzhiyun 0x00000006 /* EMC_QUSE_EXTRA */ 1303*4882a593Smuzhiyun 0x00000006 /* EMC_FBIO_CFG6 */ 1304*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_WRITE */ 1305*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_READ */ 1306*4882a593Smuzhiyun 0x00004288 /* EMC_FBIO_CFG5 */ 1307*4882a593Smuzhiyun 0x004400a4 /* EMC_CFG_DIG_DLL */ 1308*4882a593Smuzhiyun 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 1309*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQS0 */ 1310*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQS1 */ 1311*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQS2 */ 1312*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQS3 */ 1313*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQS4 */ 1314*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQS5 */ 1315*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQS6 */ 1316*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQS7 */ 1317*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 1318*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 1319*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 1320*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 1321*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 1322*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 1323*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 1324*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 1325*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 1326*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 1327*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 1328*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 1329*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 1330*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 1331*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 1332*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 1333*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQ0 */ 1334*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQ1 */ 1335*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQ2 */ 1336*4882a593Smuzhiyun 0x00080000 /* EMC_DLL_XFORM_DQ3 */ 1337*4882a593Smuzhiyun 0x000002a0 /* EMC_XM2CMDPADCTRL */ 1338*4882a593Smuzhiyun 0x0800211c /* EMC_XM2DQSPADCTRL2 */ 1339*4882a593Smuzhiyun 0x00000000 /* EMC_XM2DQPADCTRL2 */ 1340*4882a593Smuzhiyun 0x77fff884 /* EMC_XM2CLKPADCTRL */ 1341*4882a593Smuzhiyun 0x01f1f108 /* EMC_XM2COMPPADCTRL */ 1342*4882a593Smuzhiyun 0x05057404 /* EMC_XM2VTTGENPADCTRL */ 1343*4882a593Smuzhiyun 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */ 1344*4882a593Smuzhiyun 0x08000168 /* EMC_XM2QUSEPADCTRL */ 1345*4882a593Smuzhiyun 0x08000000 /* EMC_XM2DQSPADCTRL3 */ 1346*4882a593Smuzhiyun 0x00000802 /* EMC_CTT_TERM_CTRL */ 1347*4882a593Smuzhiyun 0x00020000 /* EMC_ZCAL_INTERVAL */ 1348*4882a593Smuzhiyun 0x00000100 /* EMC_ZCAL_WAIT_CNT */ 1349*4882a593Smuzhiyun 0x000c000c /* EMC_MRS_WAIT_CNT */ 1350*4882a593Smuzhiyun 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 1351*4882a593Smuzhiyun 0x00000000 /* EMC_CTT */ 1352*4882a593Smuzhiyun 0x00000000 /* EMC_CTT_DURATION */ 1353*4882a593Smuzhiyun 0x80000d22 /* EMC_DYN_SELF_REF_CONTROL */ 1354*4882a593Smuzhiyun 0xe8000000 /* EMC_FBIO_SPARE */ 1355*4882a593Smuzhiyun 0xff00ff00 /* EMC_CFG_RSV */ 1356*4882a593Smuzhiyun >; 1357*4882a593Smuzhiyun }; 1358*4882a593Smuzhiyun 1359*4882a593Smuzhiyun timing-333500000 { 1360*4882a593Smuzhiyun clock-frequency = <333500000>; 1361*4882a593Smuzhiyun 1362*4882a593Smuzhiyun nvidia,emc-auto-cal-interval = <0x001fffff>; 1363*4882a593Smuzhiyun nvidia,emc-mode-1 = <0x80100002>; 1364*4882a593Smuzhiyun nvidia,emc-mode-2 = <0x80200000>; 1365*4882a593Smuzhiyun nvidia,emc-mode-reset = <0x80000321>; 1366*4882a593Smuzhiyun nvidia,emc-zcal-cnt-long = <0x00000040>; 1367*4882a593Smuzhiyun 1368*4882a593Smuzhiyun nvidia,emc-configuration = < 1369*4882a593Smuzhiyun 0x0000000f /* EMC_RC */ 1370*4882a593Smuzhiyun 0x00000034 /* EMC_RFC */ 1371*4882a593Smuzhiyun 0x0000000a /* EMC_RAS */ 1372*4882a593Smuzhiyun 0x00000003 /* EMC_RP */ 1373*4882a593Smuzhiyun 0x00000003 /* EMC_R2W */ 1374*4882a593Smuzhiyun 0x00000008 /* EMC_W2R */ 1375*4882a593Smuzhiyun 0x00000002 /* EMC_R2P */ 1376*4882a593Smuzhiyun 0x00000009 /* EMC_W2P */ 1377*4882a593Smuzhiyun 0x00000003 /* EMC_RD_RCD */ 1378*4882a593Smuzhiyun 0x00000003 /* EMC_WR_RCD */ 1379*4882a593Smuzhiyun 0x00000002 /* EMC_RRD */ 1380*4882a593Smuzhiyun 0x00000001 /* EMC_REXT */ 1381*4882a593Smuzhiyun 0x00000000 /* EMC_WEXT */ 1382*4882a593Smuzhiyun 0x00000004 /* EMC_WDV */ 1383*4882a593Smuzhiyun 0x00000006 /* EMC_QUSE */ 1384*4882a593Smuzhiyun 0x00000004 /* EMC_QRST */ 1385*4882a593Smuzhiyun 0x0000000a /* EMC_QSAFE */ 1386*4882a593Smuzhiyun 0x0000000c /* EMC_RDV */ 1387*4882a593Smuzhiyun 0x000009e9 /* EMC_REFRESH */ 1388*4882a593Smuzhiyun 0x00000000 /* EMC_BURST_REFRESH_NUM */ 1389*4882a593Smuzhiyun 0x0000027a /* EMC_PRE_REFRESH_REQ_CNT */ 1390*4882a593Smuzhiyun 0x00000001 /* EMC_PDEX2WR */ 1391*4882a593Smuzhiyun 0x00000008 /* EMC_PDEX2RD */ 1392*4882a593Smuzhiyun 0x00000001 /* EMC_PCHG2PDEN */ 1393*4882a593Smuzhiyun 0x00000000 /* EMC_ACT2PDEN */ 1394*4882a593Smuzhiyun 0x00000007 /* EMC_AR2PDEN */ 1395*4882a593Smuzhiyun 0x0000000e /* EMC_RW2PDEN */ 1396*4882a593Smuzhiyun 0x00000039 /* EMC_TXSR */ 1397*4882a593Smuzhiyun 0x00000200 /* EMC_TXSRDLL */ 1398*4882a593Smuzhiyun 0x00000004 /* EMC_TCKE */ 1399*4882a593Smuzhiyun 0x0000000a /* EMC_TFAW */ 1400*4882a593Smuzhiyun 0x00000000 /* EMC_TRPAB */ 1401*4882a593Smuzhiyun 0x00000004 /* EMC_TCLKSTABLE */ 1402*4882a593Smuzhiyun 0x00000005 /* EMC_TCLKSTOP */ 1403*4882a593Smuzhiyun 0x00000a2a /* EMC_TREFBW */ 1404*4882a593Smuzhiyun 0x00000000 /* EMC_QUSE_EXTRA */ 1405*4882a593Smuzhiyun 0x00000004 /* EMC_FBIO_CFG6 */ 1406*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_WRITE */ 1407*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_READ */ 1408*4882a593Smuzhiyun 0x00007088 /* EMC_FBIO_CFG5 */ 1409*4882a593Smuzhiyun 0x002600a4 /* EMC_CFG_DIG_DLL */ 1410*4882a593Smuzhiyun 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 1411*4882a593Smuzhiyun 0x0003c000 /* EMC_DLL_XFORM_DQS0 */ 1412*4882a593Smuzhiyun 0x0003c000 /* EMC_DLL_XFORM_DQS1 */ 1413*4882a593Smuzhiyun 0x0003c000 /* EMC_DLL_XFORM_DQS2 */ 1414*4882a593Smuzhiyun 0x0003c000 /* EMC_DLL_XFORM_DQS3 */ 1415*4882a593Smuzhiyun 0x00014000 /* EMC_DLL_XFORM_DQS4 */ 1416*4882a593Smuzhiyun 0x00014000 /* EMC_DLL_XFORM_DQS5 */ 1417*4882a593Smuzhiyun 0x00014000 /* EMC_DLL_XFORM_DQS6 */ 1418*4882a593Smuzhiyun 0x00014000 /* EMC_DLL_XFORM_DQS7 */ 1419*4882a593Smuzhiyun 0x00018000 /* EMC_DLL_XFORM_QUSE0 */ 1420*4882a593Smuzhiyun 0x00018000 /* EMC_DLL_XFORM_QUSE1 */ 1421*4882a593Smuzhiyun 0x00018000 /* EMC_DLL_XFORM_QUSE2 */ 1422*4882a593Smuzhiyun 0x00018000 /* EMC_DLL_XFORM_QUSE3 */ 1423*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 1424*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 1425*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 1426*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 1427*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 1428*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 1429*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 1430*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 1431*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 1432*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 1433*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 1434*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 1435*4882a593Smuzhiyun 0x00048000 /* EMC_DLL_XFORM_DQ0 */ 1436*4882a593Smuzhiyun 0x00048000 /* EMC_DLL_XFORM_DQ1 */ 1437*4882a593Smuzhiyun 0x00048000 /* EMC_DLL_XFORM_DQ2 */ 1438*4882a593Smuzhiyun 0x00048000 /* EMC_DLL_XFORM_DQ3 */ 1439*4882a593Smuzhiyun 0x000002a0 /* EMC_XM2CMDPADCTRL */ 1440*4882a593Smuzhiyun 0x0600013d /* EMC_XM2DQSPADCTRL2 */ 1441*4882a593Smuzhiyun 0x00000000 /* EMC_XM2DQPADCTRL2 */ 1442*4882a593Smuzhiyun 0x77fff884 /* EMC_XM2CLKPADCTRL */ 1443*4882a593Smuzhiyun 0x01f1f508 /* EMC_XM2COMPPADCTRL */ 1444*4882a593Smuzhiyun 0x05057404 /* EMC_XM2VTTGENPADCTRL */ 1445*4882a593Smuzhiyun 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */ 1446*4882a593Smuzhiyun 0x080001e8 /* EMC_XM2QUSEPADCTRL */ 1447*4882a593Smuzhiyun 0x08000021 /* EMC_XM2DQSPADCTRL3 */ 1448*4882a593Smuzhiyun 0x00000802 /* EMC_CTT_TERM_CTRL */ 1449*4882a593Smuzhiyun 0x00020000 /* EMC_ZCAL_INTERVAL */ 1450*4882a593Smuzhiyun 0x00000100 /* EMC_ZCAL_WAIT_CNT */ 1451*4882a593Smuzhiyun 0x018b000c /* EMC_MRS_WAIT_CNT */ 1452*4882a593Smuzhiyun 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 1453*4882a593Smuzhiyun 0x00000000 /* EMC_CTT */ 1454*4882a593Smuzhiyun 0x00000000 /* EMC_CTT_DURATION */ 1455*4882a593Smuzhiyun 0x800014d4 /* EMC_DYN_SELF_REF_CONTROL */ 1456*4882a593Smuzhiyun 0xf8000000 /* EMC_FBIO_SPARE */ 1457*4882a593Smuzhiyun 0xff00ff89 /* EMC_CFG_RSV */ 1458*4882a593Smuzhiyun >; 1459*4882a593Smuzhiyun }; 1460*4882a593Smuzhiyun 1461*4882a593Smuzhiyun timing-667000000 { 1462*4882a593Smuzhiyun clock-frequency = <667000000>; 1463*4882a593Smuzhiyun 1464*4882a593Smuzhiyun nvidia,emc-auto-cal-interval = <0x001fffff>; 1465*4882a593Smuzhiyun nvidia,emc-mode-1 = <0x80100002>; 1466*4882a593Smuzhiyun nvidia,emc-mode-2 = <0x80200018>; 1467*4882a593Smuzhiyun nvidia,emc-mode-reset = <0x80000b71>; 1468*4882a593Smuzhiyun nvidia,emc-zcal-cnt-long = <0x00000040>; 1469*4882a593Smuzhiyun nvidia,emc-cfg-periodic-qrst; 1470*4882a593Smuzhiyun 1471*4882a593Smuzhiyun nvidia,emc-configuration = < 1472*4882a593Smuzhiyun 0x00000020 /* EMC_RC */ 1473*4882a593Smuzhiyun 0x0000006a /* EMC_RFC */ 1474*4882a593Smuzhiyun 0x00000017 /* EMC_RAS */ 1475*4882a593Smuzhiyun 0x00000007 /* EMC_RP */ 1476*4882a593Smuzhiyun 0x00000005 /* EMC_R2W */ 1477*4882a593Smuzhiyun 0x0000000c /* EMC_W2R */ 1478*4882a593Smuzhiyun 0x00000003 /* EMC_R2P */ 1479*4882a593Smuzhiyun 0x00000011 /* EMC_W2P */ 1480*4882a593Smuzhiyun 0x00000007 /* EMC_RD_RCD */ 1481*4882a593Smuzhiyun 0x00000007 /* EMC_WR_RCD */ 1482*4882a593Smuzhiyun 0x00000002 /* EMC_RRD */ 1483*4882a593Smuzhiyun 0x00000001 /* EMC_REXT */ 1484*4882a593Smuzhiyun 0x00000000 /* EMC_WEXT */ 1485*4882a593Smuzhiyun 0x00000007 /* EMC_WDV */ 1486*4882a593Smuzhiyun 0x0000000a /* EMC_QUSE */ 1487*4882a593Smuzhiyun 0x00000009 /* EMC_QRST */ 1488*4882a593Smuzhiyun 0x0000000b /* EMC_QSAFE */ 1489*4882a593Smuzhiyun 0x00000011 /* EMC_RDV */ 1490*4882a593Smuzhiyun 0x00001412 /* EMC_REFRESH */ 1491*4882a593Smuzhiyun 0x00000000 /* EMC_BURST_REFRESH_NUM */ 1492*4882a593Smuzhiyun 0x00000504 /* EMC_PRE_REFRESH_REQ_CNT */ 1493*4882a593Smuzhiyun 0x00000002 /* EMC_PDEX2WR */ 1494*4882a593Smuzhiyun 0x0000000e /* EMC_PDEX2RD */ 1495*4882a593Smuzhiyun 0x00000001 /* EMC_PCHG2PDEN */ 1496*4882a593Smuzhiyun 0x00000000 /* EMC_ACT2PDEN */ 1497*4882a593Smuzhiyun 0x0000000c /* EMC_AR2PDEN */ 1498*4882a593Smuzhiyun 0x00000016 /* EMC_RW2PDEN */ 1499*4882a593Smuzhiyun 0x00000072 /* EMC_TXSR */ 1500*4882a593Smuzhiyun 0x00000200 /* EMC_TXSRDLL */ 1501*4882a593Smuzhiyun 0x00000005 /* EMC_TCKE */ 1502*4882a593Smuzhiyun 0x00000015 /* EMC_TFAW */ 1503*4882a593Smuzhiyun 0x00000000 /* EMC_TRPAB */ 1504*4882a593Smuzhiyun 0x00000006 /* EMC_TCLKSTABLE */ 1505*4882a593Smuzhiyun 0x00000007 /* EMC_TCLKSTOP */ 1506*4882a593Smuzhiyun 0x00001453 /* EMC_TREFBW */ 1507*4882a593Smuzhiyun 0x0000000b /* EMC_QUSE_EXTRA */ 1508*4882a593Smuzhiyun 0x00000006 /* EMC_FBIO_CFG6 */ 1509*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_WRITE */ 1510*4882a593Smuzhiyun 0x00000000 /* EMC_ODT_READ */ 1511*4882a593Smuzhiyun 0x00005088 /* EMC_FBIO_CFG5 */ 1512*4882a593Smuzhiyun 0xf00b0191 /* EMC_CFG_DIG_DLL */ 1513*4882a593Smuzhiyun 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 1514*4882a593Smuzhiyun 0x0000000a /* EMC_DLL_XFORM_DQS0 */ 1515*4882a593Smuzhiyun 0x0000000a /* EMC_DLL_XFORM_DQS1 */ 1516*4882a593Smuzhiyun 0x0000000a /* EMC_DLL_XFORM_DQS2 */ 1517*4882a593Smuzhiyun 0x0000000a /* EMC_DLL_XFORM_DQS3 */ 1518*4882a593Smuzhiyun 0x0000000a /* EMC_DLL_XFORM_DQS4 */ 1519*4882a593Smuzhiyun 0x0000000a /* EMC_DLL_XFORM_DQS5 */ 1520*4882a593Smuzhiyun 0x0000000a /* EMC_DLL_XFORM_DQS6 */ 1521*4882a593Smuzhiyun 0x0000000a /* EMC_DLL_XFORM_DQS7 */ 1522*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 1523*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 1524*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 1525*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 1526*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 1527*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 1528*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 1529*4882a593Smuzhiyun 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 1530*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 1531*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 1532*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 1533*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 1534*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 1535*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 1536*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 1537*4882a593Smuzhiyun 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 1538*4882a593Smuzhiyun 0x0000000c /* EMC_DLL_XFORM_DQ0 */ 1539*4882a593Smuzhiyun 0x0000000c /* EMC_DLL_XFORM_DQ1 */ 1540*4882a593Smuzhiyun 0x0000000c /* EMC_DLL_XFORM_DQ2 */ 1541*4882a593Smuzhiyun 0x0000000c /* EMC_DLL_XFORM_DQ3 */ 1542*4882a593Smuzhiyun 0x000002a0 /* EMC_XM2CMDPADCTRL */ 1543*4882a593Smuzhiyun 0x0400013d /* EMC_XM2DQSPADCTRL2 */ 1544*4882a593Smuzhiyun 0x22220000 /* EMC_XM2DQPADCTRL2 */ 1545*4882a593Smuzhiyun 0x77fff884 /* EMC_XM2CLKPADCTRL */ 1546*4882a593Smuzhiyun 0x01f1f501 /* EMC_XM2COMPPADCTRL */ 1547*4882a593Smuzhiyun 0x07077404 /* EMC_XM2VTTGENPADCTRL */ 1548*4882a593Smuzhiyun 0x54000000 /* EMC_XM2VTTGENPADCTRL2 */ 1549*4882a593Smuzhiyun 0x080001e8 /* EMC_XM2QUSEPADCTRL */ 1550*4882a593Smuzhiyun 0x0a000021 /* EMC_XM2DQSPADCTRL3 */ 1551*4882a593Smuzhiyun 0x00000802 /* EMC_CTT_TERM_CTRL */ 1552*4882a593Smuzhiyun 0x00020000 /* EMC_ZCAL_INTERVAL */ 1553*4882a593Smuzhiyun 0x00000100 /* EMC_ZCAL_WAIT_CNT */ 1554*4882a593Smuzhiyun 0x0155000c /* EMC_MRS_WAIT_CNT */ 1555*4882a593Smuzhiyun 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 1556*4882a593Smuzhiyun 0x00000000 /* EMC_CTT */ 1557*4882a593Smuzhiyun 0x00000000 /* EMC_CTT_DURATION */ 1558*4882a593Smuzhiyun 0x800028a5 /* EMC_DYN_SELF_REF_CONTROL */ 1559*4882a593Smuzhiyun 0xe8000000 /* EMC_FBIO_SPARE */ 1560*4882a593Smuzhiyun 0xff00ff49 /* EMC_CFG_RSV */ 1561*4882a593Smuzhiyun >; 1562*4882a593Smuzhiyun }; 1563*4882a593Smuzhiyun }; 1564*4882a593Smuzhiyun }; 1565*4882a593Smuzhiyun}; 1566