| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/include/ |
| H A D | bcmsrom_tbl.h | 51 #define SRFL_CCODE 0x10 /* value is in country code format */
52 #define SRFL_ETHADDR 0x20 /* value is an Ethernet address */
53 #define SRFL_LEDDC 0x40 /* value is an LED duty cycle */
54 #define SRFL_NOVAR 0x80 /* do not generate a nvram param, entry is for mfgc */
55 #define SRFL_ARRAY 0x100 /* value is in an array. All elements EXCEPT FOR THE LAST
79 {"devid", 0xffffff00, SRFL_PRHEX, PCI_F0DEVID, 0xffff},
81 {"devid", 0xffffff00, SRFL_PRHEX, SROM_DEVID_PCIE, 0xffff},
83 {"devid", 0xffffff00, SRFL_PRHEX|SRFL_NOVAR, PCI_F0DEVID, 0xffff},
85 {"boardrev", 0x0000000e, SRFL_PRHEX, SROM_AABREV, SROM_BR_MASK},
86 {"boardrev", 0x000000f0, SRFL_PRHEX, SROM4_BREV, 0xffff},
[all …]
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/include/ |
| H A D | bcmsrom_tbl.h | 51 #define SRFL_CCODE 0x10 /* value is in country code format */
52 #define SRFL_ETHADDR 0x20 /* value is an Ethernet address */
53 #define SRFL_LEDDC 0x40 /* value is an LED duty cycle */
54 #define SRFL_NOVAR 0x80 /* do not generate a nvram param, entry is for mfgc */
55 #define SRFL_ARRAY 0x100 /* value is in an array. All elements EXCEPT FOR THE LAST
79 {"devid", 0xffffff00, SRFL_PRHEX, PCI_F0DEVID, 0xffff},
81 {"devid", 0xffffff00, SRFL_PRHEX, SROM_DEVID_PCIE, 0xffff},
83 {"devid", 0xffffff00, SRFL_PRHEX|SRFL_NOVAR, PCI_F0DEVID, 0xffff},
85 {"boardrev", 0x0000000e, SRFL_PRHEX, SROM_AABREV, SROM_BR_MASK},
86 {"boardrev", 0x000000f0, SRFL_PRHEX, SROM4_BREV, 0xffff},
[all …]
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| /OK3568_Linux_fs/external/rkwifibt/drivers/infineon/include/ |
| H A D | bcmsrom_tbl.h | 51 #define SRFL_CCODE 0x10 /* value is in country code format */
52 #define SRFL_ETHADDR 0x20 /* value is an Ethernet address */
53 #define SRFL_LEDDC 0x40 /* value is an LED duty cycle */
54 #define SRFL_NOVAR 0x80 /* do not generate a nvram param, entry is for mfgc */
55 #define SRFL_ARRAY 0x100 /* value is in an array. All elements EXCEPT FOR THE LAST
79 {"devid", 0xffffff00, SRFL_PRHEX, PCI_F0DEVID, 0xffff},
81 {"devid", 0xffffff00, SRFL_PRHEX, SROM_DEVID_PCIE, 0xffff},
83 {"devid", 0xffffff00, SRFL_PRHEX|SRFL_NOVAR, PCI_F0DEVID, 0xffff},
85 {"boardrev", 0x0000000e, SRFL_PRHEX, SROM_AABREV, SROM_BR_MASK},
86 {"boardrev", 0x000000f0, SRFL_PRHEX, SROM4_BREV, 0xffff},
[all …]
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/include/ |
| H A D | bcmsrom_tbl.h | 42 #define SRFL_CCODE 0x10 /* value is in country code format */
43 #define SRFL_ETHADDR 0x20 /* value is an Ethernet address */
44 #define SRFL_UNUSED 0x40 /* unused, was SRFL_LEDDC */
45 #define SRFL_NOVAR 0x80 /* do not generate a nvram param, entry is for mfgc */
46 #define SRFL_ARRAY 0x100 /* value is in an array. All elements EXCEPT FOR THE LAST
70 {"devid", 0xffffff00, SRFL_PRHEX, SROM_DEVID_PCIE, 0xffff},
72 {"devid", 0xffffff00, SRFL_PRHEX|SRFL_NOVAR, PCI_F0DEVID, 0xffff},
74 {"boardrev", 0x0000000e, SRFL_PRHEX, SROM_AABREV, SROM_BR_MASK},
75 {"boardrev", 0x000000f0, SRFL_PRHEX, SROM4_BREV, 0xffff},
76 {"boardrev", 0xffffff00, SRFL_PRHEX, SROM8_BREV, 0xffff},
[all …]
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| /OK3568_Linux_fs/external/rkwifibt/drivers/bcmdhd/include/ |
| H A D | bcmsrom_tbl.h | 42 #define SRFL_CCODE 0x10 /* value is in country code format */
43 #define SRFL_ETHADDR 0x20 /* value is an Ethernet address */
44 #define SRFL_UNUSED 0x40 /* unused, was SRFL_LEDDC */
45 #define SRFL_NOVAR 0x80 /* do not generate a nvram param, entry is for mfgc */
46 #define SRFL_ARRAY 0x100 /* value is in an array. All elements EXCEPT FOR THE LAST
70 {"devid", 0xffffff00, SRFL_PRHEX, SROM_DEVID_PCIE, 0xffff},
72 {"devid", 0xffffff00, SRFL_PRHEX|SRFL_NOVAR, PCI_F0DEVID, 0xffff},
74 {"boardrev", 0x0000000e, SRFL_PRHEX, SROM_AABREV, SROM_BR_MASK},
75 {"boardrev", 0x000000f0, SRFL_PRHEX, SROM4_BREV, 0xffff},
76 {"boardrev", 0xffffff00, SRFL_PRHEX, SROM8_BREV, 0xffff},
[all …]
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd_indep_power/include/ |
| H A D | bcmsrom_tbl.h | 50 #define SRFL_CCODE 0x10 /* value is in country code format */
51 #define SRFL_ETHADDR 0x20 /* value is an Ethernet address */
52 #define SRFL_LEDDC 0x40 /* value is an LED duty cycle */
53 #define SRFL_NOVAR 0x80 /* do not generate a nvram param, entry is for mfgc */
54 #define SRFL_ARRAY 0x100 /* value is in an array. All elements EXCEPT FOR THE LAST
77 {"devid", 0xffffff00, SRFL_PRHEX, PCI_F0DEVID, 0xffff},
79 {"devid", 0xffffff00, SRFL_PRHEX, SROM_DEVID_PCIE, 0xffff},
81 {"devid", 0xffffff00, SRFL_PRHEX|SRFL_NOVAR, PCI_F0DEVID, 0xffff},
83 {"boardrev", 0x0000000e, SRFL_PRHEX, SROM_AABREV, SROM_BR_MASK},
84 {"boardrev", 0x000000f0, SRFL_PRHEX, SROM4_BREV, 0xffff},
[all …]
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| /OK3568_Linux_fs/kernel/drivers/mfd/ |
| H A D | wm8350-regmap.c | 23 { 0xFFFF, 0xFFFF, 0x0000 }, /* R0 - Reset/ID */
24 { 0x7CFF, 0x0C00, 0x0000 }, /* R1 - ID */
25 { 0x007F, 0x0000, 0x0000 }, /* R2 - ROM Mask ID */
26 { 0xBE3B, 0xBE3B, 0x8000 }, /* R3 - System Control 1 */
27 { 0xFEF7, 0xFEF7, 0xF800 }, /* R4 - System Control 2 */
28 { 0x80FF, 0x80FF, 0x8000 }, /* R5 - System Hibernate */
29 { 0xFB0E, 0xFB0E, 0x0000 }, /* R6 - Interface Control */
30 { 0x0000, 0x0000, 0x0000 }, /* R7 */
31 { 0xE537, 0xE537, 0xFFFF }, /* R8 - Power mgmt (1) */
32 { 0x0FF3, 0x0FF3, 0xFFFF }, /* R9 - Power mgmt (2) */
[all …]
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| /OK3568_Linux_fs/kernel/drivers/infiniband/hw/ocrdma/ |
| H A D | ocrdma_sli.h | 47 OCRDMA_ASIC_GEN_SKH_R = 0x04,
48 OCRDMA_ASIC_GEN_LANCER = 0x0B
52 OCRDMA_ASIC_REV_A0 = 0x00,
53 OCRDMA_ASIC_REV_B0 = 0x10,
54 OCRDMA_ASIC_REV_C0 = 0x20
129 OCRDMA_DB_RQ_OFFSET = 0xE0,
130 OCRDMA_DB_GEN2_RQ_OFFSET = 0x100,
131 OCRDMA_DB_SQ_OFFSET = 0x60,
132 OCRDMA_DB_GEN2_SQ_OFFSET = 0x1C0,
135 OCRDMA_DB_CQ_OFFSET = 0x120,
[all …]
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| /OK3568_Linux_fs/kernel/drivers/net/ethernet/marvell/octeontx2/af/ |
| H A D | npc_profile.h | 14 #define NPC_KPU_PROFILE_VER 0x0000000100050000
16 #define NPC_IH_W 0x8000
17 #define NPC_IH_UTAG 0x2000
19 #define NPC_ETYPE_IP 0x0800
20 #define NPC_ETYPE_IP6 0x86dd
21 #define NPC_ETYPE_ARP 0x0806
22 #define NPC_ETYPE_RARP 0x8035
23 #define NPC_ETYPE_MPLSU 0x8847
24 #define NPC_ETYPE_MPLSM 0x8848
25 #define NPC_ETYPE_ETAG 0x893f
[all …]
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| /OK3568_Linux_fs/kernel/drivers/media/dvb-frontends/drx39xyj/ |
| H A D | drxj_map.h | 37 * Generated by: IDF:x 1.3.0
56 #define ATV_COMM_EXEC__A 0xC00000
58 #define ATV_COMM_EXEC__M 0x3
59 #define ATV_COMM_EXEC__PRE 0x0
60 #define ATV_COMM_EXEC_STOP 0x0
61 #define ATV_COMM_EXEC_ACTIVE 0x1
62 #define ATV_COMM_EXEC_HOLD 0x2
64 #define ATV_COMM_STATE__A 0xC00001
66 #define ATV_COMM_STATE__M 0xFFFF
67 #define ATV_COMM_STATE__PRE 0x0
[all …]
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| /OK3568_Linux_fs/kernel/drivers/media/pci/meye/ |
| H A D | meye.c | 55 MODULE_PARM_DESC(video_nr, "video device to register (0=/dev/video0, etc)");
71 memset(mem, 0, size); in rvmalloc()
73 while (size > 0) { in rvmalloc()
88 while ((long) size > 0) { in rvfree()
108 memset(meye.mchip_ptable, 0, sizeof(meye.mchip_ptable)); in ptable_alloc()
119 meye.mchip_dmahandle = 0; in ptable_alloc()
124 for (i = 0; i < MCHIP_NB_PAGES; i++) { in ptable_alloc()
133 for (j = 0; j < i; ++j) { in ptable_alloc()
145 meye.mchip_dmahandle = 0; in ptable_alloc()
151 return 0; in ptable_alloc()
[all …]
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| /OK3568_Linux_fs/kernel/drivers/staging/comedi/drivers/ |
| H A D | ni_pcimio.c | 110 * 0V, 5V, APFI<0,1>, or AO<0...3> and RANGE can
111 * be 10V, 5V, 2V, 1V, APFI<0,1>, AO<0...3>. That's
212 .ai_maxdata = 0xffff,
218 .ao_maxdata = 0x0fff,
226 .ai_maxdata = 0xffff,
232 .ao_maxdata = 0xffff,
241 .ai_maxdata = 0xffff,
247 .ao_maxdata = 0xffff,
255 .ai_maxdata = 0xffff,
261 .ao_maxdata = 0xffff,
[all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/gvt/ |
| H A D | mmio_context.c | 46 {RCS0, GFX_MODE_GEN7, 0xffff, false}, /* 0x229c */
47 {RCS0, GEN9_CTX_PREEMPT_REG, 0x0, false}, /* 0x2248 */
48 {RCS0, HWSTAM, 0x0, false}, /* 0x2098 */
49 {RCS0, INSTPM, 0xffff, true}, /* 0x20c0 */
50 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 0), 0, false}, /* 0x24d0 */
51 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 1), 0, false}, /* 0x24d4 */
52 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 2), 0, false}, /* 0x24d8 */
53 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 3), 0, false}, /* 0x24dc */
54 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 4), 0, false}, /* 0x24e0 */
55 {RCS0, RING_FORCE_TO_NONPRIV(RENDER_RING_BASE, 5), 0, false}, /* 0x24e4 */
[all …]
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| /OK3568_Linux_fs/kernel/drivers/infiniband/hw/i40iw/ |
| H A D | i40iw_register.h | 38 #define I40E_GLGEN_STAT 0x000B612C /* Reset: POR */
40 #define I40E_PFHMC_PDINV 0x000C0300 /* Reset: PFR */
41 #define I40E_PFHMC_PDINV_PMSDIDX_SHIFT 0
42 #define I40E_PFHMC_PDINV_PMSDIDX_MASK (0xFFF << I40E_PFHMC_PDINV_PMSDIDX_SHIFT)
44 #define I40E_PFHMC_PDINV_PMPDIDX_MASK (0x1FF << I40E_PFHMC_PDINV_PMPDIDX_SHIFT)
46 #define I40E_PFHMC_SDCMD_PMSDWR_MASK (0x1 << I40E_PFHMC_SDCMD_PMSDWR_SHIFT)
47 #define I40E_PFHMC_SDDATALOW_PMSDVALID_SHIFT 0
48 #define I40E_PFHMC_SDDATALOW_PMSDVALID_MASK (0x1 << I40E_PFHMC_SDDATALOW_PMSDVALID_SHIFT)
50 #define I40E_PFHMC_SDDATALOW_PMSDTYPE_MASK (0x1 << I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT)
52 #define I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_MASK (0x3FF << I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT)
[all …]
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| /OK3568_Linux_fs/kernel/arch/m68k/ifpsp060/src/ |
| H A D | itest.S | 51 align 0x4
58 addq.l &0x4,%sp
63 addq.l &0x4,%sp
67 addq.l &0x4,%sp
74 movm.l &0x3f3c,-(%sp)
78 addq.l &0x4,%sp
84 addq.l &0x4,%sp
94 addq.l &0x4,%sp
104 addq.l &0x4,%sp
114 addq.l &0x4,%sp
[all …]
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| /OK3568_Linux_fs/kernel/drivers/media/usb/gspca/gl860/ |
| H A D | gl860-ov9655.c | 12 {0x0000, 0x0000}, {0x0010, 0x0010}, {0x0008, 0x00c0}, {0x0001, 0x00c1},
13 {0x0001, 0x00c2}, {0x0020, 0x0006}, {0x006a, 0x000d},
15 {0x0040, 0x0000},
19 {0x0041, 0x0000}, {0x006a, 0x0007}, {0x0063, 0x0006}, {0x006a, 0x000d},
20 {0x0000, 0x00c0}, {0x0010, 0x0010}, {0x0001, 0x00c1}, {0x0041, 0x00c2},
21 {0x0004, 0x00d8}, {0x0012, 0x0004}, {0x0000, 0x0058}, {0x0040, 0x0000},
22 {0x00f3, 0x0006}, {0x0058, 0x0000}, {0x0048, 0x0000}, {0x0061, 0x0000},
93 static u8 c04[] = {0x04};
104 {0x6032, 0x00ff}, {0x6032, 0x00ff}, {0x6032, 0x00ff}, {0x603c, 0x00ff},
105 {0x6003, 0x00ff}, {0x6032, 0x00ff}, {0x6032, 0x00ff}, {0x6001, 0x00ff},
[all …]
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| /OK3568_Linux_fs/kernel/drivers/staging/sm750fb/ |
| H A D | ddk750_reg.h | 6 #define DE_STATE1 0x100054
7 #define DE_STATE1_DE_ABORT BIT(0)
9 #define DE_STATE2 0x100058
14 #define SYSTEM_CTRL 0x000000
15 #define SYSTEM_CTRL_DPMS_MASK (0x3 << 30)
16 #define SYSTEM_CTRL_DPMS_VPHP (0x0 << 30)
17 #define SYSTEM_CTRL_DPMS_VPHN (0x1 << 30)
18 #define SYSTEM_CTRL_DPMS_VNHP (0x2 << 30)
19 #define SYSTEM_CTRL_DPMS_VNHN (0x3 << 30)
35 #define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_MASK (0x3 << 4)
[all …]
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| /OK3568_Linux_fs/kernel/drivers/usb/storage/ |
| H A D | unusual_datafab.h | 9 UNUSUAL_DEV( 0x07c4, 0xa000, 0x0000, 0x0015,
13 0),
17 * using the current driver...the 0xffff is arbitrary since I
20 * The 0xa003 and 0xa004 devices in particular I'm curious about.
26 UNUSUAL_DEV( 0x07c4, 0xa001, 0x0000, 0xffff,
30 0),
33 UNUSUAL_DEV( 0x07c4, 0xa002, 0x0000, 0xffff,
39 UNUSUAL_DEV( 0x07c4, 0xa003, 0x0000, 0xffff,
43 0),
45 UNUSUAL_DEV( 0x07c4, 0xa004, 0x0000, 0xffff,
[all …]
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| /OK3568_Linux_fs/kernel/net/tipc/ |
| H A D | msg.h | 64 #define TIPC_CONN_MSG 0
146 #define TIPC_SKB_CB(__skb) ((struct tipc_skb_cb *)&((__skb)->cb[0]))
158 * --> Gap ACK blocks: <4, 5>, <11, 1>, <15, 4>, <20, 0>
173 * 31 16 15 0
238 * Word 0
242 return msg_bits(m, 0, 29, 7); in msg_version()
247 msg_set_bits(m, 0, 29, 7, TIPC_VERSION); in msg_set_version()
252 return msg_bits(m, 0, 25, 0xf); in msg_user()
262 msg_set_bits(m, 0, 25, 0xf, n); in msg_set_user()
267 return msg_bits(m, 0, 21, 0xf) << 2; in msg_hdr_sz()
[all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/dma/ |
| H A D | brcm,iproc-sba.txt | 21 mboxes = <&raid_mbox 0 0x1 0xffff>,
22 <&raid_mbox 1 0x1 0xffff>,
23 <&raid_mbox 2 0x1 0xffff>,
24 <&raid_mbox 3 0x1 0xffff>,
25 <&raid_mbox 4 0x1 0xffff>,
26 <&raid_mbox 5 0x1 0xffff>,
27 <&raid_mbox 6 0x1 0xffff>,
28 <&raid_mbox 7 0x1 0xffff>;
|
| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/oss/ |
| H A D | oss_2_4_sh_mask.h | 27 #define IH_VMID_0_LUT__PASID_MASK 0xffff
28 #define IH_VMID_0_LUT__PASID__SHIFT 0x0
29 #define IH_VMID_1_LUT__PASID_MASK 0xffff
30 #define IH_VMID_1_LUT__PASID__SHIFT 0x0
31 #define IH_VMID_2_LUT__PASID_MASK 0xffff
32 #define IH_VMID_2_LUT__PASID__SHIFT 0x0
33 #define IH_VMID_3_LUT__PASID_MASK 0xffff
34 #define IH_VMID_3_LUT__PASID__SHIFT 0x0
35 #define IH_VMID_4_LUT__PASID_MASK 0xffff
36 #define IH_VMID_4_LUT__PASID__SHIFT 0x0
[all …]
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| /OK3568_Linux_fs/kernel/drivers/net/ethernet/chelsio/cxgb3/ |
| H A D | ael1002.c | 36 AEL100X_TX_CONFIG1 = 0xc002,
37 AEL1002_PWR_DOWN_HI = 0xc011,
38 AEL1002_PWR_DOWN_LO = 0xc012,
39 AEL1002_XFI_EQL = 0xc015,
40 AEL1002_LB_EN = 0xc017,
41 AEL_OPT_SETTINGS = 0xc017,
42 AEL_I2C_CTRL = 0xc30a,
43 AEL_I2C_DATA = 0xc30b,
44 AEL_I2C_STAT = 0xc30c,
45 AEL2005_GPIO_CTRL = 0xc214,
[all …]
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| /OK3568_Linux_fs/kernel/drivers/net/ethernet/aquantia/atlantic/macsec/ |
| H A D | macsec_api.c | 23 } while (0); \
46 return (*data != 0xffff) ? 0 : -ETIME; in aq_mss_mdio_read()
52 return 0; in aq_mss_mdio_write()
82 for (i = 0; i < num_words; i += 2) { in set_raw_ingress_record()
96 0); in set_raw_ingress_record()
98 MSS_INGRESS_LUT_DATA_CTL_REGISTER_ADDR + i + 1, 0); in set_raw_ingress_record()
105 lut_op_reg.bits_0.lut_read = 0; in set_raw_ingress_record()
114 return 0; in set_raw_ingress_record()
135 lut_op_reg.bits_0.lut_write = 0; in get_raw_ingress_record()
148 memset(packed_record, 0, sizeof(u16) * num_words); in get_raw_ingress_record()
[all …]
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| /OK3568_Linux_fs/kernel/drivers/ssb/ |
| H A D | pci.c | 28 #define SSB_VERBOSE_PCICORESWITCH_DEBUG 0
35 int attempts = 0; in ssb_pci_switch_coreidx()
57 return 0; in ssb_pci_switch_coreidx()
91 return 0; in ssb_pci_xtal()
181 SPEX(_field[0], _offset + 0, _mask, _shift); \
189 } while (0)
196 0x00, 0xF7, 0xB9, 0x4E, 0x25, 0xD2, 0x9C, 0x6B, in ssb_crc8()
197 0x4A, 0xBD, 0xF3, 0x04, 0x6F, 0x98, 0xD6, 0x21, in ssb_crc8()
198 0x94, 0x63, 0x2D, 0xDA, 0xB1, 0x46, 0x08, 0xFF, in ssb_crc8()
199 0xDE, 0x29, 0x67, 0x90, 0xFB, 0x0C, 0x42, 0xB5, in ssb_crc8()
[all …]
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| /OK3568_Linux_fs/external/mpp/mpp/hal/vpu/h264e/ |
| H A D | hal_h264e_vepu1_reg_tbl.h | 25 #define VEPU_REG_INTERRUPT 0x004
33 #define VEPU_REG_INTERRUPT_BIT BIT(0)
35 #define VEPU_REG_AXI_CTRL 0x008
36 #define VEPU_REG_AXI_CTRL_WRITE_ID(x) (((x) & 0xff) << 24)
37 #define VEPU_REG_AXI_CTRL_READ_ID(x) (((x) & 0xff) << 16)
41 #define VEPU_REG_AXI_CTRL_BURST_LEN(x) (((x) & 0x3f) << 8)
50 #define VEPU_REG_INPUT_SWAP8 BIT(0)
53 #define VEPU_REG_ADDR_OUTPUT_STREAM 0x014
54 #define VEPU_REG_ADDR_OUTPUT_CTRL 0x018
55 #define VEPU_REG_ADDR_REF_LUMA 0x01c
[all …]
|