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/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dimx6ull-pinfunc.h16 #define MX6UL_PAD_UART5_TX_DATA__UART5_DTE_RX 0x00BC 0x0348 0x0644 0x0 0x6
18 #define MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x00C0 0x034C 0x0644 0x0 0x7
20 #define MX6UL_PAD_ENET1_RX_EN__UART5_DCE_RTS 0x00CC 0x0358 0x0640 0x1 0x5
22 #define MX6UL_PAD_ENET1_TX_DATA0__UART5_DTE_RTS 0x00D0 0x035C 0x0640 0x1 0x6
24 #define MX6UL_PAD_CSI_DATA02__UART5_DCE_RTS 0x01EC 0x0478 0x0640 0x8 0x7
27 #define MX6ULL_PAD_UART1_TX_DATA__UART5_DCE_TX 0x0084 0x0310 0x0000 0x9 0x0
28 #define MX6ULL_PAD_UART1_TX_DATA__UART5_DTE_RX 0x0084 0x0310 0x0644 0x9 0x4
29 #define MX6ULL_PAD_UART1_RX_DATA__UART5_DCE_RX 0x0088 0x0314 0x0644 0x9 0x5
30 #define MX6ULL_PAD_UART1_RX_DATA__UART5_DTE_TX 0x0088 0x0314 0x0000 0x9 0x0
31 #define MX6ULL_PAD_UART1_CTS_B__UART5_DCE_CTS 0x008C 0x0318 0x0000 0x9 0x0
[all …]
H A Dimx7ulp-pinfunc.h15 #define IMX7ULP_PAD_PTC0__PTC0 0x0000 0x0000 0x1 0x0
16 #define IMX7ULP_PAD_PTC0__TRACE_D15 0x0000 0x0000 0xa 0x0
17 #define IMX7ULP_PAD_PTC0__LPUART4_CTS_B 0x0000 0x0244 0x4 0x1
18 #define IMX7ULP_PAD_PTC0__LPI2C4_SCL 0x0000 0x0278 0x5 0x1
19 #define IMX7ULP_PAD_PTC0__TPM4_CLKIN 0x0000 0x0298 0x6 0x1
20 #define IMX7ULP_PAD_PTC0__FB_AD0 0x0000 0x0000 0x9 0x0
21 #define IMX7ULP_PAD_PTC1__PTC1 0x0004 0x0000 0x1 0x0
22 #define IMX7ULP_PAD_PTC1__TRACE_D14 0x0004 0x0000 0xa 0x0
23 #define IMX7ULP_PAD_PTC1__LPUART4_RTS_B 0x0004 0x0000 0x4 0x0
24 #define IMX7ULP_PAD_PTC1__LPI2C4_SDA 0x0004 0x027c 0x5 0x1
[all …]
H A Dimx6sx-pinfunc.h13 #define MX6SX_PAD_GPIO1_IO00__I2C1_SCL 0x0014 0x035C 0x07A8 0x0 0x1
14 #define MX6SX_PAD_GPIO1_IO00__USDHC1_VSELECT 0x0014 0x035C 0x0000 0x1 0x0
15 #define MX6SX_PAD_GPIO1_IO00__SPDIF_LOCK 0x0014 0x035C 0x0000 0x2 0x0
16 #define MX6SX_PAD_GPIO1_IO00__CCM_WAIT 0x0014 0x035C 0x0000 0x3 0x0
17 #define MX6SX_PAD_GPIO1_IO00__WDOG1_WDOG_ANY 0x0014 0x035C 0x0000 0x4 0x0
18 #define MX6SX_PAD_GPIO1_IO00__GPIO1_IO_0 0x0014 0x035C 0x0000 0x5 0x0
19 #define MX6SX_PAD_GPIO1_IO00__SNVS_HP_WRAPPER_VIO_5 0x0014 0x035C 0x0000 0x6 0x0
20 #define MX6SX_PAD_GPIO1_IO00__PHY_DTB_1 0x0014 0x035C 0x0000 0x7 0x0
21 #define MX6SX_PAD_GPIO1_IO01__I2C1_SDA 0x0018 0x0360 0x07AC 0x0 0x1
22 #define MX6SX_PAD_GPIO1_IO01__USDHC1_RESET_B 0x0018 0x0360 0x0000 0x1 0x0
[all …]
H A Dat91-natte.dtsi13 #mux-control-cells = <0>;
15 mux-gpios = <&ioexp 0 GPIO_ACTIVE_HIGH>,
60 #size-cells = <0>;
62 i2c@0 {
63 reg = <0>;
65 #size-cells = <0>;
69 reg = <0x9>;
81 #size-cells = <0>;
85 reg = <0x9>;
97 #size-cells = <0>;
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dimx6ull-pinfunc.h17 #define MX6UL_PAD_ENET2_RX_DATA0__EPDC_SDDO08 0x00E4 0x0370 0x0000 0x9 0x0
18 #define MX6UL_PAD_ENET2_RX_DATA1__EPDC_SDDO09 0x00E8 0x0374 0x0000 0x9 0x0
19 #define MX6UL_PAD_ENET2_RX_EN__EPDC_SDDO10 0x00EC 0x0378 0x0000 0x9 0x0
20 #define MX6UL_PAD_ENET2_TX_DATA0__EPDC_SDDO11 0x00F0 0x037C 0x0000 0x9 0x0
21 #define MX6UL_PAD_ENET2_TX_DATA1__EPDC_SDDO12 0x00F4 0x0380 0x0000 0x9 0x0
22 #define MX6UL_PAD_ENET2_TX_EN__EPDC_SDDO13 0x00F8 0x0384 0x0000 0x9 0x0
23 #define MX6UL_PAD_ENET2_TX_CLK__EPDC_SDDO14 0x00FC 0x0388 0x0000 0x9 0x0
24 #define MX6UL_PAD_ENET2_RX_ER__EPDC_SDDO15 0x0100 0x038C 0x0000 0x9 0x0
25 #define MX6UL_PAD_LCD_CLK__EPDC_SDCLK 0x0104 0x0390 0x0000 0x9 0x0
26 #define MX6UL_PAD_LCD_ENABLE__EPDC_SDLE 0x0108 0x0394 0x0000 0x9 0x0
[all …]
H A Dimx6sx-pinfunc.h17 #define MX6SX_PAD_GPIO1_IO00__I2C1_SCL 0x0014 0x035C 0x07A8 0x0 0x1
18 #define MX6SX_PAD_GPIO1_IO00__USDHC1_VSELECT 0x0014 0x035C 0x0000 0x1 0x0
19 #define MX6SX_PAD_GPIO1_IO00__SPDIF_LOCK 0x0014 0x035C 0x0000 0x2 0x0
20 #define MX6SX_PAD_GPIO1_IO00__CCM_WAIT 0x0014 0x035C 0x0000 0x3 0x0
21 #define MX6SX_PAD_GPIO1_IO00__WDOG1_WDOG_ANY 0x0014 0x035C 0x0000 0x4 0x0
22 #define MX6SX_PAD_GPIO1_IO00__GPIO1_IO_0 0x0014 0x035C 0x0000 0x5 0x0
23 #define MX6SX_PAD_GPIO1_IO00__SNVS_HP_WRAPPER_VIO_5 0x0014 0x035C 0x0000 0x6 0x0
24 #define MX6SX_PAD_GPIO1_IO00__PHY_DTB_1 0x0014 0x035C 0x0000 0x7 0x0
25 #define MX6SX_PAD_GPIO1_IO01__I2C1_SDA 0x0018 0x0360 0x07AC 0x0 0x1
26 #define MX6SX_PAD_GPIO1_IO01__USDHC1_RESET_B 0x0018 0x0360 0x0000 0x1 0x0
[all …]
H A Dimx7ulp-pinfunc.h26 #define ULP1_PAD_PTA0_LLWU0_P0__CMP0_IN2A 0x0000 0x0000 0x0 0x0
27 #define ULP1_PAD_PTA0_LLWU0_P0__PTA0 0x0000 0x0000 0x1 0x0
28 #define ULP1_PAD_PTA0_LLWU0_P0__LLWU0_P0 0x0000 0x0000 0xd 0x0
29 #define ULP1_PAD_PTA0_LLWU0_P0__LPSPI0_PCS1 0x0000 0xd104 0x3 0x2
30 #define ULP1_PAD_PTA0_LLWU0_P0__LPUART0_CTS_B 0x0000 0xd1f8 0x4 0x2
31 #define ULP1_PAD_PTA0_LLWU0_P0__LPI2C0_SCL 0x0000 0xd17c 0x5 0x2
32 #define ULP1_PAD_PTA0_LLWU0_P0__TPM0_CLKIN 0x0000 0xd1a8 0x6 0x2
33 #define ULP1_PAD_PTA0_LLWU0_P0__I2S0_RX_BCLK 0x0000 0x01b8 0x7 0x2
34 #define ULP1_PAD_PTA1__CMP0_IN2B 0x0004 0x0000 0x0 0x0
35 #define ULP1_PAD_PTA1__PTA1 0x0004 0x0000 0x1 0x0
[all …]
H A Drk3328-sdram-ddr4-666.dtsi6 0x1
7 0xA
8 0x2
9 0x1
10 0x0
11 0x0
12 0x11
13 0x0
14 0
15 0
[all …]
H A Drk3328-sdram-lpddr3-666.dtsi9 0x1
10 0xC
11 0x3
12 0x1
13 0x0
14 0x0
15 0x10
16 0x10
17 0
18 0
[all …]
H A Drk3328-sdram-ddr3-666.dtsi9 0x1
10 0xC
11 0x3
12 0x1
13 0x0
14 0x0
15 0x10
16 0x10
17 0
18 0
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/cpu/armv8/
H A Dpsci.S72 PSCI_TABLE(0, 0)
98 PSCI_TABLE(0, 0)
104 ldr x15, =0x3C0
133 /* Caller must put PSCI function-ID table base in x9 */
136 1: ldr x10, [x9] /* Load PSCI function table */
138 ubfx x10, x10, #0, #32
142 add x9, x9, #8 /* If not match, try next entry */
152 ldr x0, =0xFFFFFFFF
156 /* SMC function ID 0x84000000-0x8400001F: 32 bits PSCI */
157 ldr w9, =0x8400001F
[all …]
H A Dsleep.S22 * return value: 0 - cpu resumed from suspended state.
32 stp x9, x10, [sp, #32]
74 ldp x9, x10, [sp, #32]
96 stp x8, x9, [sp, #48]
113 mrs x9, hcr_el2
116 stp x2, x3, [x0, #0]
119 stp x8, x9, [x0, #48]
125 ldp x8, x9, [sp, #48]
134 msr daifset, #0x03
167 ldp x8, x9, [x0, #48]
[all …]
/OK3568_Linux_fs/kernel/drivers/rkflash/
H A Drk_sftl_arm_v8_clang.S16 .word 0
24 // %bb.0:
38 ldr x9, [x19, :lo12:p_valid_page_count_table]
43 ldrh w6, [x9, x1, lsl #1]
51 ldr x9, [x19, :lo12:p_valid_page_count_table]
56 ldrh w6, [x9, x1, lsl #1]
64 ldr x9, [x19, :lo12:p_valid_page_count_table]
69 ldrh w6, [x9, x1, lsl #1]
77 ldr x9, [x19, :lo12:p_valid_page_count_table]
82 ldrh w6, [x9, x1, lsl #1]
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/crypto/
H A Dpoly1305-core.S_shipped29 mov x9,#0xfffffffc0fffffff
30 movk x9,#0x0fff,lsl#48
35 and x7,x7,x9 // &=0ffffffc0fffffff
36 and x9,x9,#-4
37 and x8,x8,x9 // &=0ffffffc0ffffffc
96 cmp x17,#0 // is_base2_26?
97 add x9,x8,x8,lsr#2 // s1 = r1 + (r1 >> 2)
116 mul x10,x5,x9 // h1*5*r1
117 umulh x11,x5,x9
130 mul x10,x6,x9 // h2*5*r1
[all …]
H A Dpoly1305-armv8.pl34 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
44 my ($ctx,$inp,$len,$padbit) = map("x$_",(0..3));
78 mov $s1,#0xfffffffc0fffffff
79 movk $s1,#0x0fff,lsl#48
84 and $r0,$r0,$s1 // &=0ffffffc0fffffff
86 and $r1,$r1,$s1 // &=0ffffffc0ffffffc
145 cmp x17,#0 // is_base2_26?
233 cmp $r0,#0 // is_base2_26?
262 my ($R0,$R1,$S1,$R2,$S2,$R3,$S3,$R4,$S4) = map("v$_.4s",(0..8));
313 and x12,$h0,#0x03ffffff // base 2^64 -> base 2^26
[all …]
H A Dsha512-core.S_shipped74 add x29,sp,#0
97 rev x3,x3 // 0
175 eor x9,x21,x21,ror#23
181 eor x16,x16,x9,ror#18 // Sigma1(e)
182 ror x9,x25,#28
189 eor x17,x9,x17,ror#34 // Sigma0(a)
220 ldp x9,x10,[x1],#2*8
243 rev x9,x9 // 6
251 add x21,x21,x9 // h+=X[i]
394 str x7,[sp,#0]
[all …]
/OK3568_Linux_fs/u-boot/drivers/ram/rockchip/
H A Dsdram-px30-ddr_skew.inc2 0x77,
3 0x88,
4 0x79,
5 0x79,
6 0x87,
7 0x97,
8 0x87,
9 0x78,
10 0x77,
11 0x78,
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/lib/
H A Dgic_64.S30 mov w9, #0x37 /* EnableGrp0 | EnableGrp1NS */
34 and w10, w9, #0x1f /* ITLinesNumber */
38 mov w9, #~0
39 0: str w9, [x11], #0x4
40 str wzr, [x12], #0x4 /* Config SPIs as Group1NS */
41 sub w10, w10, #0x1
42 cbnz w10, 0b
44 mov w9, #0x3 /* EnableGrp0 | EnableGrp1 */
47 and w10, w9, #0x1f /* ITLinesNumber */
50 mov w9, #~0 /* Config SPIs as Grp1 */
[all …]
H A Dcrt0_64.S53 * environment has BSS (initialized to 0), initialized non-const
71 * Set up initial C runtime environment and call board_init_f(0).
80 bic sp, x0, #0xf /* 16-byte alignment for ABI compliance */
99 bic sp, x0, #0xf /* 16-byte alignment for ABI compliance */
107 ldr x9, _TEXT_BASE /* x9 <- Linked value of _start */
108 sub x9, x9, x0 /* x9 <- Run-vs-link offset */
109 add lr, lr, x9
112 ldr x9, [x18, #GD_RELOC_OFF] /* x9 <- gd->reloc_off */
113 add lr, lr, x9 /* new return address after relocation */
128 cmp x0, #0
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/mm/
H A Dproc.S34 #define TCR_KASLR_FLAGS 0
45 #define TCR_KASAN_SW_FLAGS 0
88 mrs x9, mdscr_el1
100 stp x8, x9, [x0, #48]
121 ldp x9, x10, [x0, #48]
141 msr vbar_el1, x9
220 tbz \type, #0, skip_\()\type // Skip invalid and
248 end_pudp .req x9
433 mov mte_tcr, #0
452 * If GCR_EL1.RRND=1 is implemented the same way as RRND=0, then
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_4_1_sh_mask.h27 #define MM_INDEX__MM_OFFSET_MASK 0x7fffffff
28 #define MM_INDEX__MM_OFFSET__SHIFT 0x0
29 #define MM_INDEX__MM_APER_MASK 0x80000000
30 #define MM_INDEX__MM_APER__SHIFT 0x1f
31 #define MM_INDEX_HI__MM_OFFSET_HI_MASK 0xffffffff
32 #define MM_INDEX_HI__MM_OFFSET_HI__SHIFT 0x0
33 #define MM_DATA__MM_DATA_MASK 0xffffffff
34 #define MM_DATA__MM_DATA__SHIFT 0x0
35 #define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE_MASK 0x2
36 #define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE__SHIFT 0x1
[all …]
H A Dbif_5_0_sh_mask.h27 #define MM_INDEX__MM_OFFSET_MASK 0x7fffffff
28 #define MM_INDEX__MM_OFFSET__SHIFT 0x0
29 #define MM_INDEX__MM_APER_MASK 0x80000000
30 #define MM_INDEX__MM_APER__SHIFT 0x1f
31 #define MM_INDEX_HI__MM_OFFSET_HI_MASK 0xffffffff
32 #define MM_INDEX_HI__MM_OFFSET_HI__SHIFT 0x0
33 #define MM_DATA__MM_DATA_MASK 0xffffffff
34 #define MM_DATA__MM_DATA__SHIFT 0x0
35 #define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE_MASK 0x2
36 #define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE__SHIFT 0x1
[all …]
/OK3568_Linux_fs/kernel/arch/arm/crypto/
H A Dchacha-scalar-core.S14 * (x8, x9) to the stack and swap them out with (x10, x11). This adds one
24 * similarly for row 'd'. (brot, drot) start out as (0, 0) but we make it such
38 X9_X11 .req r9 // shared by x9 and x11
49 and \t1, \in, #0xff00
50 and \t2, \in, #0xff0000
123 // quarterrounds: (x0, x4, x8, x12) and (x1, x5, x9, x13)
126 // save (x8, x9); restore (x10, x11)
127 __strd X8_X10, X9_X11, sp, 0
141 // save (x10, x11); restore (x8, x9)
143 __ldrd X8_X10, X9_X11, sp, 0
[all …]
/OK3568_Linux_fs/kernel/drivers/input/touchscreen/focaltech_touch_ft5436/include/firmware/
H A Dfw_sample.h1 0x2, 0x20,0x7, 0x2, 0xb9,0xe2,0xeb,0xaa,0x8, 0x22,0x22,0x2, 0x0, 0x4a,0xb4,0x2,
2 0x4, 0xa9,0xb7,0xea,0x22,0x24,0xff,0xa9,0x97,0xea,0x22,0x2, 0x68,0x1c,0xb4,0x2,
3 0x4, 0xa9,0xb6,0xea,0x22,0x24,0xff,0xa9,0x96,0xea,0x22,0x2, 0x88,0x1c,0x7f,0x60,
4 0xa9,0xc2,0xea,0x74,0x1, 0x12,0x13,0xcb,0x7f,0x6, 0x12,0x5, 0xb4,0x7f,0x6, 0x2,
5 0x9, 0xa1,0x22,0x2, 0x88,0x38,0xe4,0x2, 0x2a,0x20,0x32,0x2, 0x0, 0x5a,0x12,0x10,
6 0xa2,0x2, 0x13,0xae,0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x32,0x2, 0x0, 0x76,0x1, 0x2,
7 0x4, 0x8, 0x10,0x20,0x40,0x80,0x2, 0x3c,0x93,0x32,0xff,0x2, 0x0, 0x69,0xb2,0x86,
8 0x22,0xff,0xff,0x2, 0x10,0x52,0xca,0x7b,0xca,0x6b,0xca,0x5b,0xca,0x4b,0xca,0x2b,
9 0xca,0x1b,0xca,0xb, 0xc0,0xd0,0xc0,0x83,0xc0,0x82,0xd2,0xf, 0x7e,0xf, 0x3b,0x10,
10 0x69,0x30,0x0, 0x4, 0x7a,0x73,0x3b,0x20,0x7e,0x73,0x3b,0x20,0xa, 0x37,0x5e,0x34,
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_enum.h28 DC_IH_SRC_ID_START = 0x1,
29 DC_IH_SRC_ID_END = 0x1f,
30 VGA_IH_SRC_ID_START = 0x20,
31 VGA_IH_SRC_ID_END = 0x27,
32 CAP_IH_SRC_ID_START = 0x28,
33 CAP_IH_SRC_ID_END = 0x2f,
34 VIP_IH_SRC_ID_START = 0x30,
35 VIP_IH_SRC_ID_END = 0x3f,
36 ROM_IH_SRC_ID_START = 0x40,
37 ROM_IH_SRC_ID_END = 0x5d,
[all …]

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