xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/at91-natte.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * at91-natte.dts - Device Tree include file for the Natte board
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2017 Axentia Technologies AB
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Author: Peter Rosin <peda@axentia.se>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun/ {
11*4882a593Smuzhiyun	mux: mux-controller {
12*4882a593Smuzhiyun		compatible = "gpio-mux";
13*4882a593Smuzhiyun		#mux-control-cells = <0>;
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun		mux-gpios = <&ioexp 0 GPIO_ACTIVE_HIGH>,
16*4882a593Smuzhiyun			    <&ioexp 1 GPIO_ACTIVE_HIGH>,
17*4882a593Smuzhiyun			    <&ioexp 2 GPIO_ACTIVE_HIGH>;
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	batntc-mux {
21*4882a593Smuzhiyun		compatible = "io-channel-mux";
22*4882a593Smuzhiyun		io-channels = <&adc 5>;
23*4882a593Smuzhiyun		io-channel-names = "parent";
24*4882a593Smuzhiyun		mux-controls = <&mux>;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun		channels =
27*4882a593Smuzhiyun			"batntc0", "batntc1", "batntc2", "batntc3",
28*4882a593Smuzhiyun			"batntc4", "batntc5", "batntc6", "batntc7";
29*4882a593Smuzhiyun	};
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun	batv-mux {
32*4882a593Smuzhiyun		compatible = "io-channel-mux";
33*4882a593Smuzhiyun		io-channels = <&adc 6>;
34*4882a593Smuzhiyun		io-channel-names = "parent";
35*4882a593Smuzhiyun		mux-controls = <&mux>;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun		channels =
38*4882a593Smuzhiyun			"batv0", "batv1", "batv2", "batv3",
39*4882a593Smuzhiyun			"batv4", "batv5", "batv6", "batv7";
40*4882a593Smuzhiyun	};
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun	iout-mux {
43*4882a593Smuzhiyun		compatible = "io-channel-mux";
44*4882a593Smuzhiyun		io-channels = <&adc 7>;
45*4882a593Smuzhiyun		io-channel-names = "parent";
46*4882a593Smuzhiyun		mux-controls = <&mux>;
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun		channels =
49*4882a593Smuzhiyun			"iout0", "iout1", "iout2", "iout3",
50*4882a593Smuzhiyun			"iout4", "iout5", "iout6", "iout7";
51*4882a593Smuzhiyun	};
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun	i2c-mux {
54*4882a593Smuzhiyun		compatible = "i2c-mux";
55*4882a593Smuzhiyun		mux-locked;
56*4882a593Smuzhiyun		i2c-parent = <&i2c0>;
57*4882a593Smuzhiyun		mux-controls = <&mux>;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun		#address-cells = <1>;
60*4882a593Smuzhiyun		#size-cells = <0>;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun		i2c@0 {
63*4882a593Smuzhiyun			reg = <0>;
64*4882a593Smuzhiyun			#address-cells = <1>;
65*4882a593Smuzhiyun			#size-cells = <0>;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun			charger@9 {
68*4882a593Smuzhiyun				compatible = "ti,bq24735";
69*4882a593Smuzhiyun				reg = <0x9>;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun				ti,charge-current = <2000>;
72*4882a593Smuzhiyun				ti,charge-voltage = <16800>;
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun				poll-interval = <20000>;
75*4882a593Smuzhiyun			};
76*4882a593Smuzhiyun		};
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun		i2c@1 {
79*4882a593Smuzhiyun			reg = <1>;
80*4882a593Smuzhiyun			#address-cells = <1>;
81*4882a593Smuzhiyun			#size-cells = <0>;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun			charger@9 {
84*4882a593Smuzhiyun				compatible = "ti,bq24735";
85*4882a593Smuzhiyun				reg = <0x9>;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun				ti,charge-current = <2000>;
88*4882a593Smuzhiyun				ti,charge-voltage = <16800>;
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun				poll-interval = <20000>;
91*4882a593Smuzhiyun			};
92*4882a593Smuzhiyun		};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun		i2c@2 {
95*4882a593Smuzhiyun			reg = <2>;
96*4882a593Smuzhiyun			#address-cells = <1>;
97*4882a593Smuzhiyun			#size-cells = <0>;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun			charger@9 {
100*4882a593Smuzhiyun				compatible = "ti,bq24735";
101*4882a593Smuzhiyun				reg = <0x9>;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun				ti,charge-current = <2000>;
104*4882a593Smuzhiyun				ti,charge-voltage = <16800>;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun				poll-interval = <20000>;
107*4882a593Smuzhiyun			};
108*4882a593Smuzhiyun		};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun		i2c@3 {
111*4882a593Smuzhiyun			reg = <3>;
112*4882a593Smuzhiyun			#address-cells = <1>;
113*4882a593Smuzhiyun			#size-cells = <0>;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun			charger@9 {
116*4882a593Smuzhiyun				compatible = "ti,bq24735";
117*4882a593Smuzhiyun				reg = <0x9>;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun				ti,charge-current = <2000>;
120*4882a593Smuzhiyun				ti,charge-voltage = <16800>;
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun				poll-interval = <20000>;
123*4882a593Smuzhiyun			};
124*4882a593Smuzhiyun		};
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun		i2c@4 {
127*4882a593Smuzhiyun			reg = <4>;
128*4882a593Smuzhiyun			#address-cells = <1>;
129*4882a593Smuzhiyun			#size-cells = <0>;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun			charger@9 {
132*4882a593Smuzhiyun				compatible = "ti,bq24735";
133*4882a593Smuzhiyun				reg = <0x9>;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun				ti,charge-current = <2000>;
136*4882a593Smuzhiyun				ti,charge-voltage = <16800>;
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun				poll-interval = <20000>;
139*4882a593Smuzhiyun			};
140*4882a593Smuzhiyun		};
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun		i2c@5 {
143*4882a593Smuzhiyun			reg = <5>;
144*4882a593Smuzhiyun			#address-cells = <1>;
145*4882a593Smuzhiyun			#size-cells = <0>;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun			charger@9 {
148*4882a593Smuzhiyun				compatible = "ti,bq24735";
149*4882a593Smuzhiyun				reg = <0x9>;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun				ti,charge-current = <2000>;
152*4882a593Smuzhiyun				ti,charge-voltage = <16800>;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun				poll-interval = <20000>;
155*4882a593Smuzhiyun			};
156*4882a593Smuzhiyun		};
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun		i2c@6 {
159*4882a593Smuzhiyun			reg = <6>;
160*4882a593Smuzhiyun			#address-cells = <1>;
161*4882a593Smuzhiyun			#size-cells = <0>;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun			charger@9 {
164*4882a593Smuzhiyun				compatible = "ti,bq24735";
165*4882a593Smuzhiyun				reg = <0x9>;
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun				ti,charge-current = <2000>;
168*4882a593Smuzhiyun				ti,charge-voltage = <16800>;
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun				poll-interval = <20000>;
171*4882a593Smuzhiyun			};
172*4882a593Smuzhiyun		};
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun		i2c@7 {
175*4882a593Smuzhiyun			reg = <7>;
176*4882a593Smuzhiyun			#address-cells = <1>;
177*4882a593Smuzhiyun			#size-cells = <0>;
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun			charger@9 {
180*4882a593Smuzhiyun				compatible = "ti,bq24735";
181*4882a593Smuzhiyun				reg = <0x9>;
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun				ti,charge-current = <2000>;
184*4882a593Smuzhiyun				ti,charge-voltage = <16800>;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun				poll-interval = <20000>;
187*4882a593Smuzhiyun			};
188*4882a593Smuzhiyun		};
189*4882a593Smuzhiyun	};
190*4882a593Smuzhiyun};
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun&i2c0 {
193*4882a593Smuzhiyun	status = "okay";
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun	ioexp: ioexp@20 {
196*4882a593Smuzhiyun		#gpio-cells = <2>;
197*4882a593Smuzhiyun		compatible = "semtech,sx1502q";
198*4882a593Smuzhiyun		reg = <0x20>;
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun		gpio-controller;
201*4882a593Smuzhiyun		ngpios = <8>;
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun		pinctrl-names = "default";
204*4882a593Smuzhiyun		pinctrl-0 = <&gpio3_cfg_pins>;
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun		gpio3_cfg_pins: gpio3_cfg {
207*4882a593Smuzhiyun			pins = "gpio3";
208*4882a593Smuzhiyun			bias-pull-up;
209*4882a593Smuzhiyun		};
210*4882a593Smuzhiyun	};
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun	adc: adc@48 {
213*4882a593Smuzhiyun		compatible = "ti,ads1015";
214*4882a593Smuzhiyun		reg = <0x48>;
215*4882a593Smuzhiyun		#io-channel-cells = <1>;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun		#address-cells = <1>;
218*4882a593Smuzhiyun		#size-cells = <0>;
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun		channel@4 {
221*4882a593Smuzhiyun			reg = <4>;
222*4882a593Smuzhiyun			ti,gain = <2>;
223*4882a593Smuzhiyun			ti,datarate = <4>;
224*4882a593Smuzhiyun		};
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun		channel@5 {
227*4882a593Smuzhiyun			reg = <5>;
228*4882a593Smuzhiyun			ti,gain = <2>;
229*4882a593Smuzhiyun			ti,datarate = <4>;
230*4882a593Smuzhiyun		};
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun		channel@6 {
233*4882a593Smuzhiyun			reg = <6>;
234*4882a593Smuzhiyun			ti,gain = <1>;
235*4882a593Smuzhiyun			ti,datarate = <4>;
236*4882a593Smuzhiyun		};
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun		channel@7 {
239*4882a593Smuzhiyun			reg = <7>;
240*4882a593Smuzhiyun			ti,gain = <3>;
241*4882a593Smuzhiyun			ti,datarate = <4>;
242*4882a593Smuzhiyun		};
243*4882a593Smuzhiyun	};
244*4882a593Smuzhiyun};
245