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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/nvmem/
H A Dqcom,qfprom.yaml64 reg = <0 0x00784000 0 0x8ff>,
65 <0 0x00780000 0 0x7a0>,
66 <0 0x00782000 0 0x100>,
67 <0 0x00786000 0 0x1fff>;
76 reg = <0x25b 0x1>;
89 reg = <0 0x00784000 0 0x8ff>;
94 reg = <0x1eb 0x1>;
/OK3568_Linux_fs/kernel/drivers/mfd/
H A Dtimberdale.h23 #define TIMB_REV_MAJOR 0x00
24 #define TIMB_REV_MINOR 0x04
25 #define TIMB_HW_CONFIG 0x08
26 #define TIMB_SW_RST 0x40
29 #define TIMB_HW_CONFIG_SPI_8BIT 0x80
31 #define TIMB_HW_VER_MASK 0x0f
32 #define TIMB_HW_VER0 0x00
33 #define TIMB_HW_VER1 0x01
34 #define TIMB_HW_VER2 0x02
35 #define TIMB_HW_VER3 0x03
[all …]
/OK3568_Linux_fs/kernel/drivers/ssb/
H A Ddriver_gige.c116 if ((PCI_SLOT(devfn) > 0) || (PCI_FUNC(devfn) > 0)) in ssb_gige_pci_read_config()
146 if ((PCI_SLOT(devfn) > 0) || (PCI_FUNC(devfn) > 0)) in ssb_gige_pci_write_config()
185 dev->pci_controller.io_map_base = 0x800; in ssb_gige_probe()
190 dev->io_resource.start = 0x800; in ssb_gige_probe()
191 dev->io_resource.end = 0x8FF; in ssb_gige_probe()
195 ssb_device_enable(sdev, 0); in ssb_gige_probe()
200 gige_pcicfg_write32(dev, PCI_BASE_ADDRESS_1, 0); in ssb_gige_probe()
204 dev->mem_resource.end = base + 0x10000 - 1; in ssb_gige_probe()
218 gige_write32(dev, SSB_GIGE_SHIM_FLUSHSTAT, 0x00000068); in ssb_gige_probe()
231 dev->has_rgmii = 0; in ssb_gige_probe()
[all …]
/OK3568_Linux_fs/kernel/drivers/ata/
H A Dahci_imx.c28 IMX_TIMER1MS = 0x00e0,
30 IMX_P0PHYCR = 0x0178,
37 IMX_P0PHYSR = 0x017c,
39 IMX_P0PHYSR_CR_DATA_OUT = 0xffff << 0,
41 IMX_LANE0_OUT_STAT = 0x2003,
44 IMX_CLOCK_RESET = 0x7f3f,
45 IMX_CLOCK_RESET_RESET = 1 << 0,
47 IMX8QM_SATA_PHY_RX_IMPED_RATIO_OFFSET = 0x03,
48 IMX8QM_SATA_PHY_TX_IMPED_RATIO_OFFSET = 0x09,
49 IMX8QM_SATA_PHY_IMPED_RATIO_85OHM = 0x6c,
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_0_d.h27 #define mmMC_CONFIG 0x800
28 #define mmMC_ARB_AGE_CNTL 0x9bf
29 #define mmMC_ARB_RET_CREDITS2 0x9c0
30 #define mmMC_ARB_FED_CNTL 0x9c1
31 #define mmMC_ARB_GECC2_STATUS 0x9c2
32 #define mmMC_ARB_GECC2_MISC 0x9c3
33 #define mmMC_ARB_GECC2_DEBUG 0x9c4
34 #define mmMC_ARB_GECC2_DEBUG2 0x9c5
35 #define mmMC_ARB_GECC2 0x9c9
36 #define mmMC_ARB_GECC2_CLI 0x9ca
[all …]
H A Dgmc_8_2_d.h27 #define mmMC_CONFIG 0x800
28 #define mmMC_ARB_ATOMIC 0x9be
29 #define mmMC_ARB_AGE_CNTL 0x9bf
30 #define mmMC_ARB_RET_CREDITS2 0x9c0
31 #define mmMC_ARB_FED_CNTL 0x9c1
32 #define mmMC_ARB_GECC2_STATUS 0x9c2
33 #define mmMC_ARB_GECC2_MISC 0x9c3
34 #define mmMC_ARB_GECC2_DEBUG 0x9c4
35 #define mmMC_ARB_GECC2_DEBUG2 0x9c5
36 #define mmMC_ARB_PERF_CID 0x9c6
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/rtl8192e/rtl8192e/
H A Dr8192E_phyreg.h11 #define RF_DATA 0x1d4
13 #define rPMAC_Reset 0x100
14 #define rPMAC_TxStart 0x104
15 #define rPMAC_TxLegacySIG 0x108
16 #define rPMAC_TxHTSIG1 0x10c
17 #define rPMAC_TxHTSIG2 0x110
18 #define rPMAC_PHYDebug 0x114
19 #define rPMAC_TxPacketNum 0x118
20 #define rPMAC_TxIdle 0x11c
21 #define rPMAC_TxMACHeader0 0x120
[all …]
/OK3568_Linux_fs/u-boot/include/
H A Dec_commands.h31 #define EC_PROTO_VERSION 0x00000002
37 #define EC_LPC_ADDR_ACPI_DATA 0x62
38 #define EC_LPC_ADDR_ACPI_CMD 0x66
41 #define EC_LPC_ADDR_HOST_DATA 0x200
42 #define EC_LPC_ADDR_HOST_CMD 0x204
46 #define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */
47 #define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is
50 #define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */
51 #define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */
53 /* The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/smu/
H A Dsmu_8_0_enum.h28 DBG_BLOCK_ID_RESERVED = 0x0,
29 DBG_BLOCK_ID_DBG = 0x1,
30 DBG_BLOCK_ID_VMC = 0x2,
31 DBG_BLOCK_ID_PDMA = 0x3,
32 DBG_BLOCK_ID_CG = 0x4,
33 DBG_BLOCK_ID_SRBM = 0x5,
34 DBG_BLOCK_ID_GRBM = 0x6,
35 DBG_BLOCK_ID_RLC = 0x7,
36 DBG_BLOCK_ID_CSC = 0x8,
37 DBG_BLOCK_ID_SEM = 0x9,
[all …]
H A Dsmu_7_1_2_enum.h27 #define CG_SRBM_START_ADDR 0x600
28 #define CG_SRBM_END_ADDR 0x8ff
29 #define RCU_CCF_DWORDS0 0xa0
30 #define RCU_CCF_BITS0 0x1400
31 #define RCU_CCF_DWORDS1 0x0
32 #define RCU_CCF_BITS1 0x0
33 #define RCU_SAM_BYTES 0x2c
34 #define RCU_SAM_RTL_BYTES 0x2c
35 #define RCU_SMU_BYTES 0x14
36 #define RCU_SMU_RTL_BYTES 0x14
[all …]
H A Dsmu_7_1_1_enum.h27 #define CG_SRBM_START_ADDR 0x600
28 #define CG_SRBM_END_ADDR 0x8ff
29 #define RCU_CCF_DWORDS0 0x80
30 #define RCU_CCF_BITS0 0x1000
31 #define RCU_CCF_DWORDS1 0x0
32 #define RCU_CCF_BITS1 0x0
33 #define RCU_SAM_BYTES 0x0
34 #define RCU_SAM_RTL_BYTES 0x0
35 #define RCU_SMU_BYTES 0x0
36 #define RCU_SMU_RTL_BYTES 0x0
[all …]
H A Dsmu_7_1_0_enum.h27 #define CG_SRBM_START_ADDR 0x600
28 #define CG_SRBM_END_ADDR 0x8ff
29 #define RCU_CCF_DWORDS0 0x28
30 #define RCU_CCF_BITS0 0x500
31 #define RCU_CCF_DWORDS1 0x7f
32 #define RCU_CCF_BITS1 0x1000
33 #define RCU_SAM_BYTES 0x40
34 #define RCU_SAM_RTL_BYTES 0x40
35 #define KEYS_CHAIN_ADR 0x0
36 #define SAMU_KEY_SADR 0xa0
[all …]
H A Dsmu_7_1_3_enum.h27 #define CG_SRBM_START_ADDR 0x600
28 #define CG_SRBM_END_ADDR 0x8ff
29 #define RCU_CCF_DWORDS0 0xa0
30 #define RCU_CCF_BITS0 0x1400
31 #define RCU_SAM_BYTES 0x2c
32 #define RCU_SAM_RTL_BYTES 0x2c
33 #define RCU_SMU_BYTES 0x14
34 #define RCU_SMU_RTL_BYTES 0x14
35 #define SFP_CHAIN_ADDR 0x1
36 #define SFP_SADR 0x0
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8189es/include/
H A DHal8188EPhyReg.h24 // BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
26 // 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
27 // 3. RF register 0x00-2E
35 // 1. Page1(0x100)
37 #define rPMAC_Reset 0x100
38 #define rPMAC_TxStart 0x104
39 #define rPMAC_TxLegacySIG 0x108
40 #define rPMAC_TxHTSIG1 0x10c
41 #define rPMAC_TxHTSIG2 0x110
42 #define rPMAC_PHYDebug 0x114
[all …]
H A DHal8188FPhyReg.h30 // BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
32 // 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
33 // 3. RF register 0x00-2E
41 // 1. Page1(0x100)
43 #define rPMAC_Reset 0x100
44 #define rPMAC_TxStart 0x104
45 #define rPMAC_TxLegacySIG 0x108
46 #define rPMAC_TxHTSIG1 0x10c
47 #define rPMAC_TxHTSIG2 0x110
48 #define rPMAC_PHYDebug 0x114
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/
H A DHal8188EPhyReg.h24 // BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
26 // 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
27 // 3. RF register 0x00-2E
35 // 1. Page1(0x100)
37 #define rPMAC_Reset 0x100
38 #define rPMAC_TxStart 0x104
39 #define rPMAC_TxLegacySIG 0x108
40 #define rPMAC_TxHTSIG1 0x10c
41 #define rPMAC_TxHTSIG2 0x110
42 #define rPMAC_PHYDebug 0x114
[all …]
H A DHal8188FPhyReg.h30 // BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
32 // 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
33 // 3. RF register 0x00-2E
41 // 1. Page1(0x100)
43 #define rPMAC_Reset 0x100
44 #define rPMAC_TxStart 0x104
45 #define rPMAC_TxLegacySIG 0x108
46 #define rPMAC_TxHTSIG1 0x10c
47 #define rPMAC_TxHTSIG2 0x110
48 #define rPMAC_PHYDebug 0x114
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/opp/
H A Dqcom-nvmem-cpufreq.txt48 0: MSM8996 V3, speedbin 0
52 4: MSM8996 SG, speedbin 0
62 #size-cells = <0>;
64 CPU0: cpu@0 {
67 reg = <0x0 0x0>;
69 clocks = <&kryocc 0>;
83 reg = <0x0 0x1>;
85 clocks = <&kryocc 0>;
95 reg = <0x0 0x100>;
111 reg = <0x0 0x101>;
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8189fs/include/
H A DHal8192FPhyReg.h19 #define rSYM_WLBT_PAPE_SEL 0x64
21 * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
23 * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
24 * 3. RF register 0x00-2E
32 * 1. Page1(0x100)
34 #define rPMAC_Reset 0x100
35 #define rPMAC_TxStart 0x104
36 #define rPMAC_TxLegacySIG 0x108
37 #define rPMAC_TxHTSIG1 0x10c
38 #define rPMAC_TxHTSIG2 0x110
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8188fu/include/
H A DHal8710BPhyReg.h18 #define rSYM_WLBT_PAPE_SEL 0x64
20 * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
22 * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
23 * 3. RF register 0x00-2E
31 * 1. Page1(0x100)
33 #define rPMAC_Reset 0x100
34 #define rPMAC_TxStart 0x104
35 #define rPMAC_TxLegacySIG 0x108
36 #define rPMAC_TxHTSIG1 0x10c
37 #define rPMAC_TxHTSIG2 0x110
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8821cs/include/
H A DHal8192FPhyReg.h18 #define rSYM_WLBT_PAPE_SEL 0x64
20 * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
22 * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
23 * 3. RF register 0x00-2E
31 * 1. Page1(0x100)
33 #define rPMAC_Reset 0x100
34 #define rPMAC_TxStart 0x104
35 #define rPMAC_TxLegacySIG 0x108
36 #define rPMAC_TxHTSIG1 0x10c
37 #define rPMAC_TxHTSIG2 0x110
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8189fs/include/
H A DHal8710BPhyReg.h18 #define rSYM_WLBT_PAPE_SEL 0x64
20 * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
22 * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
23 * 3. RF register 0x00-2E
31 * 1. Page1(0x100)
33 #define rPMAC_Reset 0x100
34 #define rPMAC_TxStart 0x104
35 #define rPMAC_TxLegacySIG 0x108
36 #define rPMAC_TxHTSIG1 0x10c
37 #define rPMAC_TxHTSIG2 0x110
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8188eu/include/
H A DHal8192FPhyReg.h19 #define rSYM_WLBT_PAPE_SEL 0x64
21 * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
23 * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
24 * 3. RF register 0x00-2E
32 * 1. Page1(0x100)
34 #define rPMAC_Reset 0x100
35 #define rPMAC_TxStart 0x104
36 #define rPMAC_TxLegacySIG 0x108
37 #define rPMAC_TxHTSIG1 0x10c
38 #define rPMAC_TxHTSIG2 0x110
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8822cs/include/
H A DHal8710BPhyReg.h18 #define rSYM_WLBT_PAPE_SEL 0x64
20 * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
22 * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
23 * 3. RF register 0x00-2E
31 * 1. Page1(0x100)
33 #define rPMAC_Reset 0x100
34 #define rPMAC_TxStart 0x104
35 #define rPMAC_TxLegacySIG 0x108
36 #define rPMAC_TxHTSIG1 0x10c
37 #define rPMAC_TxHTSIG2 0x110
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723cs/include/
H A DHal8192FPhyReg.h18 #define rSYM_WLBT_PAPE_SEL 0x64
20 * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
22 * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
23 * 3. RF register 0x00-2E
31 * 1. Page1(0x100)
33 #define rPMAC_Reset 0x100
34 #define rPMAC_TxStart 0x104
35 #define rPMAC_TxLegacySIG 0x108
36 #define rPMAC_TxHTSIG1 0x10c
37 #define rPMAC_TxHTSIG2 0x110
[all …]

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