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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/usb/
H A Dcdns,usb3.yaml85 reg = <0x00 0x6000000 0x00 0x10000>,
86 <0x00 0x6010000 0x00 0x10000>,
87 <0x00 0x6020000 0x00 0x10000>;
H A Dti,j721e-usb.yaml38 If present, it restricts the controller to USB2.0 mode of
85 reg = <0x00 0x4104000 0x00 0x100>;
96 reg = <0x00 0x6000000 0x00 0x10000>,
97 <0x00 0x6010000 0x00 0x10000>,
98 <0x00 0x6020000 0x00 0x10000>;
100 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
102 <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; /* otgirq.0 */
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/ti/
H A Dk3-j7200-main.dtsi11 reg = <0x00 0x70000000 0x00 0x100000>;
14 ranges = <0x00 0x00 0x70000000 0x100000>;
16 atf-sram@0 {
17 reg = <0x00 0x20000>;
23 reg = <0x00 0x00100000 0x00 0x1c000>;
26 ranges = <0x00 0x00 0x00100000 0x1c000>;
31 mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
32 <0x4088 0x3>, <0x408c 0x3>; /* SERDES0 lane2/3 select */
38 mux-reg-masks = <0x4000 0x8000000>; /* USB0 to SERDES0 lane 1/3 mux */
49 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
[all …]
H A Dk3-j721e-main.dtsi13 #clock-cells = <0>;
15 clock-frequency = <0>;
19 #clock-cells = <0>;
21 clock-frequency = <0>;
28 reg = <0x0 0x70000000 0x0 0x800000>;
31 ranges = <0x0 0x0 0x70000000 0x800000>;
33 atf-sram@0 {
34 reg = <0x0 0x20000>;
40 reg = <0 0x00100000 0 0x1c000>; /* excludes pinctrl region */
43 ranges = <0x0 0x0 0x00100000 0x1c000>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1088a.dtsi26 #size-cells = <0>;
29 cpu0: cpu@0 {
32 reg = <0x0>;
33 clocks = <&clockgen 1 0>;
41 reg = <0x1>;
42 clocks = <&clockgen 1 0>;
50 reg = <0x2>;
51 clocks = <&clockgen 1 0>;
59 reg = <0x3>;
60 clocks = <&clockgen 1 0>;
[all …]
H A Dfsl-ls208xa.dtsi32 #size-cells = <0>;
37 reg = <0x00000000 0x80000000 0 0x80000000>;
43 #clock-cells = <0>;
50 reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
51 <0x0 0x06100000 0 0x100000>, /* GICR (RD_base + SGI_base) */
52 <0x0 0x0c0c0000 0 0x2000>, /* GICC */
53 <0x0 0x0c0d0000 0 0x1000>, /* GICH */
54 <0x0 0x0c0e0000 0 0x20000>; /* GICV */
60 interrupts = <1 9 0x4>;
65 reg = <0x0 0x6020000 0 0x20000>;
[all …]
H A Dfsl-lx2160a.dtsi11 /memreserve/ 0x80000000 0x00010000;
25 #size-cells = <0>;
28 cpu0: cpu@0 {
32 reg = <0x0>;
33 clocks = <&clockgen 1 0>;
34 d-cache-size = <0x8000>;
37 i-cache-size = <0xC000>;
49 reg = <0x1>;
50 clocks = <&clockgen 1 0>;
51 d-cache-size = <0x8000>;
[all …]