1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/usb/ti,j721e-usb.yaml#" 5*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Bindings for the TI wrapper module for the Cadence USBSS-DRD controller 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Roger Quadros <rogerq@ti.com> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyunproperties: 13*4882a593Smuzhiyun compatible: 14*4882a593Smuzhiyun items: 15*4882a593Smuzhiyun - const: ti,j721e-usb 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun reg: 18*4882a593Smuzhiyun description: module registers 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun power-domains: 21*4882a593Smuzhiyun description: 22*4882a593Smuzhiyun PM domain provider node and an args specifier containing 23*4882a593Smuzhiyun the USB device id value. See, 24*4882a593Smuzhiyun Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun clocks: 27*4882a593Smuzhiyun description: Clock phandles to usb2_refclk and lpm_clk 28*4882a593Smuzhiyun minItems: 2 29*4882a593Smuzhiyun maxItems: 2 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun clock-names: 32*4882a593Smuzhiyun items: 33*4882a593Smuzhiyun - const: ref 34*4882a593Smuzhiyun - const: lpm 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun ti,usb2-only: 37*4882a593Smuzhiyun description: 38*4882a593Smuzhiyun If present, it restricts the controller to USB2.0 mode of 39*4882a593Smuzhiyun operation. Must be present if USB3 PHY is not available 40*4882a593Smuzhiyun for USB. 41*4882a593Smuzhiyun type: boolean 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun ti,vbus-divider: 44*4882a593Smuzhiyun description: 45*4882a593Smuzhiyun Should be present if USB VBUS line is connected to the 46*4882a593Smuzhiyun VBUS pin of the SoC via a 1/3 voltage divider. 47*4882a593Smuzhiyun type: boolean 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun assigned-clocks: 50*4882a593Smuzhiyun maxItems: 1 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun assigned-clock-parents: 53*4882a593Smuzhiyun maxItems: 1 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun '#address-cells': 56*4882a593Smuzhiyun const: 2 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun '#size-cells': 59*4882a593Smuzhiyun const: 2 60*4882a593Smuzhiyun 61*4882a593SmuzhiyunpatternProperties: 62*4882a593Smuzhiyun "^usb@": 63*4882a593Smuzhiyun type: object 64*4882a593Smuzhiyun 65*4882a593Smuzhiyunrequired: 66*4882a593Smuzhiyun - compatible 67*4882a593Smuzhiyun - reg 68*4882a593Smuzhiyun - power-domains 69*4882a593Smuzhiyun - clocks 70*4882a593Smuzhiyun - clock-names 71*4882a593Smuzhiyun 72*4882a593SmuzhiyunadditionalProperties: false 73*4882a593Smuzhiyun 74*4882a593Smuzhiyunexamples: 75*4882a593Smuzhiyun - | 76*4882a593Smuzhiyun #include <dt-bindings/soc/ti,sci_pm_domain.h> 77*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun bus { 80*4882a593Smuzhiyun #address-cells = <2>; 81*4882a593Smuzhiyun #size-cells = <2>; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun cdns_usb@4104000 { 84*4882a593Smuzhiyun compatible = "ti,j721e-usb"; 85*4882a593Smuzhiyun reg = <0x00 0x4104000 0x00 0x100>; 86*4882a593Smuzhiyun power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>; 87*4882a593Smuzhiyun clocks = <&k3_clks 288 15>, <&k3_clks 288 3>; 88*4882a593Smuzhiyun clock-names = "ref", "lpm"; 89*4882a593Smuzhiyun assigned-clocks = <&k3_clks 288 15>; /* USB2_REFCLK */ 90*4882a593Smuzhiyun assigned-clock-parents = <&k3_clks 288 16>; /* HFOSC0 */ 91*4882a593Smuzhiyun #address-cells = <2>; 92*4882a593Smuzhiyun #size-cells = <2>; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun usb@6000000 { 95*4882a593Smuzhiyun compatible = "cdns,usb3"; 96*4882a593Smuzhiyun reg = <0x00 0x6000000 0x00 0x10000>, 97*4882a593Smuzhiyun <0x00 0x6010000 0x00 0x10000>, 98*4882a593Smuzhiyun <0x00 0x6020000 0x00 0x10000>; 99*4882a593Smuzhiyun reg-names = "otg", "xhci", "dev"; 100*4882a593Smuzhiyun interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */ 101*4882a593Smuzhiyun <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, /* irq.6 */ 102*4882a593Smuzhiyun <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; /* otgirq.0 */ 103*4882a593Smuzhiyun interrupt-names = "host", 104*4882a593Smuzhiyun "peripheral", 105*4882a593Smuzhiyun "otg"; 106*4882a593Smuzhiyun maximum-speed = "super-speed"; 107*4882a593Smuzhiyun dr_mode = "otg"; 108*4882a593Smuzhiyun }; 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun }; 111