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/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Dmxgpu_vi.c47 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
48 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
49 mmCB_CGTT_SCLK_CTRL, 0xffffffff, 0x00000100,
50 mmCGTT_BCI_CLK_CTRL, 0xffffffff, 0x00000100,
51 mmCGTT_CP_CLK_CTRL, 0xffffffff, 0x00000100,
52 mmCGTT_CPC_CLK_CTRL, 0xffffffff, 0x00000100,
53 mmCGTT_CPF_CLK_CTRL, 0xffffffff, 0x40000100,
54 mmCGTT_DRM_CLK_CTRL0, 0xffffffff, 0x00600100,
55 mmCGTT_GDS_CLK_CTRL, 0xffffffff, 0x00000100,
56 mmCGTT_IA_CLK_CTRL, 0xffffffff, 0x06000100,
[all …]
H A Dsi.c59 mmAZALIA_SCLK_CONTROL, 0x00000030, 0x00000011,
60 mmCB_HW_CONTROL, 0x00010000, 0x00018208,
61 mmDB_DEBUG, 0xffffffff, 0x00000000,
62 mmDB_DEBUG2, 0xf00fffff, 0x00000400,
63 mmDB_DEBUG3, 0x0002021c, 0x00020200,
64 mmDCI_CLK_CNTL, 0x00000080, 0x00000000,
65 0x340c, 0x000000c0, 0x00800040,
66 0x360c, 0x000000c0, 0x00800040,
67 mmFBC_DEBUG_COMP, 0x000000f0, 0x00000070,
68 mmFBC_MISC, 0x00200000, 0x50100000,
[all …]
H A Dgmc_v8_0.c68 mmMC_ARB_WTM_GRPWT_RD, 0x00000003, 0x00000000,
69 mmMC_HUB_RDREQ_DMIF_LIMIT, 0x0000007f, 0x00000028,
70 mmMC_HUB_WDP_UMC, 0x00007fb6, 0x00000991,
71 mmVM_PRT_APERTURE0_LOW_ADDR, 0x0fffffff, 0x0fffffff,
72 mmVM_PRT_APERTURE1_LOW_ADDR, 0x0fffffff, 0x0fffffff,
73 mmVM_PRT_APERTURE2_LOW_ADDR, 0x0fffffff, 0x0fffffff,
74 mmVM_PRT_APERTURE3_LOW_ADDR, 0x0fffffff, 0x0fffffff,
79 mmMC_MEM_POWER_LS, 0xffffffff, 0x00000104
84 mmVM_PRT_APERTURE0_LOW_ADDR, 0x0fffffff, 0x0fffffff,
85 mmVM_PRT_APERTURE1_LOW_ADDR, 0x0fffffff, 0x0fffffff,
[all …]
H A Dgmc_v9_0.c64 …HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION 0x055d
66 …DCSURF_PRI_VIEWPORT_DIMENSION__PRI_VIEWPORT_WIDTH__SHIFT 0x0
67 …CSURF_PRI_VIEWPORT_DIMENSION__PRI_VIEWPORT_HEIGHT__SHIFT 0x10
68 …RI_VIEWPORT_DIMENSION__PRI_VIEWPORT_WIDTH_MASK 0x00003FFFL
69 …RI_VIEWPORT_DIMENSION__PRI_VIEWPORT_HEIGHT_MASK 0x3FFF0000L
70 …DCHUBBUB_SDPIF_MMIO_CNTRL_0 0x049d
91 [0][0] = "MP1",
92 [1][0] = "MP0",
93 [2][0] = "VCN",
94 [3][0] = "VCNU",
[all …]
H A Dgmc_v7_0.c63 mmVM_PRT_APERTURE0_LOW_ADDR, 0x0fffffff, 0x0fffffff,
64 mmVM_PRT_APERTURE1_LOW_ADDR, 0x0fffffff, 0x0fffffff,
65 mmVM_PRT_APERTURE2_LOW_ADDR, 0x0fffffff, 0x0fffffff,
66 mmVM_PRT_APERTURE3_LOW_ADDR, 0x0fffffff, 0x0fffffff
71 mmMC_MEM_POWER_LS, 0xffffffff, 0x00000104
76 switch (adev->asic_type) { in gmc_v7_0_init_golden_registers()
99 WREG32(mmBIF_FB_EN, 0); in gmc_v7_0_mc_stop()
102 MC_SHARED_BLACKOUT_CNTL, BLACKOUT_MODE, 0); in gmc_v7_0_mc_stop()
115 tmp = REG_SET_FIELD(tmp, MC_SHARED_BLACKOUT_CNTL, BLACKOUT_MODE, 0); in gmc_v7_0_mc_resume()
118 tmp = REG_SET_FIELD(0, BIF_FB_EN, FB_READ_EN, 1); in gmc_v7_0_mc_resume()
[all …]
H A Dgmc_v6_0.c55 #define MC_SEQ_MISC0__MT__MASK 0xf0000000
56 #define MC_SEQ_MISC0__MT__GDDR1 0x10000000
57 #define MC_SEQ_MISC0__MT__DDR2 0x20000000
58 #define MC_SEQ_MISC0__MT__GDDR3 0x30000000
59 #define MC_SEQ_MISC0__MT__GDDR4 0x40000000
60 #define MC_SEQ_MISC0__MT__GDDR5 0x50000000
61 #define MC_SEQ_MISC0__MT__HBM 0x60000000
62 #define MC_SEQ_MISC0__MT__DDR3 0xB0000000
73 WREG32(mmBIF_FB_EN, 0); in gmc_v6_0_mc_stop()
76 MC_SHARED_BLACKOUT_CNTL, BLACKOUT_MODE, 0); in gmc_v6_0_mc_stop()
[all …]
/OK3568_Linux_fs/kernel/arch/parisc/kernel/
H A Dperf_images.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Imagine for use with the Onyx (PCX-U) CPU interface
5 * Copyright (C) 2001 Randolph Chung <tausq at parisc-linux.org>
6 * Copyright (C) 2001 Hewlett-Packard (Grant Grundler)
27 0x4c00c000, 0x00000000, 0x00060000, 0x00000000,
28 0xe0e0e0e0, 0x004e0004, 0x07ffffff, 0xffc01380,
29 0x0101ffff, 0xfffff104, 0xe000c07f, 0xfffffffc,
30 0x01380010, 0x1fffffff, 0xff000000, 0x00000000,
31 0x00000fff, 0xff00000f, 0xffff0000, 0x0fffff00,
32 0x000fffff, 0x00000000, 0x00000000, 0x00ffffff,
[all …]
/OK3568_Linux_fs/external/security/librkcrypto/test/c_mode/
H A Ddes_core.c2 * FIPS-46-3 compliant Triple-DES implementation
4 * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
5 * SPDX-License-Identifier: Apache-2.0
11 * http://www.apache.org/licenses/LICENSE-2.0
25 * http://csrc.nist.gov/publications/fips/fips46-3/fips46-3.pdf
42 volatile unsigned char *p = (unsigned char*)v; while( n-- ) *p++ = 0; in mbedtls_zeroize()
46 * 32-bit integer manipulation macros (big endian)
69 * Expanded DES S-boxes
73 0x01010400, 0x00000000, 0x00010000, 0x01010404,
74 0x01010004, 0x00010404, 0x00000004, 0x00010000,
[all …]
/OK3568_Linux_fs/kernel/arch/sh/include/mach-common/mach/
H A Dsh7785lcr.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 * It can be changed with DIP switch(S2-5).
9 * phys address | S2-5 = OFF | S2-5 = ON
10 * -----------------------------+---------------+---------------
11 * 0x00000000 - 0x03ffffff(CS0) | NOR Flash | NOR Flash
12 * 0x04000000 - 0x05ffffff(CS1) | PLD | PLD
13 * 0x06000000 - 0x07ffffff(CS1) | I2C | I2C
14 * 0x08000000 - 0x0bffffff(CS2) | USB | DDR SDRAM
15 * 0x0c000000 - 0x0fffffff(CS3) | SD | DDR SDRAM
16 * 0x10000000 - 0x13ffffff(CS4) | SM107 | SM107
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/bus/
H A Dsocionext,uniphier-system-bus.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/bus/socionext,uniphier-system-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The UniPhier System Bus is an external bus that connects on-board devices to
11 the UniPhier SoC. It is a simple (semi-)parallel bus with address, data, and
16 within each bank to the CPU-viewed address. The needed setup includes the
21 - Masahiro Yamada <yamada.masahiro@socionext.com>
25 const: socionext,uniphier-system-bus
30 "#address-cells":
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dregsnv04.h1 /* SPDX-License-Identifier: MIT */
5 #define NV04_PFIFO_DELAY_0 0x00002040
6 #define NV04_PFIFO_DMA_TIMESLICE 0x00002044
7 #define NV04_PFIFO_NEXT_CHANNEL 0x00002050
8 #define NV03_PFIFO_INTR_0 0x00002100
9 #define NV03_PFIFO_INTR_EN_0 0x00002140
10 # define NV_PFIFO_INTR_CACHE_ERROR (1<<0)
17 #define NV03_PFIFO_RAMHT 0x00002210
18 #define NV03_PFIFO_RAMFC 0x00002214
19 #define NV03_PFIFO_RAMRO 0x00002218
[all …]
/OK3568_Linux_fs/kernel/arch/mips/include/asm/mach-malta/
H A Dspaces.h17 * 0x00000000 - 0x0fffffff: 1st RAM region, 256MB
18 * 0x10000000 - 0x1bffffff: GIC and CPC Control Registers
19 * 0x1c000000 - 0x1fffffff: I/O And Flash
20 * 0x20000000 - 0x7fffffff: 2nd RAM region, 1.5GB
21 * 0x80000000 - 0xffffffff: Physical memory aliases to 0x0 (2GB)
23 * The kernel is still located in 0x80000000(kseg0). However,
24 * the physical mask has been shifted to 0x80000000 which exploits the alias
27 * words, the 0x80000000 virtual address maps to 0x80000000 physical address
28 * which in turn aliases to 0x0. We do this in order to be able to use a flat
29 * 2GB of memory (0x80000000 - 0xffffffff) so we can avoid the I/O hole in
[all …]
/OK3568_Linux_fs/u-boot/board/renesas/sh7785lcr/
H A DREADME.sh7785lcr10 - SH7785 (SH-4A)
11 - DDR2-SDRAM 512MB
12 - NOR Flash 64MB
13 - 2D Graphic controller
14 - SATA controller
15 - Ethernet controller
16 - USB host/peripheral controller
17 - SD controller
18 - I2C controller
19 - RTC
[all …]
/OK3568_Linux_fs/kernel/arch/mips/pic32/pic32mzda/
H A Dconfig.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <asm/mach-pic32/pic32.h>
14 #define PIC32_CFGCON 0x0000
15 #define PIC32_DEVID 0x0020
16 #define PIC32_SYSKEY 0x0030
17 #define PIC32_CFGEBIA 0x00c0
18 #define PIC32_CFGEBIC 0x00d0
19 #define PIC32_CFGCON2 0x00f0
20 #define PIC32_RCON 0x1240
49 return 0; in pic32_conf_modify_atomic()
[all …]
/OK3568_Linux_fs/u-boot/drivers/dma/
H A DMCD_tasksInit.c2 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
19 /* Task 0 */
28 MCD_SET_VAR(taskChan, 25, (u32) (0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */ in MCD_startDmaChainNoEu()
29 MCD_SET_VAR(taskChan, 24, (u32) (0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */ in MCD_startDmaChainNoEu()
31 MCD_SET_VAR(taskChan, 26, (u32) (0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */ in MCD_startDmaChainNoEu()
32 MCD_SET_VAR(taskChan, 0, (u32) cSave); /* var[0] */ in MCD_startDmaChainNoEu()
33 MCD_SET_VAR(taskChan, 1, (u32) 0x00000000); /* var[1] */ in MCD_startDmaChainNoEu()
34 MCD_SET_VAR(taskChan, 3, (u32) 0x00000000); /* var[3] */ in MCD_startDmaChainNoEu()
35 MCD_SET_VAR(taskChan, 4, (u32) 0x00000000); /* var[4] */ in MCD_startDmaChainNoEu()
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8822cs/hal/phydm/rtl8822c/
H A Dhalhwimg8822c_bb.c3 * Copyright(c) 2007 - 2017 Realtek Corporation.
30 #define CUT_DONT_CARE 0xf
31 #define RFE_DONT_CARE 0xff
32 #define PARA_IF 0x8
33 #define PARA_ELSE_IF 0x9
34 #define PARA_ELSE 0xa
35 #define PARA_END 0xb
36 #define PARA_CHK 0x4
45 u32 cut_drv = (u32)dm->cut_version; in halbb_sel_headline()
46 u32 rfe_drv = (u32)dm->rfe_type; in halbb_sel_headline()
[all …]
/OK3568_Linux_fs/u-boot/arch/m68k/include/asm/coldfire/
H A Dssi.h4 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
7 * SPDX-License-Identifier: GPL-2.0+
24 u8 resv0[0x4];
26 u8 resv1[0x8];
35 #define SSI_CR_CIS (0x00000200)
36 #define SSI_CR_TCH (0x00000100)
37 #define SSI_CR_MCE (0x00000080)
38 #define SSI_CR_I2S_MASK (0xFFFFFF9F)
39 #define SSI_CR_I2S_SLAVE (0x00000040)
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723cs/hal/rtl8703b/
H A Drtl8703b_phycfg.c3 * Copyright(c) 2007 - 2017 Realtek Corporation.
20 /*---------------------------Define Local Constant---------------------------*/
28 /*---------------------------Define Local Constant---------------------------*/
31 /*------------------------Define global variable-----------------------------*/
33 /*------------------------Define local variable------------------------------*/
36 /*--------------------Define export function prototype-----------------------*/
38 *--------------------Define export function prototype-----------------------*/
40 /*----------------------------Function Body----------------------------------*/
63 for (i = 0; i <= 31; i++) { in phy_CalculateBitShift()
64 if (((BitMask >> i) & 0x1) == 1) in phy_CalculateBitShift()
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8189fs/hal/rtl8188f/
H A Drtl8188f_phycfg.c3 * Copyright(c) 2007 - 2017 Realtek Corporation.
20 /*---------------------------Define Local Constant---------------------------*/
28 /*---------------------------Define Local Constant---------------------------*/
31 /*------------------------Define global variable-----------------------------*/
33 /*------------------------Define local variable------------------------------*/
36 /*--------------------Define export function prototype-----------------------*/
38 /*--------------------Define export function prototype-----------------------*/
40 /*----------------------------Function Body----------------------------------*/
63 for (i = 0; i <= 31; i++) { in phy_CalculateBitShift()
64 if (((BitMask >> i) & 0x1) == 1) in phy_CalculateBitShift()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8188fu/hal/rtl8188f/
H A Drtl8188f_phycfg.c1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright(c) 2007 - 2017 Realtek Corporation.
21 /*---------------------------Define Local Constant---------------------------*/
29 /*---------------------------Define Local Constant---------------------------*/
32 /*------------------------Define global variable-----------------------------*/
34 /*------------------------Define local variable------------------------------*/
37 /*--------------------Define export function prototype-----------------------*/
39 /*--------------------Define export function prototype-----------------------*/
41 /*----------------------------Function Body----------------------------------*/
64 for (i = 0; i <= 31; i++) { in phy_CalculateBitShift()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8189fs/hal/rtl8188f/
H A Drtl8188f_phycfg.c1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright(c) 2007 - 2017 Realtek Corporation.
21 /*---------------------------Define Local Constant---------------------------*/
29 /*---------------------------Define Local Constant---------------------------*/
32 /*------------------------Define global variable-----------------------------*/
34 /*------------------------Define local variable------------------------------*/
37 /*--------------------Define export function prototype-----------------------*/
39 /*--------------------Define export function prototype-----------------------*/
41 /*----------------------------Function Body----------------------------------*/
64 for (i = 0; i <= 31; i++) { in phy_CalculateBitShift()
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8188fu/hal/rtl8188f/
H A Drtl8188f_phycfg.c3 * Copyright(c) 2007 - 2017 Realtek Corporation.
20 /*---------------------------Define Local Constant---------------------------*/
28 /*---------------------------Define Local Constant---------------------------*/
31 /*------------------------Define global variable-----------------------------*/
33 /*------------------------Define local variable------------------------------*/
36 /*--------------------Define export function prototype-----------------------*/
38 /*--------------------Define export function prototype-----------------------*/
40 /*----------------------------Function Body----------------------------------*/
63 for (i = 0; i <= 31; i++) { in phy_CalculateBitShift()
64 if (((BitMask >> i) & 0x1) == 1) in phy_CalculateBitShift()
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8723ds/hal/rtl8723d/
H A Drtl8723d_phycfg.c3 * Copyright(c) 2007 - 2017 Realtek Corporation.
20 /*---------------------------Define Local Constant---------------------------*/
28 /*---------------------------Define Local Constant---------------------------*/
31 /*------------------------Define global variable-----------------------------*/
33 /*------------------------Define local variable------------------------------*/
36 /*--------------------Define export function prototype-----------------------*/
38 *--------------------Define export function prototype-----------------------*/
40 /*----------------------------Function Body----------------------------------*/
63 for (i = 0; i <= 31; i++) { in phy_CalculateBitShift()
64 if (((BitMask >> i) & 0x1) == 1) in phy_CalculateBitShift()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723ds/hal/rtl8723d/
H A Drtl8723d_phycfg.c1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright(c) 2007 - 2017 Realtek Corporation.
21 /*---------------------------Define Local Constant---------------------------*/
29 /*---------------------------Define Local Constant---------------------------*/
32 /*------------------------Define global variable-----------------------------*/
34 /*------------------------Define local variable------------------------------*/
37 /*--------------------Define export function prototype-----------------------*/
39 *--------------------Define export function prototype-----------------------*/
41 /*----------------------------Function Body----------------------------------*/
64 for (i = 0; i <= 31; i++) { in phy_CalculateBitShift()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/
H A Drtl8723b_phycfg.c3 * Copyright(c) 2007 - 2017 Realtek Corporation.
20 /*---------------------------Define Local Constant---------------------------*/
28 /*---------------------------Define Local Constant---------------------------*/
31 /*------------------------Define global variable-----------------------------*/
33 /*------------------------Define local variable------------------------------*/
36 /*--------------------Define export function prototype-----------------------*/
38 *--------------------Define export function prototype-----------------------*/
40 /*----------------------------Function Body----------------------------------*/
63 for (i = 0; i <= 31; i++) { in phy_CalculateBitShift()
64 if (((BitMask >> i) & 0x1) == 1) in phy_CalculateBitShift()
[all …]

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