| /rk3399_rockchip-uboot/drivers/ddr/marvell/axp/ |
| H A D | xor_regs.h | 17 #define MV_XOR_REGS_OFFSET(unit) (0x60900) argument
18 #define MV_XOR_REGS_BASE(unit) (MV_XOR_REGS_OFFSET(unit)) argument
21 #define XOR_CHANNEL_ARBITER_REG(unit) (MV_XOR_REGS_BASE(unit)) argument
22 #define XOR_CONFIG_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + (0x10 + ((chan) * 4))) argument
23 #define XOR_ACTIVATION_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + (0x20 + ((chan) * 4))) argument
26 #define XOR_CAUSE_REG(unit) (MV_XOR_REGS_BASE(unit) + 0x30) argument
27 #define XOR_MASK_REG(unit) (MV_XOR_REGS_BASE(unit) + 0x40) argument
28 #define XOR_ERROR_CAUSE_REG(unit) (MV_XOR_REGS_BASE(unit) + 0x50) argument
29 #define XOR_ERROR_ADDR_REG(unit) (MV_XOR_REGS_BASE(unit) + 0x60) argument
32 #define XOR_NEXT_DESC_PTR_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + (0x200 + ((chan) * 4))) argument
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| H A D | ddr3_axp.h | 425 #define MV_PEX_IF_REGS_BASE(unit) (MV_PEX_IF_REGS_OFFSET(unit)) argument
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| /rk3399_rockchip-uboot/drivers/ddr/marvell/a38x/ |
| H A D | xor_regs.h | 17 #define MV_XOR_REGS_OFFSET(unit) (0x60900) argument
18 #define MV_XOR_REGS_BASE(unit) (MV_XOR_REGS_OFFSET(unit)) argument
21 #define XOR_CHANNEL_ARBITER_REG(unit) (MV_XOR_REGS_BASE(unit)) argument
22 #define XOR_CONFIG_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + \ argument
24 #define XOR_ACTIVATION_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + \ argument
28 #define XOR_CAUSE_REG(unit) (MV_XOR_REGS_BASE(unit)+(0x30)) argument
29 #define XOR_MASK_REG(unit) (MV_XOR_REGS_BASE(unit)+(0x40)) argument
30 #define XOR_ERROR_CAUSE_REG(unit) (MV_XOR_REGS_BASE(unit)+(0x50)) argument
31 #define XOR_ERROR_ADDR_REG(unit) (MV_XOR_REGS_BASE(unit)+(0x60)) argument
34 #define XOR_NEXT_DESC_PTR_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + \ argument
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| /rk3399_rockchip-uboot/drivers/phy/marvell/ |
| H A D | comphy_a3700.h | 74 #define PHY_BASE(unit) ((unit == PCIE) ? PCIEPHY_BASE : USB3PHY_BASE) argument
75 #define PHY_SHFT(unit) ((unit == PCIE) ? PCIEPHY_SHFT : USB3PHY_SHFT) argument
84 #define PWR_PLL_CTRL_ADDR(unit) \ argument
94 #define KVCO_CAL_CTRL_ADDR(unit) \ argument
101 #define DIG_LB_EN_ADDR(unit) \ argument
108 #define SYNC_PATTERN_ADDR(unit) \ argument
115 #define UNIT_CTRL_ADDR(unit) \ argument
121 #define GEN2_SETTING_2_ADDR(unit) \ argument
127 #define GEN2_SETTING_3_ADDR(unit) \ argument
132 #define MISC_REG0_ADDR(unit) \ argument
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| /rk3399_rockchip-uboot/arch/arm/mach-mvebu/serdes/a38x/ |
| H A D | sys_env_lib.c | 174 u32 sys_env_unit_max_num_get(enum unit_id unit) in sys_env_unit_max_num_get()
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| H A D | sys_env_lib.h | 244 #define MV_GPP_REGS_BASE(unit) (0x18100 + ((unit) * 0x40)) argument
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| /rk3399_rockchip-uboot/drivers/ufs/ |
| H A D | ufs-rockchip-usbplug.c | 80 struct ufs_unit_desc_configuration_param *unit; in ufs_info_show_conf_desc() local
244 struct ufs_unit_desc_configuration_param *unit; in ufs_lu_configuration() local
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| /rk3399_rockchip-uboot/scripts/dtc/ |
| H A D | dtc.c | 47 const char *unit; in fill_fullpaths() local
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| /rk3399_rockchip-uboot/arch/arm/mach-mvebu/serdes/axp/ |
| H A D | board_env_spec.h | 96 #define MV_GPP_REGS_OFFSET(unit) (0x18100 + ((unit) * 0x40)) argument
98 #define MV_GPP_REGS_BASE(unit) (MV_GPP_REGS_OFFSET(unit)) argument
128 #define PEX_PHY_ACCESS_REG(unit) (0x40000 + ((unit) % 2 * 0x40000) + \ argument
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| /rk3399_rockchip-uboot/drivers/video/ |
| H A D | ivybridge_igd.c | 373 u32 unit = readl(MCHBAR_REG(0x5938)) & 0xf; in gma_pm_init_pre_vbios() local
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| /rk3399_rockchip-uboot/arch/x86/cpu/quark/ |
| H A D | mrc_util.c | 32 void mrc_write_mask(u32 unit, u32 addr, u32 data, u32 mask) in mrc_write_mask()
39 void mrc_alt_write_mask(u32 unit, u32 addr, u32 data, u32 mask) in mrc_alt_write_mask()
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