Searched defs:clk_ctrl (Results 1 – 6 of 6) sorted by relevance
| /rk3399_rockchip-uboot/drivers/clk/ |
| H A D | clk_zynq.c | 102 static enum zynq_clk zynq_clk_get_cpu_pll(u32 clk_ctrl) in zynq_clk_get_cpu_pll()
117 static enum zynq_clk zynq_clk_get_peripheral_pll(u32 clk_ctrl) in zynq_clk_get_peripheral_pll()
134 u32 clk_ctrl, reset, pwrdwn, mul, bypass; in zynq_clk_get_pll_rate() local
155 u32 clk_ctrl, srcsel; in zynq_clk_get_gem_rclk() local
172 u32 clk_621, clk_ctrl, div; in zynq_clk_get_cpu_rate() local
204 u32 clk_ctrl, div; in zynq_clk_get_ddr2x_rate() local
216 u32 clk_ctrl, div; in zynq_clk_get_ddr3x_rate() local
228 u32 clk_ctrl, div0, div1; in zynq_clk_get_dci_rate() local
244 u32 clk_ctrl, div0; in zynq_clk_get_peripheral_rate() local
319 u32 clk_ctrl, div0 = 0, div1 = 0; in zynq_clk_set_peripheral_rate() local
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| H A D | clk_zynqmp.c | 235 static enum zynqmp_clk zynqmp_clk_get_cpu_pll(u32 clk_ctrl) in zynqmp_clk_get_cpu_pll()
251 static enum zynqmp_clk zynqmp_clk_get_ddr_pll(u32 clk_ctrl) in zynqmp_clk_get_ddr_pll()
265 static enum zynqmp_clk zynqmp_clk_get_peripheral_pll(u32 clk_ctrl) in zynqmp_clk_get_peripheral_pll()
281 static ulong zynqmp_clk_get_pll_src(ulong clk_ctrl, in zynqmp_clk_get_pll_src()
312 u32 clk_ctrl, reset, mul; in zynqmp_clk_get_pll_rate() local
344 u32 clk_ctrl, div; in zynqmp_clk_get_cpu_rate() local
367 u32 clk_ctrl, div; in zynqmp_clk_get_ddr_rate() local
392 u32 clk_ctrl, div0; in zynqmp_clk_get_peripheral_rate() local
454 u32 clk_ctrl, div0 = 0, div1 = 0; in zynqmp_clk_set_peripheral_rate() local
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| /rk3399_rockchip-uboot/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch3_speed.c | 33 struct ccsr_clk_ctrl __iomem *clk_ctrl = in get_sys_info() local
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| /rk3399_rockchip-uboot/arch/arm/cpu/arm926ejs/armada100/ |
| H A D | timer.c | 19 u32 clk_ctrl; /* Timer clk control reg */ member
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| /rk3399_rockchip-uboot/drivers/spi/ |
| H A D | ti_qspi.c | 85 u32 clk_ctrl; member
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| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/ |
| H A D | grf_rk3576.h | 334 uint32_t clk_ctrl; /* address offset: 0x0000 */ member
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