| /optee_os/core/drivers/rstctrl/ |
| H A D | stm32mp25_rstctrl.c | 85 #define STM32_RESET(id, _offset, _bit_index, _set_clr, _inverted, _no_deassert,\ argument
96 #define RST(id, _offset, _bit_index)\ argument
99 #define RST_SETR(id, _offset, _bit_index)\ argument
102 #define RST_INV(id, _offset, _bit_index)\ argument
105 #define RST_SETR_NO_DEASSERT(id, _offset, _bit_index)\ argument
108 #define RST_SETR_NO_DEASSERT_TIMEOUT(id, _offset, _bit_index)\ argument
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| H A D | stm32mp21_rstctrl.c | 85 #define STM32_RESET(id, _offset, _bit_index, _set_clr, _inverted, _no_deassert,\ argument
96 #define RST(id, _offset, _bit_index)\ argument
99 #define RST_SETR(id, _offset, _bit_index)\ argument
102 #define RST_INV(id, _offset, _bit_index)\ argument
105 #define RST_SETR_NO_DEASSERT(id, _offset, _bit_index)\ argument
108 #define RST_SETR_NO_DEASSERT_TIMEOUT(id, _offset, _bit_index)\ argument
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| /optee_os/core/drivers/crypto/caam/include/ |
| H A D | caam_pwr.h | 25 #define BACKUP_REG(_offset, _nbregs, _mask_clr, _mask_set) \ argument
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| /optee_os/core/drivers/clk/ |
| H A D | clk-stm32mp15.c | 232 #define _CLK_SELEC(_sec, _offset, _bit, _clock_id, _parent_sel) \ argument
244 #define _CLK_FIXED(_sec, _offset, _bit, _clock_id, _parent) \ argument
256 #define _CLK_SC_SELEC(_sec, _offset, _bit, _clock_id, _parent_sel) \ argument
268 #define _CLK_SC_FIXED(_sec, _offset, _bit, _clock_id, _parent) \ argument
283 #define _CLK_SC2_SELEC(_sec, _offset, _bit, _clock_id, _parent_sel) \ argument
293 #define _CLK_SC2_FIXED(_sec, _offset, _bit, _clock_id, _parent) \ argument
304 #define _CLK_PARENT(idx, _offset, _src, _mask, _parent) \ argument
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| H A D | clk-stm32mp13.c | 270 #define GATE_CFG(_id, _offset, _bit_idx, _offset_clr)\ argument
444 #define MUXRDY_CFG(_id, _offset, _shift, _witdh, _rdy)\ argument
452 #define MUX_CFG(_id, _offset, _shift, _witdh)\ argument
527 #define DIVRDY_CFG(_id, _offset, _shift, _width, _flags, _table, _ready)\ argument
537 #define DIV_CFG(_id, _offset, _shift, _width, _flags, _table)\ argument
619 #define BYPASS(_offset, _bit_byp, _bit_digbyp) (&(struct clk_stm32_bypass){\ argument
625 #define CSS(_offset, _bit_css) (&(struct clk_stm32_css){\ argument
630 #define DRIVE(_offset, _shift, _width, _default) (&(struct clk_stm32_drive){\ argument
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| H A D | clk-stm32mp21.c | 382 #define GATE_CFG(_id, _offset, _bit_idx, _offset_clr)\ argument
566 #define _MUX_CFG(_id, _offset, _shift, _width, _rdy)\ argument
611 #define _DIV_CFG(_id, _offset, _shift, _width, _flags, _table, _ready)\ argument
674 #define BYPASS(_offset, _bit_byp, _bit_digbyp) \ argument
681 #define CSS(_offset, _bit_css) \ argument
687 #define DRIVE(_offset, _shift, _width, _default) \ argument
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| H A D | clk-stm32mp25.c | 372 #define GATE_CFG(_id, _offset, _bit_idx, _offset_clr)\ argument
601 #define _MUX_CFG(_id, _offset, _shift, _width, _rdy)\ argument
651 #define _DIV_CFG(_id, _offset, _shift, _width, _flags, _table, _ready)\ argument
712 #define BYPASS(_offset, _bit_byp, _bit_digbyp) \ argument
719 #define CSS(_offset, _bit_css) \ argument
725 #define DRIVE(_offset, _shift, _width, _default) \ argument
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