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Searched defs:CORE_PWR_STATE (Results 1 – 12 of 12) sorted by relevance

/rk3399_ARM-atf/plat/imx/imx8m/include/
H A Dimx8m_psci.h10 #define CORE_PWR_STATE(state) ((state)->pwr_domain_state[MPIDR_AFFLVL0]) macro
/rk3399_ARM-atf/plat/imx/imx9/common/include/
H A Dimx9_psci_common.h14 #define CORE_PWR_STATE(state) ((state)->pwr_domain_state[MPIDR_AFFLVL0]) macro
/rk3399_ARM-atf/plat/imx/imx8qm/
H A Dimx8qm_psci.c22 #define CORE_PWR_STATE(state) \ macro
/rk3399_ARM-atf/plat/hisilicon/hikey/
H A Dhikey_pm.c23 #define CORE_PWR_STATE(state) \ macro
/rk3399_ARM-atf/plat/imx/imx93/
H A Dimx93_psci.c19 #define CORE_PWR_STATE(state) ((state)->pwr_domain_state[MPIDR_AFFLVL0]) macro
/rk3399_ARM-atf/plat/renesas/rcar_gen5/
H A Dplat_pm.c26 #define CORE_PWR_STATE(s) ((s)->pwr_domain_state[MPIDR_AFFLVL0]) macro
/rk3399_ARM-atf/plat/ti/k3/common/
H A Dk3_psci.c20 #define CORE_PWR_STATE(state) ((state)->pwr_domain_state[MPIDR_AFFLVL0]) macro
/rk3399_ARM-atf/plat/renesas/rcar_gen4/
H A Dplat_pm.c27 #define CORE_PWR_STATE(s) ((s)->pwr_domain_state[MPIDR_AFFLVL0]) macro
/rk3399_ARM-atf/plat/brcm/board/stingray/src/
H A Dbrcm_pm_ops.c29 #define CORE_PWR_STATE(state) ((state)->pwr_domain_state[MPIDR_AFFLVL0]) macro
/rk3399_ARM-atf/plat/hisilicon/hikey960/
H A Dhikey960_pm.c26 #define CORE_PWR_STATE(state) \ macro
/rk3399_ARM-atf/plat/renesas/common/
H A Dplat_pm.c40 #define CORE_PWR_STATE(s) ((s)->pwr_domain_state[MPIDR_AFFLVL0]) macro
/rk3399_ARM-atf/plat/imx/imx8ulp/
H A Dimx8ulp_psci.c33 #define CORE_PWR_STATE(state) ((state)->pwr_domain_state[MPIDR_AFFLVL0]) macro