History log of /rk3399_rockchip-uboot/include/phy.h (Results 1 – 25 of 70)
Revision Date Author Comments
# cf51737f 27-May-2025 David Wu <david.wu@rock-chips.com>

net: phy: Add rockchip fephy support

Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I06d51e841ded6fcf1f0741e570b6acb226339c28


# bf9a0f37 02-Mar-2022 David Wu <david.wu@rock-chips.com>

net: phy: Add rk630 phy support

Change-Id: Idae9d4f8948281267758f01a020a7a07099dc827
Signed-off-by: David Wu <david.wu@rock-chips.com>


# 8f873b89 11-Jul-2019 Alex Marginean <alexandru.marginean@nxp.com>

UPSTREAM: net: add comments to phy APIs

Added a comment on the limitations of phy_find_by_mask API when scanning
MDIO buses with multiple PHYs present. Added short descriptions to the
other APIs in

UPSTREAM: net: add comments to phy APIs

Added a comment on the limitations of phy_find_by_mask API when scanning
MDIO buses with multiple PHYs present. Added short descriptions to the
other APIs in phy.h for consistency.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: Ic726c545a9e2c7a68eb565e01848f6e6e9475111

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# 7965f3d3 08-Feb-2019 Carlo Caione <ccaione@baylibre.com>

UPSTREAM: net: phy: Add generic helpers to access MMD PHY registers

Two new helper functions (phy_read_mmd() and phy_write_mmd()) are added
to allow access to the MMD PHY registers.

The MMD PHY reg

UPSTREAM: net: phy: Add generic helpers to access MMD PHY registers

Two new helper functions (phy_read_mmd() and phy_write_mmd()) are added
to allow access to the MMD PHY registers.

The MMD PHY registers can be accessed by several means:

1. Using two new MMD access function hooks in the PHY driver. These
functions can be implemented when the PHY driver does not support the
standard IEEE Compatible clause 45 access mechanism described in clause
22 or if the PHY uses its own non-standard access mechanism.

2. Direct access for C45 PHYs and C22 PHYs when accessing the reachable
DEVADs.

3. The standard clause 45 access extensions to the MMD registers through
the indirection registers (clause 22) in all the other cases.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I53a73274b6386f8a510b590a0f7ce1923f7b5528

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# 5b8d1209 16-Nov-2018 Pankaj Bansal <pankaj.bansal@nxp.com>

UPSTREAM: net: phy: Add clause 45 identifier to phy_device

The phy devices can be accessed via clause 22 or via clause 45.
This information can be deduced when we read phy id. if the phy id
is read

UPSTREAM: net: phy: Add clause 45 identifier to phy_device

The phy devices can be accessed via clause 22 or via clause 45.
This information can be deduced when we read phy id. if the phy id
is read without giving any MDIO Manageable Device Address (MMD), then
it conforms to clause 22. otherwise it conforms to clause 45.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: Iae1c8e2414b655639c42f7098a097c6a0a1e5792

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# 296978b3 11-Oct-2018 Priyanka Jain <priyanka.jain@nxp.com>

UPSTREAM: net/phy: Add phy-id for IN112525_S03

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: David Wu <david.wu@rock-chips.co

UPSTREAM: net/phy: Add phy-id for IN112525_S03

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: Ib26103a02f63a0baa0feb09a10def83097e7458b

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# 7ef89642 05-Jul-2018 Grygorii Strashko <grygorii.strashko@ti.com>

UPSTREAM: net: phy: add ofnode node to struct phy_device

Now the UCLASS_ETH device "node" field is owerwritten by some network drivers in
case of Ethernet PHYs which are linked to UCLASS_ETH device

UPSTREAM: net: phy: add ofnode node to struct phy_device

Now the UCLASS_ETH device "node" field is owerwritten by some network drivers in
case of Ethernet PHYs which are linked to UCLASS_ETH device using
"phy-handle" DT property and when Ethernet PHY driver needs to read some
additional information from DT. In such cases following happens (in
general):

- network drivers
priv->phydev = phy_connect(priv->bus, priv->phyaddr, dev,
priv->interface);
<-- phydev is connected to dev which is UCLASS_ETH device

if (priv->phy_of_handle > 0)
dev_set_of_offset(priv->phydev->dev, priv->phy_of_handle);
<-- phydev->dev->node is overwritten by phy-handle DT node

- PHY driver in .config() callback
int node = dev_of_offset(dev);
<-- PHY driver uses overwritten dev->node
const void *fdt = gd->fdt_blob;

if (fdtdec_get_bool(fdt, node, "property"))
...

As result, UCLASS_ETH device can't be used any more for DT accessing.

This patch adds additional ofnode node field to struct phy_device which can
be set explicitly by network drivers and used by PHY drivers, so
overwriting can be avoided. Also add helper function phy_get_ofnode()
which will check and return phy_device->node or dev_ofnode(phydev->dev) for
backward compatibility with existing drivers.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I31fcf01cfb19894bc90d198d9138c1fd3e25802e

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# 22e6d8f7 17-Jul-2018 Joe Hershberger <joe.hershberger@ni.com>

UPSTREAM: phy: Break include cycle

Because some phy wants to export some functions [1], export.h was
including the whole phy subsystem which pulls in lots of stuff that
causes some ordering and rede

UPSTREAM: phy: Break include cycle

Because some phy wants to export some functions [1], export.h was
including the whole phy subsystem which pulls in lots of stuff that
causes some ordering and redefinition issues. Split out the only part
that is actually needed in export.h and include it there and in phy.h.

[1] commit 95279315076c ("board/ls2085rdb: Export functions for
standalone AQ FW load apps")

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I201c0c637ffd3fbba5b276ac06882d399e817511

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# 6e7adf70 07-Aug-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-net


# d397f7c4 07-Jul-2017 Alexandru Gagniuc <alex.g@adaptrum.com>

net: phy: micrel: Separate KSZ9000 drivers from KSZ8000 drivers

The KS8721BL and KSZ9021 PHYs are software-incompatible, yet they
share the same ID. Drivers for bothe PHYs cannot safely coexist, so

net: phy: micrel: Separate KSZ9000 drivers from KSZ8000 drivers

The KS8721BL and KSZ9021 PHYs are software-incompatible, yet they
share the same ID. Drivers for bothe PHYs cannot safely coexist, so
the solution was to use #ifdefs to select between the two drivers.

As a result KSZ9031, which has a unique ID, is now caught in the
crossfire. Unless CONFIG_PHY_MICREL_KSZ9031 is defined, the KSZ9031
will not function properly, as some essential configuration code is
ifdef'd-out.

To prevent such situations, move the KSZ9000 drivers to a separate
file, and place them under a separate Kconfig option. While it is
possible to enable both KSZ8000 and KSZ9000 drivers at the same time,
the assumption is that it is highly unlikely for a system to contain
both a KSZ8000 and a KSZ9000 PHY, and that only one of the drivers
will be enabled at any given time.

Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

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# f5327036 04-Apr-2017 Tom Rini <trini@konsulko.com>

Merge git://www.denx.de/git/u-boot-marvell

This includes Marvell mvpp2 patches with the ethernet support for the
ARMv8 Armada 7k/8k platforms. The ethernet patches are all acked by Joe
and he is oka

Merge git://www.denx.de/git/u-boot-marvell

This includes Marvell mvpp2 patches with the ethernet support for the
ARMv8 Armada 7k/8k platforms. The ethernet patches are all acked by Joe
and he is okay with me pushing them via the Marvell tree.

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# d11e9347 23-Feb-2017 Stefan Roese <sr@denx.de>

net: include/phy.h: Add new PHY interface modes

This patch adds the new PHY interface modes XAUI, RXAUI and SFI that will
be used by the PPv2.2 support in the Marvell mvpp2 ethernet driver.

Signed-

net: include/phy.h: Add new PHY interface modes

This patch adds the new PHY interface modes XAUI, RXAUI and SFI that will
be used by the PPv2.2 support in the Marvell mvpp2 ethernet driver.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefan Chulski <stefanc@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

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# db40c1aa 23-Mar-2017 Hannes Schmelzer <hannes.schmelzer@br-automation.com>

drivers/net/phy: add fixed-phy / fixed-link support

This patch adds support for having a "fixed-link" to some other MAC
(like some embedded switch-device).

For this purpose we introduce a new phy-d

drivers/net/phy: add fixed-phy / fixed-link support

This patch adds support for having a "fixed-link" to some other MAC
(like some embedded switch-device).

For this purpose we introduce a new phy-driver, called "Fixed PHY".

Fixed PHY works only with CONFIG_DM_ETH enabled, since the fixed-link is
described with a subnode below ethernet interface.

Most ethernet drivers (unfortunately not all are following same scheme
for searching/attaching phys) are calling "phy_connect(...)" for getting
a phy-device.
At this point we link in, we search here for a subnode called "fixed-
link", once found we start phy_device_create(...) with the special phy-
id PHY_FIXED_ID (0xa5a55a5a).

During init the "Fixed PHY" driver has registered with this id and now
gets probed, during probe we get all the details about fixed-link out of
dts, later on the phy reports this values.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

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# e1a71f8b 09-Feb-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-net


# a5fd13ad 09-Dec-2016 John Haechten <john.haechten@microsemi.com>

net: phy: MSCC Add Support for VSC8530-VSC8531-VSC8540-VSC8541

Signed-off-by: John Haechten <john.haechten@microsemi.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>


# dc557e9a 18-Jun-2016 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot

Signed-off-by: Stefano Babic <sbabic@denx.de>


# 2ee490a0 24-May-2016 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-net

Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
drivers/net/zynq_gem.c


# 3c221af3 02-May-2016 Dan Murphy <dmurphy@ti.com>

net: phy: Add phy_interface_is_sgmii to phy.h

Add a helper to phy.h to identify whether the
phy is configured for SGMII all variables.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Mugunt

net: phy: Add phy_interface_is_sgmii to phy.h

Add a helper to phy.h to identify whether the
phy is configured for SGMII all variables.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

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# 3ab72fe8 02-May-2016 Dan Murphy <dmurphy@ti.com>

net: phy: Move is_rgmii helper to phy.h

Move the phy_interface_is_rgmii to the phy.h
file for all phy's to be able to use the API.

This now aligns with the Linux kernel based on
commit e463d88c36d4

net: phy: Move is_rgmii helper to phy.h

Move the phy_interface_is_rgmii to the phy.h
file for all phy's to be able to use the API.

This now aligns with the Linux kernel based on
commit e463d88c36d42211aa72ed76d32fb8bf37820ef1

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

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# 24ae3961 31-Mar-2016 Kevin Smith <kevin.smith@elecsyscorp.com>

net: phy: Add PHY driver for mv88e61xx switches

The previous mv88e61xx driver was a driver for configuring the
switch, but did not integrate with the PHY/networking system, so
it could not be used a

net: phy: Add PHY driver for mv88e61xx switches

The previous mv88e61xx driver was a driver for configuring the
switch, but did not integrate with the PHY/networking system, so
it could not be used as a PHY by U-boot. This is a complete
rework to support this device as a PHY.

Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

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# 4ed6ed3c 04-Apr-2016 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze


# ed6fad3e 05-Feb-2016 Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>

phy: Add phy driver support for xilinx PCS/PMA core

Add phy driver support for xilinx PCS/PMA core

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Kedareswara rao Appa

phy: Add phy driver support for xilinx PCS/PMA core

Add phy driver support for xilinx PCS/PMA core

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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# 82d72a1b 28-Jan-2016 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-net


# ddcd1f30 28-Jan-2016 Shaohui Xie <Shaohui.Xie@nxp.com>

net: phy: introduce a quirk PHY_FLAG_BROKEN_RESET

Current driver always performs a phy soft reset when connecting the phy
device, but soft reset is not always supported by a phy device, so
introduce

net: phy: introduce a quirk PHY_FLAG_BROKEN_RESET

Current driver always performs a phy soft reset when connecting the phy
device, but soft reset is not always supported by a phy device, so
introduce a quirk PHY_FLAG_BROKEN_RESET to let such a phy device to skip
soft reset. This commit uses 'flags' of phy device structure to store the
quirk.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

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# b18acb0a 13-Jan-2016 Alexey Brodkin <Alexey.Brodkin@synopsys.com>

drivers/net/phy: introduce phy_set_supported()

This new function will allow MAC drivers to override supported
capabilities of the phy. It is required when MAC cannot handle all
speeds supported by p

drivers/net/phy: introduce phy_set_supported()

This new function will allow MAC drivers to override supported
capabilities of the phy. It is required when MAC cannot handle all
speeds supported by phy.

For example phy supports up-to 1Gb connections while MAC may only work
in modes up to 100 or even 10 Mbit/sec.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

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