PCI: add vendor_aer_dump support

Change-Id: Ic97d4cade1483f7778b482b085c39dc022129a45
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

PCI: add FLR support

Functional Level Reset is used for device drivers to reset their
internal functions if recovery is needed.

=> pci flr 01.00.0
FLR completed and state restored for device 01:00.

PCI: add FLR support

Functional Level Reset is used for device drivers to reset their
internal functions if recovery is needed.

=> pci flr 01.00.0
FLR completed and state restored for device 01:00.0

Change-Id: Ifc6eb8e6f980d1b450e14b28fb8248e45f586316
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

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PCI: add retrain support

=> pci x 01.00.0
Retrain triggered for device 0001:0000
Link Status for device 0001:0000: 0x1022
Speed: Gen3
Width: x2
Link Up: Yes

Change-Id: Ic9d74e1d118cd18b76b435b046ab

PCI: add retrain support

=> pci x 01.00.0
Retrain triggered for device 0001:0000
Link Status for device 0001:0000: 0x1022
Speed: Gen3
Width: x2
Link Up: Yes

Change-Id: Ic9d74e1d118cd18b76b435b046ab2dc293daa14e
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

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PCI: add AER dump support

=> pci e
unable to get syscon device for rockchip,pipe-grf
snps pcie3phy FW update! size 8192
pcie@fe280000: PCIe Linking... LTSSM is 0x0
pcie@fe280000: PCIe Link up, LTSSM

PCI: add AER dump support

=> pci e
unable to get syscon device for rockchip,pipe-grf
snps pcie3phy FW update! size 8192
pcie@fe280000: PCIe Linking... LTSSM is 0x0
pcie@fe280000: PCIe Link up, LTSSM is 0x30011
pcie@fe280000: PCIE-0: Link up (Gen1-x2, Bus0)
=> nvme scan
=> pci aer 01.00.0
AER Capability found at offset 0x40
UESta: DLP-- SDES-- TLP-- FCP-- CmpltTO-- CmpltAbrt-- UnxCmplt-- RxOF-- MalfTLP-- ECRC-- UnsupReq-- ACSViol--
UEMsk: DLP-- SDES-- TLP-- FCP-- CmpltTO-- CmpltAbrt-- UnxCmplt-- RxOF-- MalfTLP-- ECRC-- UnsupReq-- ACSViol--
UESvrt: DLP+ SDES- TLP+ FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
CESta: RxErr-- BadTLP-- BadDLLP-- Rollover-- Timeout-- NonFatalErr--
CEMsk: RxErr-- BadTLP-- BadDLLP-- Rollover-- Timeout-- NonFatalErr--
AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-

Change-Id: Ie861fc0f1e9b70468cb27f40fa00458339cd2b4e
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

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UPSTREAM: dm: pci: Add APIs to find next capability and extended capability

This introduces two new APIs dm_pci_find_next_capability() and
dm_pci_find_next_ext_capability() to get PCI capability add

UPSTREAM: dm: pci: Add APIs to find next capability and extended capability

This introduces two new APIs dm_pci_find_next_capability() and
dm_pci_find_next_ext_capability() to get PCI capability address
and PCI express extended capability address for a given PCI device
starting from a given offset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[cherry-picked from a8c5f8d3d02807f72d048950d72b0c73d55bd7fb]
Change-Id: Idf9867b415b066984757bf021f4e441fe3c5d787
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

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UPSTREAM: dm: pci: Add APIs to find capability and extended capability

This introduces two new APIs dm_pci_find_capability() and
dm_pci_find_ext_capability() to get PCI capability address and
PCI ex

UPSTREAM: dm: pci: Add APIs to find capability and extended capability

This introduces two new APIs dm_pci_find_capability() and
dm_pci_find_ext_capability() to get PCI capability address and
PCI express extended capability address for a given PCI device.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[cherry-picked from dac01fd89d41d98cd4ce040a0d10eb67c523f63a]
Change-Id: I4f16090ba12df20cb299f22802ed77ebcb04ffa4
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

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Merge git://www.denx.de/git/u-boot-imx

Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
include/configs/imx6qdl_icore_rqs.h
include/configs/imx6ul_geam.h
include/configs/imx6ul_isiot.h

drivers: pci: imx: add imx_pcie_remove function

There is no dedicated reset signal wired up for the MX6QDL thus if the
bootloader enables the link we need some special handling to get the core
back

drivers: pci: imx: add imx_pcie_remove function

There is no dedicated reset signal wired up for the MX6QDL thus if the
bootloader enables the link we need some special handling to get the core
back into a state where it is safe to touch it for configuration.

While there has been some special handling in the Linux kernel to do this,
it was removed in 4.11 thus we need to do it properly in the bootloader
and therefore without this if you enable PCI in the bootloader you will hang
while booting the 4.11 kernel.

This puts the PCIe controller back into a safe state for the kernel driver
before launching the kernel.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Peter Senna Tschudin <peter.senna@collabora.com>

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Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq

pci: make pci_get_hose_head() available to external users

Put pci_get_hose_head() prototype in header so it is available to
external users, allowing them to find and iterate over all pci
controllers

pci: make pci_get_hose_head() available to external users

Put pci_get_hose_head() prototype in header so it is available to
external users, allowing them to find and iterate over all pci
controllers.

Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

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pci: Correct a few comments and nits

Two comments are missing a parameter and there is an extra blank line. Also
two of the region access macros are misnamed. Correct these problems.

Signed-off-by:

pci: Correct a few comments and nits

Two comments are missing a parameter and there is an extra blank line. Also
two of the region access macros are misnamed. Correct these problems.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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pci: Add functions to update PCI configuration registers

It is common to read a config register value, clear and set some bits, then
write back the updated value. Add functions to do this in one ste

pci: Add functions to update PCI configuration registers

It is common to read a config register value, clear and set some bits, then
write back the updated value. Add functions to do this in one step, for
convenience.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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dm: pci: Add missing forward declarations

When CONFIG_DM_PCI_COMPAT is not on, there is only a forward declaration
for pci_write_config32(). Add other missing ones.

Signed-off-by: Bin Meng <bmeng.c

dm: pci: Add missing forward declarations

When CONFIG_DM_PCI_COMPAT is not on, there is only a forward declaration
for pci_write_config32(). Add other missing ones.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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dm: pci: Add a function to write a BAR

Add a driver-model version of the pci_write_bar32 function so that this is
supported in the new API.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by

dm: pci: Add a function to write a BAR

Add a driver-model version of the pci_write_bar32 function so that this is
supported in the new API.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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Merge git://git.denx.de/u-boot-dm

dm: pci: Switch to DM API for PCI address mapping

We should use the new address mapping functions unless we are in
compatibility mode. Disable the old functions by default.

Signed-off-by: Simon Gla

dm: pci: Switch to DM API for PCI address mapping

We should use the new address mapping functions unless we are in
compatibility mode. Disable the old functions by default.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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dm: pci: Add driver model API functions for address mapping

At present the PCI address map functions use the old API. Add new functions
for this so that drivers can be converted.

Signed-off-by: Sim

dm: pci: Add driver model API functions for address mapping

At present the PCI address map functions use the old API. Add new functions
for this so that drivers can be converted.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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dm: pci: Add a function to read a PCI BAR

Add a driver-model function for reading the PCI BAR from a device.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

dm: pci: Add a driver-model version of pci_find_class()

Add a function which scans the driver model device information rather
than scanning the PCI bus again.

Signed-off-by: Simon Glass <sjg@chromi

dm: pci: Add a driver-model version of pci_find_class()

Add a function which scans the driver model device information rather
than scanning the PCI bus again.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

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dm: pci: Add a driver-model version of pci_find_device()

Add a function which scans the driver model device information rather
than scanning the PCI bus again.

Signed-off-by: Simon Glass <sjg@chrom

dm: pci: Add a driver-model version of pci_find_device()

Add a function which scans the driver model device information rather
than scanning the PCI bus again.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

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dm: pci: Use driver model PCI API in auto-config

At present we are using legacy functions even in the auto-configuration code
used by driver model. Add a new pci_auto.c version which uses the correc

dm: pci: Use driver model PCI API in auto-config

At present we are using legacy functions even in the auto-configuration code
used by driver model. Add a new pci_auto.c version which uses the correct
API.

Create a new pci_internal.h header to hold functions that are used within
the PCI subsystem, but are not exported to other drivers.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

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dm: pci: Add a dm_ prefix to pci_bus_find_bdf()

Most driver model PCI functions have a dm_ prefix. At some point, when the
old code is converted to driver model and the old functions are removed, we

dm: pci: Add a dm_ prefix to pci_bus_find_bdf()

Most driver model PCI functions have a dm_ prefix. At some point, when the
old code is converted to driver model and the old functions are removed, we
will drop that prefix.

For consistency, we should use the dm_ prefix for all driver model
functions. Update pci_bus_find_bdf() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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dm: pci: Add a dm_ prefix to pci_get_bdf()

Most driver model PCI functions have a dm_ prefix. At some point, when the
old code is converted to driver model and the old functions are removed, we
will

dm: pci: Add a dm_ prefix to pci_get_bdf()

Most driver model PCI functions have a dm_ prefix. At some point, when the
old code is converted to driver model and the old functions are removed, we
will drop that prefix.

For consistency, we should use the dm_ prefix for all driver model
functions. Update pci_get_bdf() accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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dm: pci: Disable PCI compatibility functions by default

We eventually need to drop the compatibility functions for driver model. As
a first step, create a configuration option to enable them and hid

dm: pci: Disable PCI compatibility functions by default

We eventually need to drop the compatibility functions for driver model. As
a first step, create a configuration option to enable them and hide them
when the option is disabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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dm: pci: Add a comment about how to find struct pci_controller

With driver mode, struct pci_controller is stored as uclass-private data.
Add a comment to that effect.

Signed-off-by: Simon Glass <sj

dm: pci: Add a comment about how to find struct pci_controller

With driver mode, struct pci_controller is stored as uclass-private data.
Add a comment to that effect.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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