video/drm: vop2: update win dly for rk3562

Update win dly number according new TRM. Without this commit, the left 4
columns will display black when act width is 2048.

Change-Id: Ibfb5bf1c02a66fefe6

video/drm: vop2: update win dly for rk3562

Update win dly number according new TRM. Without this commit, the left 4
columns will display black when act width is 2048.

Change-Id: Ibfb5bf1c02a66fefe62d92385a583031da7f33b0
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>

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video/drm: analogix_dp: add support forced switching to eDP mode

The bridge drivers is various, so the check of switching the
eDP/DP mode may not cover all application scenario.

Therefore, we add a

video/drm: analogix_dp: add support forced switching to eDP mode

The bridge drivers is various, so the check of switching the
eDP/DP mode may not cover all application scenario.

Therefore, we add a property of the eDP node to support forced
switching to eDP mode, and the DT setting may be like:

&edp {
edp-mode;
};

Change-Id: I5586603dea6c7a0c9391ac23c5485b0c827e4794
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>

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video/drm: analogix_dp: add support forced switching to DP mode

Some bridges support to convert DP into display interfaces that support
the panel, such as RGB, LVDS, MIPI and so on. For instance, th

video/drm: analogix_dp: add support forced switching to DP mode

Some bridges support to convert DP into display interfaces that support
the panel, such as RGB, LVDS, MIPI and so on. For instance, the LT7211B
and LT7911D from Lontium can offer this functionality.

Therefore, we add a property of the eDP node to support forced switching
to DP mode, and the DT setting may be like:

&edp0 {
dp-mode;
};

Change-Id: Ic65fbaf9dfa567bfd74678624e503e9aaf42f7dc
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>

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video/drm: analogix_dp: support for switching the eDP/DP mode

Since the Analogix IP can support both eDP v1.3 and DP v1.2, it is
sensible to first check whether the last bridge is connected to a
pan

video/drm: analogix_dp: support for switching the eDP/DP mode

Since the Analogix IP can support both eDP v1.3 and DP v1.2, it is
sensible to first check whether the last bridge is connected to a
panel in order to determine and pass on the eDP/DP submodes to the
PHY, which can help separate the eDP/DP configurations in the PHY
driver.

Change-Id: I802b3e2052a9869412d7b9e70e96fe8da0203b9f
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>

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video/drm: analogix_dp: add flag support_dp_mode to check if the platform supports DP mode

For RK3588/RK3576, eDP IP can support not only eDP v1.3 but also
DP v1.2, which has the different PHY confi

video/drm: analogix_dp: add flag support_dp_mode to check if the platform supports DP mode

For RK3588/RK3576, eDP IP can support not only eDP v1.3 but also
DP v1.2, which has the different PHY configurations to separate
eDP and DP mode.

Change-Id: Idc14d3ee36bdaceab4e763c80594fee836c5ca7d
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>

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video/drm: inno_mipi_phy: Select MIPI mode during DPHY initialization for RK3506

Change-Id: Ie7960d3a9a9a750a75da209be6cff56437fddfa2
Signed-off-by: Hongming Zou <hongming.zou@rock-chips.com>

video/drm: vop2: fix the code related to getting &vop2.esmart_lb_mode

The return value will be -EOVERFLOW when using ofnode_read_u32() to read
the property 'esmart_lb_mode', which is explicitly defi

video/drm: vop2: fix the code related to getting &vop2.esmart_lb_mode

The return value will be -EOVERFLOW when using ofnode_read_u32() to read
the property 'esmart_lb_mode', which is explicitly defined as an 8-bit
value.

Fixes: fa4ecc325d8 ("video/drm: vop3: fix esmart lb_mode check and lb_select assignment")
Change-Id: I2169ceaf65134fe3486b36ac20f039576d27addc
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>

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video/drm: vop2: check whether reset properties exist before getting them

For some platforms(e.g. RK3528), the "resets" and "reset-names"
properties are not necessary for the VOP node. The patch hel

video/drm: vop2: check whether reset properties exist before getting them

For some platforms(e.g. RK3528), the "resets" and "reset-names"
properties are not necessary for the VOP node. The patch helps
avoid the unexpected logs:

......
rockchip_vop2_preinit: failed to get dclk reset: -22
......

Change-Id: I8461f49f6de77bcaa3257bd3b3162d2571214d72
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>

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video/drm: vop2: fix the default plane mask configurations for RK3588

The relationships between the main window and the splice window are:

Main | Splice
Cluster0 | Cluster1
Cluster2 | Cluster3

video/drm: vop2: fix the default plane mask configurations for RK3588

The relationships between the main window and the splice window are:

Main | Splice
Cluster0 | Cluster1
Cluster2 | Cluster3
Esmart0 | Esmart1
Esmart2 | Esmart3

The VP0 and VP1 should be used in combination when the display mode is
over 4k. The main window should attach to the VP0, while the splice
window should attach to the other.

If only one VP is enabled and the plane mask is not assigned in DTS, all
main windows will be assigned to the enabled VPx, and all splice windows
will be assigned to the VPx+1, in order to ensure that the splice mode
work well.

Without this patch, the default plane_mask may not meet the above
requirement when the plane_mask is not assigned in DTS.

Change-Id: I313ba17f0ffad958c1bdb2e3caca74ba85dc5da9
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>

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video/drm: vop2: fix the unexpected reg mask for port selection of the cluster layer

Fixes: a552a69cf32 ("video/drm: vop2: add support for rk3576")
Change-Id: I4811c5b91340fff3698f010789734e2b584339

video/drm: vop2: fix the unexpected reg mask for port selection of the cluster layer

Fixes: a552a69cf32 ("video/drm: vop2: add support for rk3576")
Change-Id: I4811c5b91340fff3698f010789734e2b58433984
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>

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video/drm: analogix_dp: use exist drm_do_get_edid() to get edid

Change-Id: I1930242c4fee721447acfc234e30145ba9f83031
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>

video/drm: dsi2: disable BTA during auto calculation training

when DSI operates in auto calculation mode,it sends a dsc read
get_scanline request to the peripheral devices to automatically
calculate

video/drm: dsi2: disable BTA during auto calculation training

when DSI operates in auto calculation mode,it sends a dsc read
get_scanline request to the peripheral devices to automatically
calculate phy_max_rd_time_auto during the auto calculation training.
However,if the peripheral devices,such as a bridge chip or some panel,
lack the capability to respond to read-back requests,they cannot respond
to the DSI host’s BTA,leading to the signal control not being properly
returned to the DSI host,Therefore,the BTA function should be disabled
in such case.

Change-Id: If1f6925f2614fce557ef4200275b14879a29cbd1
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>

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video/drm: vop2: fix the reg value check in rk3576_vop2_wait_power_domain_on()

Fixes: a552a69cf32 ("video/drm: vop2: add support for rk3576")
Change-Id: Idc590cef9e596e581f674316930ad3fae1da7fcb
Sig

video/drm: vop2: fix the reg value check in rk3576_vop2_wait_power_domain_on()

Fixes: a552a69cf32 ("video/drm: vop2: add support for rk3576")
Change-Id: Idc590cef9e596e581f674316930ad3fae1da7fcb
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>

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video/drm: vop2: set half_block_en to 1 for the cluster layer on RK3528 and later platforms

Change-Id: Ibb59502f77f7ecd78079ca0d645e0f520a47996a
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>

video/drm: vop2: update default axi id for rk3576

If Cluster rid is bigger than 0xf, VOP will dead at the
system bandwidth very terrible scene.

old:
Cluster0 win0: 0x02, 0x03 [AXI0]
Clu

video/drm: vop2: update default axi id for rk3576

If Cluster rid is bigger than 0xf, VOP will dead at the
system bandwidth very terrible scene.

old:
Cluster0 win0: 0x02, 0x03 [AXI0]
Cluster1 win0: 0x06, 0x07 [AXI0]
Esmart0: 0x0a, 0x0b [AXI0]
Esmart1: 0x0c, 0x0d [AXI0]
Esmart2: 0x0a, 0x0b [AXI1]
Esmart3: 0x0c, 0x0d [AXI1]

new:
Cluster0 win0: 0x0a, 0x0b [AXI0]
Cluster1 win0: 0x06, 0x07 [AXI0]
Esmart0: 0x10, 0x11 [AXI0]
Esmart1: 0x12, 0x13 [AXI0]
Esmart2: 0x0a, 0x0b [AXI1]
Esmart3: 0x0c, 0x0d [AXI1]

If Esmart rid is bigger than 0xf, we should disable esmart dma
stride 4k.

Change-Id: I048803e09dfdf01cf482746b7a489dbbeaee3da3
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>

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video/drm: analogix_dp: add support for ASSR mode

According to the eDP v1.3 chapter 3.6 Table 3-15, Alternative
Scramble Seed Reset(ASSR) is a recommended way for eDP Sink devices
to support Display

video/drm: analogix_dp: add support for ASSR mode

According to the eDP v1.3 chapter 3.6 Table 3-15, Alternative
Scramble Seed Reset(ASSR) is a recommended way for eDP Sink devices
to support Display Authentication and Content Protection as Method
3a, while Method 1 HDCP is normally not expected in an eDP Sink
device.

In addition, the ASSR support capability should be the bit 0 of
DPCD register 0000Dh according to the eDP v1.4 'Revision History'
table 2:

......
Table 3-4: Corrected reference to DPCD Address 0000Dh, bit 0 (was bit 4)
......

Change-Id: I311a8ed0baae37047e84bdc697842c5bb3fcd6fb
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>

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video/drm: analogix_dp: use existing drm dp helper function to check enhanced frame support

The analogix_dp_is_enhanced_mode_available() can be replaced by drm
helper function drm_dp_enhanced_frame_

video/drm: analogix_dp: use existing drm dp helper function to check enhanced frame support

The analogix_dp_is_enhanced_mode_available() can be replaced by drm
helper function drm_dp_enhanced_frame_cap().

Change-Id: I8bea4a78955ff064e063a4bad84efe6e508fb637
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>

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video/drm: display: not to fixup dts if no initialized display route

In some specific scenarios, such as the BOOT_MODE_QUIESCENT mode, the
logo display should be skipped while the display driver has

video/drm: display: not to fixup dts if no initialized display route

In some specific scenarios, such as the BOOT_MODE_QUIESCENT mode, the
logo display should be skipped while the display driver has already been
probed, and it means the display fixup process should also be skipped.

Related commit: 8af253525b7 ("rockchip: boot mode: Support android cmd 'reboot quiescent'")
Change-Id: Ibf90737102892089821d98412f4c5c2749c9fbe1
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>

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video/drm: vop2: add output_mode check for DP/eDP/HDMI YUV420/YUV422 output

Change-Id: I692e8cb355310bfdd6ed838f523ed3cd98cbd89f
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>

video/drm: analogix_dp: add support for color format yuv444/yuv422

The detailed changes as follows:
1.Add flag max_bpc and format_yuv to check whether the platform
support 10 bit per component and

video/drm: analogix_dp: add support for color format yuv444/yuv422

The detailed changes as follows:
1.Add flag max_bpc and format_yuv to check whether the platform
support 10 bit per component and YUV444/YUV422.
2.Add exact bpp related to output format in bandwidth calculation,
which is fixed to 24 before the patch.
3.Add .get_timing() of rockchip_connector_funcs support to meet the
needs of epd2dp application cases.

Related kernel commit:
a7620fa846c2 ("drm/rockchip: analogix_dp: add support for color format yuv444/yuv422")

Change-Id: I6c8e8cfbbc653a6e4ab86d39fb974657e917d037
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>

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video/drm: phy: dcphy: modify rk3576 data lane driver-down resistor

Signal test to correct dphy DQ driver-down resistors, see
redmine #487592 - #3 for specific report details.

Type: Fix
Redmine ID:

video/drm: phy: dcphy: modify rk3576 data lane driver-down resistor

Signal test to correct dphy DQ driver-down resistors, see
redmine #487592 - #3 for specific report details.

Type: Fix
Redmine ID: #487592
Associated modifications: I3692ce528646ad3b215b212cbb453b0c4c0e9420
Test: N/A

Signed-off-by: Zhibin Huang <zhibin.huang@rock-chips.com>
Change-Id: I8761cd94e1639f1531503471889e6adfc38558f1

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video/drm: vop2: reset dclk when crtc post enable

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I1ace30e5e8a62159cfe2617371082e26ca2c9e77

video/drm: vop2: use vop2_plane_id_to_string() to get plane name

The related log will be clearer:

......
Rockchip UBOOT DRM driver version: v1.0.1
Assign plane mask automatically
VOP have 3 active

video/drm: vop2: use vop2_plane_id_to_string() to get plane name

The related log will be clearer:

......
Rockchip UBOOT DRM driver version: v1.0.1
Assign plane mask automatically
VOP have 3 active VP
vp0 have layer nr:1[Esmart0 ], primary plane: Esmart0
vp1 have layer nr:1[Esmart1 ], primary plane: Esmart1
vp2 have layer nr:1[Esmart2 ], primary plane: Esmart2
disp info 2, type:16, id:0
......

Change-Id: Ic7d447846cbc7cac3800b270bdfaf8a07ab0b16c
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>

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video/drm: rk628: combtxphy: enabling ssc is required for frac_div

Type: Fix
Redmine ID: #525257
Associated modifications: N/A
Test: N/A

Signed-off-by: Zhibin Huang <zhibin.huang@rock-chips.com>
Ch

video/drm: rk628: combtxphy: enabling ssc is required for frac_div

Type: Fix
Redmine ID: #525257
Associated modifications: N/A
Test: N/A

Signed-off-by: Zhibin Huang <zhibin.huang@rock-chips.com>
Change-Id: Ic107c98c9b9a587699b352358715dfed59e97085

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video/drm: display: set vop dp_out_en bit laterly

The vop dp_out_en bit should be set after the dp link rate ready,
which can avoid the dp controller fifo overflow issue.

Signed-off-by: Zhang Yubin

video/drm: display: set vop dp_out_en bit laterly

The vop dp_out_en bit should be set after the dp link rate ready,
which can avoid the dp controller fifo overflow issue.

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I1529af31c22defb728e65c157ad7c88c77968cc4

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