| f03ca6ff | 12-Jun-2023 |
Wyon Bi <bivvy.bi@rock-chips.com> |
video/drm: panel-maxim-max96752f: Add support for hannstar hsd123jpw3-a15
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com> Change-Id: I1f9c8a05f5108de989744a4a8ef60542fed99635 |
| 1b5811e7 | 30-May-2023 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: vop: add mode_fixup func to check crtcinfo
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: I793a4c3e1cf07879200aca166697edd8210c2cd7 |
| 5202c1e0 | 26-May-2023 |
Wyon Bi <bivvy.bi@rock-chips.com> |
video/drm: panel-maxim-max96752f: Add support for ogm 101fhbllm01
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com> Change-Id: I0a89189a700a15e7f61f0c98a23f01d65188bb8b |
| 6cdc64f4 | 27-May-2023 |
Wyon Bi <bivvy.bi@rock-chips.com> |
video/drm: max96745: Add tx_rate switch for twisted-pair cable
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com> Change-Id: I7e901ccb37c1c2ac0160103ff49ceec76edbff44 |
| cc781e02 | 09-May-2023 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: display: fix hactive 4-pixel alignment if using panel
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: I729c3cd08fdfd00b8a52dcefb1bc2fcb6bcaa0a9 |
| 0675a2a4 | 20-Apr-2023 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: vop3: add support for rk3562 mcu interface
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: I23086a51fceeff77952c110fb4e32adea7498c54 |
| b02eb70b | 09-May-2023 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: vop2: add mode_fixup func to check crtcinfo
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: Icc3ae80f36e300561312b0c5bde2bceac75756ad |
| a42af2e5 | 09-May-2023 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: rgb: set initial value for enabled/prepared of mcu panel
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: I19f90382ca129941722b4a33b5d74296b6409588 |
| 13f658dc | 15-Apr-2023 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: dss: check dclk_inv from bus_flags
Use bus_flags to check dclk_inv, which synchronized with kernel.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: I155188fc7e3654b82e5b
video/drm: dss: check dclk_inv from bus_flags
Use bus_flags to check dclk_inv, which synchronized with kernel.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: I155188fc7e3654b82e5b0c9aba1627ada5a5ed0e
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| 6180119c | 12-May-2023 |
Wyon Bi <bivvy.bi@rock-chips.com> |
video/drm: Add panel driver for Rohm BU18RL82 based LCDs
Change-Id: Ia5dcc367395019ead80c3176326e05db61dff7ea Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com> |
| cf409a2e | 12-May-2023 |
Wyon Bi <bivvy.bi@rock-chips.com> |
video/drm: vop2: Move clk_set_defaults() to probe
clk_set_defaults() should only be called once per vop.
Change-Id: I396407f9aac679e57aa2242cdac784149ba58dfe Signed-off-by: Wyon Bi <bivvy.bi@rock-c
video/drm: vop2: Move clk_set_defaults() to probe
clk_set_defaults() should only be called once per vop.
Change-Id: I396407f9aac679e57aa2242cdac784149ba58dfe Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
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| 6a3f4548 | 18-May-2023 |
Sandy Huang <hjc@rock-chips.com> |
video/drm: hdmi: add compatible SPL display
Signed-off-by: Algea Cao <algea.cao@rock-chips.com> Signed-off-by: Sandy Huang <hjc@rock-chips.com> Change-Id: I95a776d95fe2400da4f84e41343f63241c00849f |
| d8e7f4a5 | 18-May-2023 |
Sandy Huang <hjc@rock-chips.com> |
video/drm: vop2: add compatible SPL display
Signed-off-by: Sandy Huang <hjc@rock-chips.com> Change-Id: I75c648af8fc8d1527bff39af8e1e7bbe93fee44c |
| 690e9ed1 | 18-May-2023 |
Sandy Huang <hjc@rock-chips.com> |
video/drm: add support HDMI display from SPL
The SPL display only can support at rk3528 hdmi output, you can add the following config to enable SPL display:
CONFIG_ARM_SMP=y CONFIG_MP_BOOT=y CONFIG
video/drm: add support HDMI display from SPL
The SPL display only can support at rk3528 hdmi output, you can add the following config to enable SPL display:
CONFIG_ARM_SMP=y CONFIG_MP_BOOT=y CONFIG_ARMV8_SET_SMPEN=y CONFIG_SPL_DM_VIDEO=y CONFIG_SPL_I2C_EDID=y
Signed-off-by: Sandy Huang <hjc@rock-chips.com> Signed-off-by: Algea Cao <algea.cao@rock-chips.com> Change-Id: I4fea0900b5f6714d8ca573ea715797d513c3bb03
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| d57af898 | 12-May-2023 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: vop2: divide dclk by slice_num in dsc mode
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: I1a53b435a82995101536a43f36cf545eeb741770 |
| 15f69071 | 11-May-2023 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: vop2: add polarity configs of rgb sync pins
In addition, fix some related macro definition errors.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: I02d84394874238d919714
video/drm: vop2: add polarity configs of rgb sync pins
In addition, fix some related macro definition errors.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: I02d84394874238d919714762ce60203fd0dd0456
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| 882f8a2d | 11-May-2023 |
Sandy Huang <hjc@rock-chips.com> |
drm/rockchip: rockchip_display: fix reserved logo memory align as PAGE(4096)
Signed-off-by: Sandy Huang <hjc@rock-chips.com> Change-Id: I37aae6730fcf15bc5c852274e21093addc6507cf |
| c3c14736 | 27-Apr-2023 |
Algea Cao <algea.cao@rock-chips.com> |
video/drm: dw-hdmi-qp: Set flag mark uboot logo is enabled
Signed-off-by: Algea Cao <algea.cao@rock-chips.com> Change-Id: I1c0c55c6d41c93f1ec8995bafbd1bf383bd2fc8f |
| 75e19c55 | 19-Jul-2022 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: dsi2: enable soft_te
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com> Change-Id: I76a32ed93612cbdb85ee25ea6f08b5d10dcd7e1b |
| 8e7ef808 | 19-Jul-2022 |
Damon Ding <damon.ding@rock-chips.com> |
drm/rockchip: vop2: add support for soft_te
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: I31cf94f4f9fc900f80e8752f03d305036a0153a8 |
| 56e08688 | 26-Apr-2023 |
Wyon Bi <bivvy.bi@rock-chips.com> |
video/drm: Add panel driver for Maxim MAX96752F based LCDs
Change-Id: I8eafaab5cedb69d37407746f6ef2819d06f31c36 Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com> |
| 37b17b57 | 16-Aug-2022 |
Algea Cao <algea.cao@rock-chips.com> |
video/drm: dw-hdmi-qp: Allow 4K-60Hz YUV444/YUV422/RGB output
Signed-off-by: Algea Cao <algea.cao@rock-chips.com> Change-Id: Ib597c8f4f555f47eccd43a0e6c6fae17de3d98ed |
| 034a46b5 | 16-Aug-2022 |
Algea Cao <algea.cao@rock-chips.com> |
drm/rockchip: vop2: Support hdmi YUV422 output
Signed-off-by: Algea Cao <algea.cao@rock-chips.com> Change-Id: Ib89a358f67246125b817003557bc4a03f798b623 |
| bc291652 | 16-Aug-2022 |
Algea Cao <algea.cao@rock-chips.com> |
video/drm: dw-hdmi-qp: Support YUV422 color format
Signed-off-by: Algea Cao <algea.cao@rock-chips.com> Change-Id: I90fcbb8fd5bb46fabd919660c4cb002953a32266 |
| da42fac8 | 19-Apr-2023 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: max96755f: add support dsi rx lane map
Change-Id: Id61a29de20127067d8505251c93b0fc07654846e Signed-off-by: Guochun Huang <hero.huang@rock-chips.com> |