xref: /rk3399_rockchip-uboot/drivers/video/drm/rockchip_display.c (revision 8e7ef808692d327bab1f565e21c7b6093100563d)
1 /*
2  * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <asm/unaligned.h>
8 #include <boot_rkimg.h>
9 #include <config.h>
10 #include <common.h>
11 #include <errno.h>
12 #include <linux/libfdt.h>
13 #include <fdtdec.h>
14 #include <fdt_support.h>
15 #include <linux/hdmi.h>
16 #include <linux/list.h>
17 #include <linux/compat.h>
18 #include <linux/media-bus-format.h>
19 #include <malloc.h>
20 #include <video.h>
21 #include <video_rockchip.h>
22 #include <video_bridge.h>
23 #include <dm/device.h>
24 #include <dm/uclass-internal.h>
25 #include <asm/arch-rockchip/resource_img.h>
26 
27 #include "bmp_helper.h"
28 #include "rockchip_display.h"
29 #include "rockchip_crtc.h"
30 #include "rockchip_connector.h"
31 #include "rockchip_bridge.h"
32 #include "rockchip_phy.h"
33 #include "rockchip_panel.h"
34 #include <dm.h>
35 #include <dm/of_access.h>
36 #include <dm/ofnode.h>
37 #include <asm/io.h>
38 
39 #define DRIVER_VERSION	"v1.0.1"
40 
41 /***********************************************************************
42  *  Rockchip UBOOT DRM driver version
43  *
44  *  v1.0.0	: add basic version for rockchip drm driver(hjc)
45  *  v1.0.1	: add much dsi update(hjc)
46  *
47  **********************************************************************/
48 
49 #define RK_BLK_SIZE 512
50 #define BMP_PROCESSED_FLAG 8399
51 
52 DECLARE_GLOBAL_DATA_PTR;
53 static LIST_HEAD(rockchip_display_list);
54 static LIST_HEAD(logo_cache_list);
55 
56 static unsigned long memory_start;
57 static unsigned long cubic_lut_memory_start;
58 static unsigned long memory_end;
59 static struct base2_info base_parameter;
60 static uint32_t crc32_table[256];
61 
62 /*
63  * the phy types are used by different connectors in public.
64  * The current version only has inno hdmi phy for hdmi and tve.
65  */
66 enum public_use_phy {
67 	NONE,
68 	INNO_HDMI_PHY
69 };
70 
71 /* save public phy data */
72 struct public_phy_data {
73 	const struct rockchip_phy *phy_drv;
74 	int phy_node;
75 	int public_phy_type;
76 	bool phy_init;
77 };
78 
79 void rockchip_display_make_crc32_table(void)
80 {
81 	uint32_t c;
82 	int n, k;
83 	unsigned long poly;		/* polynomial exclusive-or pattern */
84 	/* terms of polynomial defining this crc (except x^32): */
85 	static const char p[] = {0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26};
86 
87 	/* make exclusive-or pattern from polynomial (0xedb88320L) */
88 	poly = 0L;
89 	for (n = 0; n < sizeof(p) / sizeof(char); n++)
90 		poly |= 1L << (31 - p[n]);
91 
92 	for (n = 0; n < 256; n++) {
93 		c = (unsigned long)n;
94 		for (k = 0; k < 8; k++)
95 		c = c & 1 ? poly ^ (c >> 1) : c >> 1;
96 		crc32_table[n] = cpu_to_le32(c);
97 	}
98 }
99 
100 uint32_t rockchip_display_crc32c_cal(unsigned char *data, int length)
101 {
102 	int i;
103 	uint32_t crc;
104 	crc = 0xFFFFFFFF;
105 
106 	for (i = 0; i < length; i++) {
107 		crc = crc32_table[(crc ^ *data) & 0xff] ^ (crc >> 8);
108 		data++;
109 	}
110 
111 	return crc ^ 0xffffffff;
112 }
113 
114 int rockchip_get_baseparameter(void)
115 {
116 	struct blk_desc *dev_desc;
117 	disk_partition_t part_info;
118 	int block_num = 2048;
119 	char baseparameter_buf[block_num * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN);
120 	int ret = 0;
121 
122 	dev_desc = rockchip_get_bootdev();
123 	if (!dev_desc) {
124 		printf("%s: Could not find device\n", __func__);
125 		return -ENOENT;
126 	}
127 
128 	if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) {
129 		printf("Could not find baseparameter partition\n");
130 		return -ENOENT;
131 	}
132 
133 	ret = blk_dread(dev_desc, part_info.start, block_num, (void *)baseparameter_buf);
134 	if (ret < 0) {
135 		printf("read baseparameter failed\n");
136 		return ret;
137 	}
138 
139 	memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter));
140 	if (strncasecmp(base_parameter.head_flag, "BASP", 4)) {
141 		printf("warning: bad baseparameter\n");
142 		memset(&base_parameter, 0, sizeof(base_parameter));
143 	}
144 	rockchip_display_make_crc32_table();
145 
146 	return ret;
147 }
148 
149 struct base2_disp_info *rockchip_get_disp_info(int type, int id)
150 {
151 	struct base2_disp_info *disp_info;
152 	struct base2_disp_header *disp_header;
153 	int i = 0, offset = -1;
154 	u32 crc_val;
155 	u32 base2_length;
156 	void *base_parameter_addr = (void *)&base_parameter;
157 
158 	for (i = 0; i < 8; i++) {
159 		disp_header = &base_parameter.disp_header[i];
160 		if (disp_header->connector_type == type &&
161 		    disp_header->connector_id == id) {
162 			printf("disp info %d, type:%d, id:%d\n", i, type, id);
163 			offset = disp_header->offset;
164 			break;
165 		}
166 	}
167 
168 	if (offset < 0)
169 		return NULL;
170 	disp_info = base_parameter_addr + offset;
171 	if (disp_info->screen_info[0].type != type ||
172 	    disp_info->screen_info[0].id != id) {
173 		printf("base2_disp_info couldn't be found, screen_info type[%d] or id[%d] mismatched\n",
174 		       disp_info->screen_info[0].type,
175 		       disp_info->screen_info[0].id);
176 		return NULL;
177 	}
178 
179 	if (strncasecmp(disp_info->disp_head_flag, "DISP", 4))
180 		return NULL;
181 
182 	if (base_parameter.major_version == 3 && base_parameter.minor_version == 0) {
183 		crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info,
184 						      sizeof(struct base2_disp_info) - 4);
185 		if (crc_val != disp_info->crc2) {
186 			printf("error: connector type[%d], id[%d] disp info crc2 check error\n",
187 			       type, id);
188 			return NULL;
189 		}
190 	} else {
191 		base2_length = sizeof(struct base2_disp_info) - sizeof(struct csc_info) -
192 			       sizeof(struct acm_data) - 10 * 1024 - 4;
193 		crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, base2_length - 4);
194 		if (crc_val != disp_info->crc) {
195 			printf("error: connector type[%d], id[%d] disp info crc check error\n",
196 			       type, id);
197 			return NULL;
198 		}
199 	}
200 
201 	return disp_info;
202 }
203 
204 /* check which kind of public phy does connector use */
205 static int check_public_use_phy(struct rockchip_connector *conn)
206 {
207 	int ret = NONE;
208 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
209 
210 	if (!strncmp(dev_read_name(conn->dev), "tve", 3) ||
211 	    !strncmp(dev_read_name(conn->dev), "hdmi", 4))
212 		ret = INNO_HDMI_PHY;
213 #endif
214 
215 	return ret;
216 }
217 
218 /*
219  * get public phy driver and initialize it.
220  * The current version only has inno hdmi phy for hdmi and tve.
221  */
222 static int get_public_phy(struct rockchip_connector *conn,
223 			  struct public_phy_data *data)
224 {
225 	struct rockchip_phy *phy;
226 	struct udevice *dev;
227 	int ret = 0;
228 
229 	switch (data->public_phy_type) {
230 	case INNO_HDMI_PHY:
231 #if defined(CONFIG_ROCKCHIP_RK3328)
232 		ret = uclass_get_device_by_name(UCLASS_PHY,
233 						"hdmiphy@ff430000", &dev);
234 #elif defined(CONFIG_ROCKCHIP_RK322X)
235 		ret = uclass_get_device_by_name(UCLASS_PHY,
236 						"hdmi-phy@12030000", &dev);
237 #else
238 		ret = -EINVAL;
239 #endif
240 		if (ret) {
241 			printf("Warn: can't find phy driver\n");
242 			return 0;
243 		}
244 
245 		phy = (struct rockchip_phy *)dev_get_driver_data(dev);
246 		if (!phy) {
247 			printf("failed to get phy driver\n");
248 			return 0;
249 		}
250 
251 		ret = rockchip_phy_init(phy);
252 		if (ret) {
253 			printf("failed to init phy driver\n");
254 			return ret;
255 		}
256 		conn->phy = phy;
257 
258 		debug("inno hdmi phy init success, save it\n");
259 		data->phy_drv = conn->phy;
260 		data->phy_init = true;
261 		return 0;
262 	default:
263 		return -EINVAL;
264 	}
265 }
266 
267 static void init_display_buffer(ulong base)
268 {
269 	memory_start = base + DRM_ROCKCHIP_FB_SIZE;
270 	memory_end = memory_start;
271 	cubic_lut_memory_start = memory_start + MEMORY_POOL_SIZE;
272 }
273 
274 void *get_display_buffer(int size)
275 {
276 	unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE);
277 	void *buf;
278 
279 	if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) {
280 		printf("failed to alloc %dbyte memory to display\n", size);
281 		return NULL;
282 	}
283 	buf = (void *)roundup_memory;
284 
285 	memory_end = roundup_memory + size;
286 
287 	return buf;
288 }
289 
290 static unsigned long get_display_size(void)
291 {
292 	return memory_end - memory_start;
293 }
294 
295 static unsigned long get_single_cubic_lut_size(void)
296 {
297 	ulong cubic_lut_size;
298 	int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE;
299 
300 	/* This is depend on IC designed */
301 	cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16;
302 	cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE);
303 
304 	return cubic_lut_size;
305 }
306 
307 static unsigned long get_cubic_lut_offset(int crtc_id)
308 {
309 	return crtc_id * get_single_cubic_lut_size();
310 }
311 
312 unsigned long get_cubic_lut_buffer(int crtc_id)
313 {
314 	return cubic_lut_memory_start + crtc_id * get_single_cubic_lut_size();
315 }
316 
317 static unsigned long get_cubic_memory_size(void)
318 {
319 	/* Max support 4 cubic lut */
320 	return get_single_cubic_lut_size() * 4;
321 }
322 
323 bool can_direct_logo(int bpp)
324 {
325 	return bpp == 16 || bpp == 32;
326 }
327 
328 static int connector_phy_init(struct rockchip_connector *conn,
329 			      struct public_phy_data *data)
330 {
331 	int type;
332 
333 	/* does this connector use public phy with others */
334 	type = check_public_use_phy(conn);
335 	if (type == INNO_HDMI_PHY) {
336 		/* there is no public phy was initialized */
337 		if (!data->phy_init) {
338 			debug("start get public phy\n");
339 			data->public_phy_type = type;
340 			if (get_public_phy(conn, data)) {
341 				printf("can't find correct public phy type\n");
342 				free(data);
343 				return -EINVAL;
344 			}
345 			return 0;
346 		}
347 
348 		/* if this phy has been initialized, get it directly */
349 		conn->phy = (struct rockchip_phy *)data->phy_drv;
350 		return 0;
351 	}
352 
353 	return 0;
354 }
355 
356 int drm_mode_vrefresh(const struct drm_display_mode *mode)
357 {
358 	int refresh = 0;
359 	unsigned int calc_val;
360 
361 	if (mode->vrefresh > 0) {
362 		refresh = mode->vrefresh;
363 	} else if (mode->htotal > 0 && mode->vtotal > 0) {
364 		int vtotal;
365 
366 		vtotal = mode->vtotal;
367 		/* work out vrefresh the value will be x1000 */
368 		calc_val = (mode->clock * 1000);
369 		calc_val /= mode->htotal;
370 		refresh = (calc_val + vtotal / 2) / vtotal;
371 
372 		if (mode->flags & DRM_MODE_FLAG_INTERLACE)
373 			refresh *= 2;
374 		if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
375 			refresh /= 2;
376 		if (mode->vscan > 1)
377 			refresh /= mode->vscan;
378 	}
379 	return refresh;
380 }
381 
382 int rockchip_ofnode_get_display_mode(ofnode node, struct drm_display_mode *mode)
383 {
384 	int hactive, vactive, pixelclock;
385 	int hfront_porch, hback_porch, hsync_len;
386 	int vfront_porch, vback_porch, vsync_len;
387 	int val, flags = 0;
388 
389 #define FDT_GET_INT(val, name) \
390 	val = ofnode_read_s32_default(node, name, -1); \
391 	if (val < 0) { \
392 		printf("Can't get %s\n", name); \
393 		return -ENXIO; \
394 	}
395 
396 #define FDT_GET_INT_DEFAULT(val, name, default) \
397 	val = ofnode_read_s32_default(node, name, default);
398 
399 	FDT_GET_INT(hactive, "hactive");
400 	FDT_GET_INT(vactive, "vactive");
401 	FDT_GET_INT(pixelclock, "clock-frequency");
402 	FDT_GET_INT(hsync_len, "hsync-len");
403 	FDT_GET_INT(hfront_porch, "hfront-porch");
404 	FDT_GET_INT(hback_porch, "hback-porch");
405 	FDT_GET_INT(vsync_len, "vsync-len");
406 	FDT_GET_INT(vfront_porch, "vfront-porch");
407 	FDT_GET_INT(vback_porch, "vback-porch");
408 	FDT_GET_INT(val, "hsync-active");
409 	flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
410 	FDT_GET_INT(val, "vsync-active");
411 	flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
412 	FDT_GET_INT(val, "pixelclk-active");
413 	flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0;
414 
415 	FDT_GET_INT_DEFAULT(val, "screen-rotate", 0);
416 	if (val == DRM_MODE_FLAG_XMIRROR) {
417 		flags |= DRM_MODE_FLAG_XMIRROR;
418 	} else if (val == DRM_MODE_FLAG_YMIRROR) {
419 		flags |= DRM_MODE_FLAG_YMIRROR;
420 	} else if (val == DRM_MODE_FLAG_XYMIRROR) {
421 		flags |= DRM_MODE_FLAG_XMIRROR;
422 		flags |= DRM_MODE_FLAG_YMIRROR;
423 	}
424 	mode->hdisplay = hactive;
425 	mode->hsync_start = mode->hdisplay + hfront_porch;
426 	mode->hsync_end = mode->hsync_start + hsync_len;
427 	mode->htotal = mode->hsync_end + hback_porch;
428 
429 	mode->vdisplay = vactive;
430 	mode->vsync_start = mode->vdisplay + vfront_porch;
431 	mode->vsync_end = mode->vsync_start + vsync_len;
432 	mode->vtotal = mode->vsync_end + vback_porch;
433 
434 	mode->clock = pixelclock / 1000;
435 	mode->flags = flags;
436 	mode->vrefresh = drm_mode_vrefresh(mode);
437 
438 	return 0;
439 }
440 
441 static int display_get_force_timing_from_dts(ofnode node, struct drm_display_mode *mode)
442 {
443 	int ret = 0;
444 
445 	ret = rockchip_ofnode_get_display_mode(node, mode);
446 
447 	if (ret) {
448 		mode->clock = 74250;
449 		mode->flags = 0x5;
450 		mode->hdisplay = 1280;
451 		mode->hsync_start = 1390;
452 		mode->hsync_end = 1430;
453 		mode->htotal = 1650;
454 		mode->hskew = 0;
455 		mode->vdisplay = 720;
456 		mode->vsync_start = 725;
457 		mode->vsync_end = 730;
458 		mode->vtotal = 750;
459 		mode->vrefresh = 60;
460 		mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9;
461 		mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
462 	}
463 
464 	printf("route node %s force_timing, use %dx%dp%d as default mode\n",
465 	       ret ? "undefine" : "define", mode->hdisplay, mode->vdisplay,
466 	       mode->vscan);
467 
468 	return 0;
469 }
470 
471 static int display_get_timing_from_dts(struct rockchip_panel *panel,
472 				       struct drm_display_mode *mode)
473 {
474 	struct ofnode_phandle_args args;
475 	ofnode dt, timing, mcu_panel;
476 	int ret;
477 
478 	mcu_panel = dev_read_subnode(panel->dev, "mcu-panel");
479 	dt = dev_read_subnode(panel->dev, "display-timings");
480 	if (ofnode_valid(dt)) {
481 		ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL,
482 						     0, 0, &args);
483 		if (ret)
484 			return ret;
485 
486 		timing = args.node;
487 	} else if (ofnode_valid(mcu_panel)) {
488 		dt = ofnode_find_subnode(mcu_panel, "display-timings");
489 		ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL,
490 						     0, 0, &args);
491 		if (ret)
492 			return ret;
493 
494 		timing = args.node;
495 	} else {
496 		timing = dev_read_subnode(panel->dev, "panel-timing");
497 	}
498 
499 	if (!ofnode_valid(timing)) {
500 		printf("failed to get display timings from DT\n");
501 		return -ENXIO;
502 	}
503 
504 	rockchip_ofnode_get_display_mode(timing, mode);
505 
506 	return 0;
507 }
508 
509 /**
510  * drm_mode_max_resolution_filter - mark modes out of vop max resolution
511  * @edid_data: structure store mode list
512  * @max_output: vop max output resolution
513  */
514 void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data,
515 				    struct vop_rect *max_output)
516 {
517 	int i;
518 
519 	for (i = 0; i < edid_data->modes; i++) {
520 		if (edid_data->mode_buf[i].hdisplay > max_output->width ||
521 		    edid_data->mode_buf[i].vdisplay > max_output->height)
522 			edid_data->mode_buf[i].invalid = true;
523 	}
524 }
525 
526 /**
527  * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters
528  * @p: mode
529  * @adjust_flags: a combination of adjustment flags
530  *
531  * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary.
532  *
533  * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of
534  *   interlaced modes.
535  * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for
536  *   buffers containing two eyes (only adjust the timings when needed, eg. for
537  *   "frame packing" or "side by side full").
538  * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not*
539  *   be performed for doublescan and vscan > 1 modes respectively.
540  */
541 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
542 {
543 	if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
544 		return;
545 
546 	if (p->flags & DRM_MODE_FLAG_DBLCLK)
547 		p->crtc_clock = 2 * p->clock;
548 	else
549 		p->crtc_clock = p->clock;
550 	p->crtc_hdisplay = p->hdisplay;
551 	p->crtc_hsync_start = p->hsync_start;
552 	p->crtc_hsync_end = p->hsync_end;
553 	p->crtc_htotal = p->htotal;
554 	p->crtc_hskew = p->hskew;
555 	p->crtc_vdisplay = p->vdisplay;
556 	p->crtc_vsync_start = p->vsync_start;
557 	p->crtc_vsync_end = p->vsync_end;
558 	p->crtc_vtotal = p->vtotal;
559 
560 	if (p->flags & DRM_MODE_FLAG_INTERLACE) {
561 		if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
562 			p->crtc_vdisplay /= 2;
563 			p->crtc_vsync_start /= 2;
564 			p->crtc_vsync_end /= 2;
565 			p->crtc_vtotal /= 2;
566 		}
567 	}
568 
569 	if (!(adjust_flags & CRTC_NO_DBLSCAN)) {
570 		if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
571 			p->crtc_vdisplay *= 2;
572 			p->crtc_vsync_start *= 2;
573 			p->crtc_vsync_end *= 2;
574 			p->crtc_vtotal *= 2;
575 		}
576 	}
577 
578 	if (!(adjust_flags & CRTC_NO_VSCAN)) {
579 		if (p->vscan > 1) {
580 			p->crtc_vdisplay *= p->vscan;
581 			p->crtc_vsync_start *= p->vscan;
582 			p->crtc_vsync_end *= p->vscan;
583 			p->crtc_vtotal *= p->vscan;
584 		}
585 	}
586 
587 	if (adjust_flags & CRTC_STEREO_DOUBLE) {
588 		unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK;
589 
590 		switch (layout) {
591 		case DRM_MODE_FLAG_3D_FRAME_PACKING:
592 			p->crtc_clock *= 2;
593 			p->crtc_vdisplay += p->crtc_vtotal;
594 			p->crtc_vsync_start += p->crtc_vtotal;
595 			p->crtc_vsync_end += p->crtc_vtotal;
596 			p->crtc_vtotal += p->crtc_vtotal;
597 			break;
598 		}
599 	}
600 
601 	p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
602 	p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
603 	p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
604 	p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
605 }
606 
607 /**
608  * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420
609  * output format
610  *
611  * @connector: drm connector under action.
612  * @mode: video mode to be tested.
613  *
614  * Returns:
615  * true if the mode can be supported in YCBCR420 format
616  * false if not.
617  */
618 bool drm_mode_is_420_only(const struct drm_display_info *display,
619 			  struct drm_display_mode *mode)
620 {
621 	u8 vic = drm_match_cea_mode(mode);
622 
623 	return test_bit(vic, display->hdmi.y420_vdb_modes);
624 }
625 
626 /**
627  * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420
628  * output format also (along with RGB/YCBCR444/422)
629  *
630  * @display: display under action.
631  * @mode: video mode to be tested.
632  *
633  * Returns:
634  * true if the mode can be support YCBCR420 format
635  * false if not.
636  */
637 bool drm_mode_is_420_also(const struct drm_display_info *display,
638 			  struct drm_display_mode *mode)
639 {
640 	u8 vic = drm_match_cea_mode(mode);
641 
642 	return test_bit(vic, display->hdmi.y420_cmdb_modes);
643 }
644 
645 /**
646  * drm_mode_is_420 - if a given videomode can be supported in YCBCR420
647  * output format
648  *
649  * @display: display under action.
650  * @mode: video mode to be tested.
651  *
652  * Returns:
653  * true if the mode can be supported in YCBCR420 format
654  * false if not.
655  */
656 bool drm_mode_is_420(const struct drm_display_info *display,
657 		     struct drm_display_mode *mode)
658 {
659 	return drm_mode_is_420_only(display, mode) ||
660 		drm_mode_is_420_also(display, mode);
661 }
662 
663 static int display_get_timing(struct display_state *state)
664 {
665 	struct connector_state *conn_state = &state->conn_state;
666 	struct drm_display_mode *mode = &conn_state->mode;
667 	const struct drm_display_mode *m;
668 	struct rockchip_panel *panel = conn_state->connector->panel;
669 
670 	if (panel->funcs->get_mode)
671 		return panel->funcs->get_mode(panel, mode);
672 
673 	if (dev_of_valid(panel->dev) &&
674 	    !display_get_timing_from_dts(panel, mode)) {
675 		printf("Using display timing dts\n");
676 		return 0;
677 	}
678 
679 	if (panel->data) {
680 		m = (const struct drm_display_mode *)panel->data;
681 		memcpy(mode, m, sizeof(*m));
682 		printf("Using display timing from compatible panel driver\n");
683 		return 0;
684 	}
685 
686 	return -ENODEV;
687 }
688 
689 static int display_pre_init(void)
690 {
691 	struct display_state *state;
692 	int ret = 0;
693 
694 	list_for_each_entry(state, &rockchip_display_list, head) {
695 		struct connector_state *conn_state = &state->conn_state;
696 		struct crtc_state *crtc_state = &state->crtc_state;
697 		struct rockchip_crtc *crtc = crtc_state->crtc;
698 
699 		ret = rockchip_connector_pre_init(state);
700 		if (ret)
701 			printf("pre init conn error\n");
702 
703 		crtc->vps[crtc_state->crtc_id].output_type = conn_state->type;
704 	}
705 	return ret;
706 }
707 
708 static int display_use_force_mode(struct display_state *state)
709 {
710 	struct connector_state *conn_state = &state->conn_state;
711 	struct drm_display_mode *mode = &conn_state->mode;
712 
713 	conn_state->bpc = 8;
714 	memcpy(mode, &state->force_mode, sizeof(struct drm_display_mode));
715 	conn_state->bus_format = state->force_bus_format;
716 
717 	return 0;
718 }
719 
720 static int display_get_edid_mode(struct display_state *state)
721 {
722 	int ret = 0;
723 	struct connector_state *conn_state = &state->conn_state;
724 	struct drm_display_mode *mode = &conn_state->mode;
725 	int bpc;
726 
727 	ret = edid_get_drm_mode(conn_state->edid, sizeof(conn_state->edid), mode, &bpc);
728 	if (!ret) {
729 		conn_state->bpc = bpc;
730 		edid_print_info((void *)&conn_state->edid);
731 	} else {
732 		conn_state->bpc = 8;
733 		mode->clock = 74250;
734 		mode->flags = 0x5;
735 		mode->hdisplay = 1280;
736 		mode->hsync_start = 1390;
737 		mode->hsync_end = 1430;
738 		mode->htotal = 1650;
739 		mode->hskew = 0;
740 		mode->vdisplay = 720;
741 		mode->vsync_start = 725;
742 		mode->vsync_end = 730;
743 		mode->vtotal = 750;
744 		mode->vrefresh = 60;
745 		mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9;
746 		mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
747 
748 		printf("error: %s get mode from edid failed, use 720p60 as default mode\n",
749 		       state->conn_state.connector->dev->name);
750 	}
751 
752 	return ret;
753 }
754 
755 static int display_mode_valid(struct display_state *state)
756 {
757 	struct connector_state *conn_state = &state->conn_state;
758 	struct rockchip_connector *conn = conn_state->connector;
759 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
760 	struct crtc_state *crtc_state = &state->crtc_state;
761 	const struct rockchip_crtc *crtc = crtc_state->crtc;
762 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
763 	int ret;
764 
765 	if (conn_funcs->mode_valid) {
766 		ret = conn_funcs->mode_valid(conn, state);
767 		if (ret)
768 			return ret;
769 	}
770 
771 	if (crtc_funcs->mode_valid) {
772 		ret = crtc_funcs->mode_valid(state);
773 		if (ret)
774 			return ret;
775 	}
776 
777 	return 0;
778 }
779 
780 static int display_init(struct display_state *state)
781 {
782 	struct connector_state *conn_state = &state->conn_state;
783 	struct rockchip_connector *conn = conn_state->connector;
784 	struct crtc_state *crtc_state = &state->crtc_state;
785 	struct rockchip_crtc *crtc = crtc_state->crtc;
786 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
787 	struct drm_display_mode *mode = &conn_state->mode;
788 	const char *compatible;
789 	int ret = 0;
790 	static bool __print_once = false;
791 
792 	if (!__print_once) {
793 		__print_once = true;
794 		printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION);
795 	}
796 
797 	if (state->is_init)
798 		return 0;
799 
800 	if (!crtc_funcs) {
801 		printf("failed to find crtc functions\n");
802 		return -ENXIO;
803 	}
804 
805 	if (crtc_state->crtc->active && !crtc_state->ports_node &&
806 	    memcmp(&crtc_state->crtc->active_mode, &conn_state->mode,
807 		   sizeof(struct drm_display_mode))) {
808 		printf("%s has been used for output type: %d, mode: %dx%dp%d\n",
809 			crtc_state->dev->name,
810 			crtc_state->crtc->active_mode.type,
811 			crtc_state->crtc->active_mode.hdisplay,
812 			crtc_state->crtc->active_mode.vdisplay,
813 			crtc_state->crtc->active_mode.vrefresh);
814 		return -ENODEV;
815 	}
816 
817 	if (crtc_funcs->preinit) {
818 		ret = crtc_funcs->preinit(state);
819 		if (ret)
820 			return ret;
821 	}
822 
823 	ret = rockchip_connector_init(state);
824 	if (ret)
825 		goto deinit;
826 
827 	/*
828 	 * support hotplug, but not connect;
829 	 */
830 #ifdef CONFIG_DRM_ROCKCHIP_TVE
831 	if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) {
832 		printf("hdmi plugin ,skip tve\n");
833 		goto deinit;
834 	}
835 #elif defined(CONFIG_DRM_ROCKCHIP_RK1000)
836 	if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) {
837 		printf("hdmi plugin ,skip tve\n");
838 		goto deinit;
839 	}
840 #endif
841 
842 	ret = rockchip_connector_detect(state);
843 #if defined(CONFIG_DRM_ROCKCHIP_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000)
844 	if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA)
845 		crtc->hdmi_hpd = ret;
846 #endif
847 	if (!ret && !state->force_output)
848 		goto deinit;
849 
850 	if (conn->panel) {
851 		ret = display_get_timing(state);
852 		if (!ret)
853 			conn_state->bpc = conn->panel->bpc;
854 #if defined(CONFIG_I2C_EDID)
855 		if (ret < 0 && conn->funcs->get_edid) {
856 			rockchip_panel_prepare(conn->panel);
857 			ret = conn->funcs->get_edid(conn, state);
858 			if (!ret)
859 				display_get_edid_mode(state);
860 		}
861 #endif
862 	} else if (conn->bridge) {
863 		ret = video_bridge_read_edid(conn->bridge->dev,
864 					     conn_state->edid, EDID_SIZE);
865 		if (ret > 0) {
866 #if defined(CONFIG_I2C_EDID)
867 			display_get_edid_mode(state);
868 #endif
869 		} else {
870 			ret = video_bridge_get_timing(conn->bridge->dev);
871 		}
872 	} else if (conn->funcs->get_timing) {
873 		ret = conn->funcs->get_timing(conn, state);
874 	} else if (conn->funcs->get_edid) {
875 		ret = conn->funcs->get_edid(conn, state);
876 #if defined(CONFIG_I2C_EDID)
877 		if (!ret)
878 			display_get_edid_mode(state);
879 #endif
880 	}
881 
882 	if (!ret && conn_state->secondary) {
883 		struct rockchip_connector *connector = conn_state->secondary;
884 
885 		if (connector->panel) {
886 			if (connector->panel->funcs->get_mode) {
887 				struct drm_display_mode *_mode = drm_mode_create();
888 
889 				ret = connector->panel->funcs->get_mode(connector->panel, _mode);
890 				if (!ret && !drm_mode_equal(_mode, mode))
891 					ret = -EINVAL;
892 
893 				drm_mode_destroy(_mode);
894 			}
895 		}
896 	}
897 
898 	if (ret && !state->force_output)
899 		goto deinit;
900 	if (state->force_output)
901 		display_use_force_mode(state);
902 
903 	if (display_mode_valid(state))
904 		goto deinit;
905 
906 	/* rk356x series drive mipi pixdata on posedge */
907 	compatible = dev_read_string(conn->dev, "compatible");
908 	if (!strcmp(compatible, "rockchip,rk3568-mipi-dsi"))
909 		conn_state->mode.flags |= DRM_MODE_FLAG_PPIXDATA;
910 
911 	printf("%s: %s detailed mode clock %u kHz, flags[%x]\n"
912 	       "    H: %04d %04d %04d %04d\n"
913 	       "    V: %04d %04d %04d %04d\n"
914 	       "bus_format: %x\n",
915 	       conn->dev->name,
916 	       state->force_output ? "use force output" : "",
917 	       mode->clock, mode->flags,
918 	       mode->hdisplay, mode->hsync_start,
919 	       mode->hsync_end, mode->htotal,
920 	       mode->vdisplay, mode->vsync_start,
921 	       mode->vsync_end, mode->vtotal,
922 	       conn_state->bus_format);
923 
924 	drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
925 
926 	if (conn_state->secondary) {
927 		mode->crtc_clock *= 2;
928 		mode->crtc_hdisplay *= 2;
929 		mode->crtc_hsync_start *= 2;
930 		mode->crtc_hsync_end *= 2;
931 		mode->crtc_htotal *= 2;
932 	}
933 
934 	if (conn->bridge)
935 		rockchip_bridge_mode_set(conn->bridge, &conn_state->mode);
936 
937 	if (crtc_funcs->init) {
938 		ret = crtc_funcs->init(state);
939 		if (ret)
940 			goto deinit;
941 	}
942 	state->is_init = 1;
943 
944 	crtc_state->crtc->active = true;
945 	memcpy(&crtc_state->crtc->active_mode,
946 	       &conn_state->mode, sizeof(struct drm_display_mode));
947 
948 	return 0;
949 
950 deinit:
951 	rockchip_connector_deinit(state);
952 	return ret;
953 }
954 
955 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val)
956 {
957 	struct crtc_state *crtc_state = &state->crtc_state;
958 	const struct rockchip_crtc *crtc = crtc_state->crtc;
959 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
960 	int ret;
961 
962 	if (!state->is_init)
963 		return -EINVAL;
964 
965 	if (crtc_funcs->send_mcu_cmd) {
966 		ret = crtc_funcs->send_mcu_cmd(state, type, val);
967 		if (ret)
968 			return ret;
969 	}
970 
971 	return 0;
972 }
973 
974 static int display_set_plane(struct display_state *state)
975 {
976 	struct crtc_state *crtc_state = &state->crtc_state;
977 	const struct rockchip_crtc *crtc = crtc_state->crtc;
978 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
979 	int ret;
980 
981 	if (!state->is_init)
982 		return -EINVAL;
983 
984 	if (crtc_funcs->set_plane) {
985 		ret = crtc_funcs->set_plane(state);
986 		if (ret)
987 			return ret;
988 	}
989 
990 	return 0;
991 }
992 
993 static int display_enable(struct display_state *state)
994 {
995 	struct crtc_state *crtc_state = &state->crtc_state;
996 	const struct rockchip_crtc *crtc = crtc_state->crtc;
997 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
998 
999 	if (!state->is_init)
1000 		return -EINVAL;
1001 
1002 	if (state->is_enable)
1003 		return 0;
1004 
1005 	if (crtc_funcs->prepare)
1006 		crtc_funcs->prepare(state);
1007 
1008 	rockchip_connector_pre_enable(state);
1009 
1010 	if (crtc_funcs->enable)
1011 		crtc_funcs->enable(state);
1012 
1013 	rockchip_connector_enable(state);
1014 
1015 	if (crtc_state->soft_te)
1016 		crtc_funcs->apply_soft_te(state);
1017 
1018 	state->is_enable = true;
1019 
1020 	return 0;
1021 }
1022 
1023 static int display_disable(struct display_state *state)
1024 {
1025 	struct crtc_state *crtc_state = &state->crtc_state;
1026 	const struct rockchip_crtc *crtc = crtc_state->crtc;
1027 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
1028 
1029 	if (!state->is_init)
1030 		return 0;
1031 
1032 	if (!state->is_enable)
1033 		return 0;
1034 
1035 	rockchip_connector_disable(state);
1036 
1037 	if (crtc_funcs->disable)
1038 		crtc_funcs->disable(state);
1039 
1040 	rockchip_connector_post_disable(state);
1041 
1042 	state->is_enable = 0;
1043 	state->is_init = 0;
1044 
1045 	return 0;
1046 }
1047 
1048 static int display_rect_calc_scale(int src, int dst)
1049 {
1050 	int scale = 0;
1051 
1052 	if (WARN_ON(src < 0 || dst < 0))
1053 		return -EINVAL;
1054 
1055 	if (dst == 0)
1056 		return 0;
1057 
1058 	src <<= 16;
1059 
1060 	if (src > (dst << 16))
1061 		return DIV_ROUND_UP(src, dst);
1062 	else
1063 		scale = src / dst;
1064 
1065 	return scale;
1066 }
1067 
1068 int display_rect_calc_hscale(struct display_rect *src, struct display_rect *dst,
1069 			     int min_hscale, int max_hscale)
1070 {
1071 	int hscale = display_rect_calc_scale(src->w, dst->w);
1072 
1073 	if (hscale < 0 || dst->w == 0)
1074 		return hscale;
1075 
1076 	if (hscale < min_hscale || hscale > max_hscale)
1077 		return -ERANGE;
1078 
1079 	return hscale;
1080 }
1081 
1082 int display_rect_calc_vscale(struct display_rect *src, struct display_rect *dst,
1083 			     int min_vscale, int max_vscale)
1084 {
1085 	int vscale = display_rect_calc_scale(src->h, dst->h);
1086 
1087 	if (vscale < 0 || dst->h == 0)
1088 		return vscale;
1089 
1090 	if (vscale < min_vscale || vscale > max_vscale)
1091 		return -ERANGE;
1092 
1093 	return vscale;
1094 }
1095 
1096 static int display_check(struct display_state *state)
1097 {
1098 	struct connector_state *conn_state = &state->conn_state;
1099 	struct rockchip_connector *conn = conn_state->connector;
1100 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
1101 	struct crtc_state *crtc_state = &state->crtc_state;
1102 	const struct rockchip_crtc *crtc = crtc_state->crtc;
1103 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
1104 	int ret;
1105 
1106 	if (!state->is_init)
1107 		return 0;
1108 
1109 	if (conn_funcs->check) {
1110 		ret = conn_funcs->check(conn, state);
1111 		if (ret)
1112 			goto check_fail;
1113 	}
1114 
1115 	if (crtc_funcs->check) {
1116 		ret = crtc_funcs->check(state);
1117 		if (ret)
1118 			goto check_fail;
1119 	}
1120 
1121 	if (crtc_funcs->plane_check) {
1122 		ret = crtc_funcs->plane_check(state);
1123 		if (ret)
1124 			goto check_fail;
1125 	}
1126 
1127 	return 0;
1128 
1129 check_fail:
1130 	state->is_init = false;
1131 	return ret;
1132 }
1133 
1134 static int display_logo(struct display_state *state)
1135 {
1136 	struct crtc_state *crtc_state = &state->crtc_state;
1137 	struct connector_state *conn_state = &state->conn_state;
1138 	struct logo_info *logo = &state->logo;
1139 	int hdisplay, vdisplay, ret;
1140 
1141 	ret = display_init(state);
1142 	if (!state->is_init || ret)
1143 		return -ENODEV;
1144 
1145 	switch (logo->bpp) {
1146 	case 16:
1147 		crtc_state->format = ROCKCHIP_FMT_RGB565;
1148 		break;
1149 	case 24:
1150 		crtc_state->format = ROCKCHIP_FMT_RGB888;
1151 		break;
1152 	case 32:
1153 		crtc_state->format = ROCKCHIP_FMT_ARGB8888;
1154 		break;
1155 	default:
1156 		printf("can't support bmp bits[%d]\n", logo->bpp);
1157 		return -EINVAL;
1158 	}
1159 	hdisplay = conn_state->mode.crtc_hdisplay;
1160 	vdisplay = conn_state->mode.vdisplay;
1161 	crtc_state->src_rect.w = logo->width;
1162 	crtc_state->src_rect.h = logo->height;
1163 	crtc_state->src_rect.x = 0;
1164 	crtc_state->src_rect.y = 0;
1165 	crtc_state->ymirror = logo->ymirror;
1166 	crtc_state->rb_swap = 0;
1167 
1168 	crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset;
1169 	crtc_state->xvir = ALIGN(crtc_state->src_rect.w * logo->bpp, 32) >> 5;
1170 
1171 	if (state->logo_mode == ROCKCHIP_DISPLAY_FULLSCREEN) {
1172 		crtc_state->crtc_rect.x = 0;
1173 		crtc_state->crtc_rect.y = 0;
1174 		crtc_state->crtc_rect.w = hdisplay;
1175 		crtc_state->crtc_rect.h = vdisplay;
1176 	} else {
1177 		if (crtc_state->src_rect.w >= hdisplay) {
1178 			crtc_state->crtc_rect.x = 0;
1179 			crtc_state->crtc_rect.w = hdisplay;
1180 		} else {
1181 			crtc_state->crtc_rect.x = (hdisplay - crtc_state->src_rect.w) / 2;
1182 			crtc_state->crtc_rect.w = crtc_state->src_rect.w;
1183 		}
1184 
1185 		if (crtc_state->src_rect.h >= vdisplay) {
1186 			crtc_state->crtc_rect.y = 0;
1187 			crtc_state->crtc_rect.h = vdisplay;
1188 		} else {
1189 			crtc_state->crtc_rect.y = (vdisplay - crtc_state->src_rect.h) / 2;
1190 			crtc_state->crtc_rect.h = crtc_state->src_rect.h;
1191 		}
1192 	}
1193 
1194 	display_check(state);
1195 	display_set_plane(state);
1196 	display_enable(state);
1197 
1198 	return 0;
1199 }
1200 
1201 static int get_crtc_id(ofnode connect, bool is_ports_node)
1202 {
1203 	struct device_node *port_node;
1204 	struct device_node *remote;
1205 	int phandle;
1206 	int val;
1207 
1208 	if (is_ports_node) {
1209 		port_node = of_get_parent(connect.np);
1210 		if (!port_node)
1211 			goto err;
1212 
1213 		val = ofnode_read_u32_default(np_to_ofnode(port_node), "reg", -1);
1214 		if (val < 0)
1215 			goto err;
1216 	} else {
1217 		phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1);
1218 		if (phandle < 0)
1219 			goto err;
1220 
1221 		remote = of_find_node_by_phandle(phandle);
1222 		if (!remote)
1223 			goto err;
1224 
1225 		val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1);
1226 		if (val < 0)
1227 			goto err;
1228 	}
1229 
1230 	return val;
1231 err:
1232 	printf("Can't get crtc id, default set to id = 0\n");
1233 	return 0;
1234 }
1235 
1236 static int get_crtc_mcu_mode(struct crtc_state *crtc_state)
1237 {
1238 	ofnode mcu_node;
1239 	int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend;
1240 
1241 	mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing");
1242 	if (!ofnode_valid(mcu_node))
1243 		return -ENODEV;
1244 
1245 #define FDT_GET_MCU_INT(val, name) \
1246 	do { \
1247 		val = ofnode_read_s32_default(mcu_node, name, -1); \
1248 		if (val < 0) { \
1249 			printf("Can't get %s\n", name); \
1250 			return -ENXIO; \
1251 		} \
1252 	} while (0)
1253 
1254 	FDT_GET_MCU_INT(total_pixel, "mcu-pix-total");
1255 	FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst");
1256 	FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend");
1257 	FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst");
1258 	FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend");
1259 
1260 	crtc_state->mcu_timing.mcu_pix_total = total_pixel;
1261 	crtc_state->mcu_timing.mcu_cs_pst = cs_pst;
1262 	crtc_state->mcu_timing.mcu_cs_pend = cs_pend;
1263 	crtc_state->mcu_timing.mcu_rw_pst = rw_pst;
1264 	crtc_state->mcu_timing.mcu_rw_pend = rw_pend;
1265 
1266 	return 0;
1267 }
1268 
1269 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp)
1270 {
1271 	struct rockchip_logo_cache *tmp, *logo_cache = NULL;
1272 
1273 	list_for_each_entry(tmp, &logo_cache_list, head) {
1274 		if (!strcmp(tmp->name, bmp)) {
1275 			logo_cache = tmp;
1276 			break;
1277 		}
1278 	}
1279 
1280 	if (!logo_cache) {
1281 		logo_cache = malloc(sizeof(*logo_cache));
1282 		if (!logo_cache) {
1283 			printf("failed to alloc memory for logo cache\n");
1284 			return NULL;
1285 		}
1286 		memset(logo_cache, 0, sizeof(*logo_cache));
1287 		strcpy(logo_cache->name, bmp);
1288 		INIT_LIST_HEAD(&logo_cache->head);
1289 		list_add_tail(&logo_cache->head, &logo_cache_list);
1290 	}
1291 
1292 	return logo_cache;
1293 }
1294 
1295 /* Note: used only for rkfb kernel driver */
1296 static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name)
1297 {
1298 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
1299 	void *dst = NULL;
1300 	int len, size;
1301 	struct bmp_header *header;
1302 
1303 	if (!logo || !bmp_name)
1304 		return -EINVAL;
1305 
1306 	header = malloc(RK_BLK_SIZE);
1307 	if (!header)
1308 		return -ENOMEM;
1309 
1310 	len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
1311 	if (len != RK_BLK_SIZE) {
1312 		free(header);
1313 		return -EINVAL;
1314 	}
1315 	size = get_unaligned_le32(&header->file_size);
1316 	dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2);
1317 	len = rockchip_read_resource_file(dst, bmp_name, 0, size);
1318 	if (len != size) {
1319 		printf("failed to load bmp %s\n", bmp_name);
1320 		free(header);
1321 		return -ENOENT;
1322 	}
1323 
1324 	logo->mem = dst;
1325 #endif
1326 
1327 	return 0;
1328 }
1329 
1330 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
1331 {
1332 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
1333 	struct rockchip_logo_cache *logo_cache;
1334 	struct bmp_header *header;
1335 	void *dst = NULL, *pdst;
1336 	int size, len;
1337 	int ret = 0;
1338 	int reserved = 0;
1339 	int dst_size;
1340 
1341 	if (!logo || !bmp_name)
1342 		return -EINVAL;
1343 	logo_cache = find_or_alloc_logo_cache(bmp_name);
1344 	if (!logo_cache)
1345 		return -ENOMEM;
1346 
1347 	if (logo_cache->logo.mem) {
1348 		memcpy(logo, &logo_cache->logo, sizeof(*logo));
1349 		return 0;
1350 	}
1351 
1352 	header = malloc(RK_BLK_SIZE);
1353 	if (!header)
1354 		return -ENOMEM;
1355 
1356 	len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
1357 	if (len != RK_BLK_SIZE) {
1358 		ret = -EINVAL;
1359 		goto free_header;
1360 	}
1361 
1362 	logo->bpp = get_unaligned_le16(&header->bit_count);
1363 	logo->width = get_unaligned_le32(&header->width);
1364 	logo->height = get_unaligned_le32(&header->height);
1365 	dst_size = logo->width * logo->height * logo->bpp >> 3;
1366 	reserved = get_unaligned_le32(&header->reserved);
1367 	if (logo->height < 0)
1368 	    logo->height = -logo->height;
1369 	size = get_unaligned_le32(&header->file_size);
1370 	if (!can_direct_logo(logo->bpp)) {
1371 		if (size > MEMORY_POOL_SIZE) {
1372 			printf("failed to use boot buf as temp bmp buffer\n");
1373 			ret = -ENOMEM;
1374 			goto free_header;
1375 		}
1376 		pdst = get_display_buffer(size);
1377 
1378 	} else {
1379 		pdst = get_display_buffer(size);
1380 		dst = pdst;
1381 	}
1382 
1383 	len = rockchip_read_resource_file(pdst, bmp_name, 0, size);
1384 	if (len != size) {
1385 		printf("failed to load bmp %s\n", bmp_name);
1386 		ret = -ENOENT;
1387 		goto free_header;
1388 	}
1389 
1390 	if (!can_direct_logo(logo->bpp)) {
1391 		/*
1392 		 * TODO: force use 16bpp if bpp less than 16;
1393 		 */
1394 		logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
1395 		dst_size = logo->width * logo->height * logo->bpp >> 3;
1396 		dst = get_display_buffer(dst_size);
1397 		if (!dst) {
1398 			ret = -ENOMEM;
1399 			goto free_header;
1400 		}
1401 		if (bmpdecoder(pdst, dst, logo->bpp)) {
1402 			printf("failed to decode bmp %s\n", bmp_name);
1403 			ret = -EINVAL;
1404 			goto free_header;
1405 		}
1406 
1407 		logo->offset = 0;
1408 		logo->ymirror = 0;
1409 	} else {
1410 		logo->offset = get_unaligned_le32(&header->data_offset);
1411 		if (reserved == BMP_PROCESSED_FLAG)
1412 			logo->ymirror = 0;
1413 		else
1414 			logo->ymirror = 1;
1415 	}
1416 	logo->mem = dst;
1417 
1418 	memcpy(&logo_cache->logo, logo, sizeof(*logo));
1419 
1420 	flush_dcache_range((ulong)dst, ALIGN((ulong)dst + dst_size, CONFIG_SYS_CACHELINE_SIZE));
1421 
1422 free_header:
1423 
1424 	free(header);
1425 
1426 	return ret;
1427 #else
1428 	return -EINVAL;
1429 #endif
1430 }
1431 
1432 void rockchip_show_fbbase(ulong fbbase)
1433 {
1434 	struct display_state *s;
1435 
1436 	list_for_each_entry(s, &rockchip_display_list, head) {
1437 		s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN;
1438 		s->logo.mem = (char *)fbbase;
1439 		s->logo.width = DRM_ROCKCHIP_FB_WIDTH;
1440 		s->logo.height = DRM_ROCKCHIP_FB_HEIGHT;
1441 		s->logo.bpp = 32;
1442 		s->logo.ymirror = 0;
1443 
1444 		display_logo(s);
1445 	}
1446 }
1447 
1448 int rockchip_show_bmp(const char *bmp)
1449 {
1450 	struct display_state *s;
1451 	int ret = 0;
1452 
1453 	if (!bmp) {
1454 		list_for_each_entry(s, &rockchip_display_list, head)
1455 			display_disable(s);
1456 		return -ENOENT;
1457 	}
1458 
1459 	list_for_each_entry(s, &rockchip_display_list, head) {
1460 		s->logo.mode = s->charge_logo_mode;
1461 		if (load_bmp_logo(&s->logo, bmp))
1462 			continue;
1463 		ret = display_logo(s);
1464 	}
1465 
1466 	return ret;
1467 }
1468 
1469 int rockchip_show_logo(void)
1470 {
1471 	struct display_state *s;
1472 	int ret = 0;
1473 
1474 	list_for_each_entry(s, &rockchip_display_list, head) {
1475 		s->logo.mode = s->logo_mode;
1476 		if (load_bmp_logo(&s->logo, s->ulogo_name))
1477 			printf("failed to display uboot logo\n");
1478 		else
1479 			ret = display_logo(s);
1480 
1481 		/* Load kernel bmp in rockchip_display_fixup() later */
1482 	}
1483 
1484 	return ret;
1485 }
1486 
1487 int rockchip_vop_dump(const char *cmd)
1488 {
1489 	struct display_state *state;
1490 	struct crtc_state *crtc_state;
1491 	struct rockchip_crtc *crtc;
1492 	const struct rockchip_crtc_funcs *crtc_funcs;
1493 	int ret = -EINVAL;
1494 
1495 	list_for_each_entry(state, &rockchip_display_list, head) {
1496 		if (!state->is_init)
1497 			continue;
1498 		crtc_state = &state->crtc_state;
1499 		crtc = crtc_state->crtc;
1500 		crtc_funcs = crtc->funcs;
1501 
1502 		if (!cmd)
1503 			ret = crtc_funcs->active_regs_dump(state);
1504 		else if (!strcmp(cmd, "a") || !strcmp(cmd, "all"))
1505 			ret = crtc_funcs->regs_dump(state);
1506 		if (!ret)
1507 			break;
1508 	}
1509 
1510 	if (ret)
1511 		ret = CMD_RET_USAGE;
1512 
1513 	return ret;
1514 }
1515 
1516 enum {
1517 	PORT_DIR_IN,
1518 	PORT_DIR_OUT,
1519 };
1520 
1521 static const struct device_node *rockchip_of_graph_get_port_by_id(ofnode node, int id)
1522 {
1523 	ofnode ports, port;
1524 	u32 reg;
1525 
1526 	ports = ofnode_find_subnode(node, "ports");
1527 	if (!ofnode_valid(ports))
1528 		return NULL;
1529 
1530 	ofnode_for_each_subnode(port, ports) {
1531 		if (ofnode_read_u32(port, "reg", &reg))
1532 			continue;
1533 
1534 		if (reg == id)
1535 			break;
1536 	}
1537 
1538 	if (reg == id)
1539 		return ofnode_to_np(port);
1540 
1541 	return NULL;
1542 }
1543 
1544 static const struct device_node *rockchip_of_graph_get_port_parent(ofnode port)
1545 {
1546 	ofnode parent;
1547 	int is_ports_node;
1548 
1549 	parent = ofnode_get_parent(port);
1550 	is_ports_node = strstr(ofnode_to_np(parent)->full_name, "ports") ? 1 : 0;
1551 	if (is_ports_node)
1552 		parent = ofnode_get_parent(parent);
1553 
1554 	return ofnode_to_np(parent);
1555 }
1556 
1557 const struct device_node *
1558 rockchip_of_graph_get_endpoint_by_regs(ofnode node, int port, int endpoint)
1559 {
1560 	const struct device_node *port_node;
1561 	ofnode ep;
1562 	u32 reg;
1563 
1564 	port_node = rockchip_of_graph_get_port_by_id(node, port);
1565 	if (!port_node)
1566 		return NULL;
1567 
1568 	ofnode_for_each_subnode(ep, np_to_ofnode(port_node)) {
1569 		if (ofnode_read_u32(ep, "reg", &reg))
1570 			break;
1571 		if (reg == endpoint)
1572 			break;
1573 	}
1574 
1575 	if (!ofnode_valid(ep))
1576 		return NULL;
1577 
1578 	return ofnode_to_np(ep);
1579 }
1580 
1581 static const struct device_node *
1582 rockchip_of_graph_get_remote_node(ofnode node, int port, int endpoint)
1583 {
1584 	const struct device_node *ep_node;
1585 	ofnode ep;
1586 	uint phandle;
1587 
1588 	ep_node = rockchip_of_graph_get_endpoint_by_regs(node, port, endpoint);
1589 	if (!ep_node)
1590 		return NULL;
1591 
1592 	if (ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle))
1593 		return NULL;
1594 
1595 	ep = ofnode_get_by_phandle(phandle);
1596 	if (!ofnode_valid(ep))
1597 		return NULL;
1598 
1599 	return ofnode_to_np(ep);
1600 }
1601 
1602 static int rockchip_of_find_panel(struct udevice *dev, struct rockchip_panel **panel)
1603 {
1604 	const struct device_node *ep_node, *panel_node;
1605 	ofnode panel_ofnode, port;
1606 	struct udevice *panel_dev;
1607 	int ret = 0;
1608 
1609 	*panel = NULL;
1610 	panel_ofnode = dev_read_subnode(dev, "panel");
1611 	if (ofnode_valid(panel_ofnode) && ofnode_is_available(panel_ofnode)) {
1612 		ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_ofnode,
1613 						  &panel_dev);
1614 		if (!ret)
1615 			goto found;
1616 	}
1617 
1618 	ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0);
1619 	if (!ep_node)
1620 		return -ENODEV;
1621 
1622 	port = ofnode_get_parent(np_to_ofnode(ep_node));
1623 	if (!ofnode_valid(port))
1624 		return -ENODEV;
1625 
1626 	panel_node = rockchip_of_graph_get_port_parent(port);
1627 	if (!panel_node)
1628 		return -ENODEV;
1629 
1630 	ret = uclass_get_device_by_ofnode(UCLASS_PANEL, np_to_ofnode(panel_node), &panel_dev);
1631 	if (!ret)
1632 		goto found;
1633 
1634 	return -ENODEV;
1635 
1636 found:
1637 	*panel = (struct rockchip_panel *)dev_get_driver_data(panel_dev);
1638 	return 0;
1639 }
1640 
1641 static int rockchip_of_find_bridge(struct udevice *dev, struct rockchip_bridge **bridge)
1642 {
1643 	const struct device_node *ep_node, *bridge_node;
1644 	ofnode port;
1645 	struct udevice *bridge_dev;
1646 	int ret = 0;
1647 
1648 	ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0);
1649 	if (!ep_node)
1650 		return -ENODEV;
1651 
1652 	port = ofnode_get_parent(np_to_ofnode(ep_node));
1653 	if (!ofnode_valid(port))
1654 		return -ENODEV;
1655 
1656 	bridge_node = rockchip_of_graph_get_port_parent(port);
1657 	if (!bridge_node)
1658 		return -ENODEV;
1659 
1660 	ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, np_to_ofnode(bridge_node),
1661 					  &bridge_dev);
1662 	if (!ret)
1663 		goto found;
1664 
1665 	return -ENODEV;
1666 
1667 found:
1668 	*bridge = (struct rockchip_bridge *)dev_get_driver_data(bridge_dev);
1669 	return 0;
1670 }
1671 
1672 static int rockchip_of_find_panel_or_bridge(struct udevice *dev, struct rockchip_panel **panel,
1673 					    struct rockchip_bridge **bridge)
1674 {
1675 	int ret = 0;
1676 
1677 	if (*panel)
1678 		return 0;
1679 
1680 	*panel = NULL;
1681 	*bridge = NULL;
1682 
1683 	if (panel) {
1684 		ret  = rockchip_of_find_panel(dev, panel);
1685 		if (!ret)
1686 			return 0;
1687 	}
1688 
1689 	if (ret) {
1690 		ret = rockchip_of_find_bridge(dev, bridge);
1691 		if (!ret)
1692 			ret = rockchip_of_find_panel_or_bridge((*bridge)->dev, panel,
1693 							       &(*bridge)->next_bridge);
1694 	}
1695 
1696 	return ret;
1697 }
1698 
1699 static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev)
1700 {
1701 	struct udevice *phy_dev;
1702 	int ret;
1703 
1704 	ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev);
1705 	if (ret)
1706 		return NULL;
1707 
1708 	return (struct rockchip_phy *)dev_get_driver_data(phy_dev);
1709 }
1710 
1711 static struct udevice *rockchip_of_find_connector_device(ofnode endpoint)
1712 {
1713 	ofnode ep, port, ports, conn;
1714 	uint phandle;
1715 	struct udevice *dev;
1716 	int ret;
1717 
1718 	if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle))
1719 		return NULL;
1720 
1721 	ep = ofnode_get_by_phandle(phandle);
1722 	if (!ofnode_valid(ep) || !ofnode_is_available(ep))
1723 		return NULL;
1724 
1725 	port = ofnode_get_parent(ep);
1726 	if (!ofnode_valid(port))
1727 		return NULL;
1728 
1729 	ports = ofnode_get_parent(port);
1730 	if (!ofnode_valid(ports))
1731 		return NULL;
1732 
1733 	conn = ofnode_get_parent(ports);
1734 	if (!ofnode_valid(conn) || !ofnode_is_available(conn))
1735 		return NULL;
1736 
1737 	ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev);
1738 	if (ret)
1739 		return NULL;
1740 
1741 	return dev;
1742 }
1743 
1744 static struct rockchip_connector *rockchip_of_get_connector(ofnode endpoint)
1745 {
1746 	struct rockchip_connector *conn;
1747 	struct udevice *dev;
1748 	int ret;
1749 
1750 	dev = rockchip_of_find_connector_device(endpoint);
1751 	if (!dev) {
1752 		printf("Warn: can't find connect driver\n");
1753 		return NULL;
1754 	}
1755 
1756 	conn = get_rockchip_connector_by_device(dev);
1757 	if (!conn)
1758 		return NULL;
1759 	ret = rockchip_of_find_panel_or_bridge(dev, &conn->panel, &conn->bridge);
1760 	if (ret)
1761 		debug("Warn: no find panel or bridge\n");
1762 
1763 	conn->phy = rockchip_of_find_phy(dev);
1764 
1765 	return conn;
1766 }
1767 
1768 static struct rockchip_connector *rockchip_get_split_connector(struct rockchip_connector *conn)
1769 {
1770 	char *conn_name;
1771 	struct device_node *split_node;
1772 	struct udevice *split_dev;
1773 	struct rockchip_connector *split_conn;
1774 	bool split_mode;
1775 	int ret;
1776 
1777 	split_mode = ofnode_read_bool(conn->dev->node, "split-mode");
1778 	if (!split_mode)
1779 		return NULL;
1780 
1781 	switch (conn->type) {
1782 	case DRM_MODE_CONNECTOR_DisplayPort:
1783 		conn_name = "dp";
1784 		break;
1785 	case DRM_MODE_CONNECTOR_eDP:
1786 		conn_name = "edp";
1787 		break;
1788 	case DRM_MODE_CONNECTOR_HDMIA:
1789 		conn_name = "hdmi";
1790 		break;
1791 	default:
1792 		return NULL;
1793 	}
1794 
1795 	split_node = of_alias_get_dev(conn_name, !conn->id);
1796 	if (!split_node || !of_device_is_available(split_node))
1797 		return NULL;
1798 
1799 	ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, np_to_ofnode(split_node), &split_dev);
1800 	if (ret)
1801 		return NULL;
1802 
1803 	split_conn = get_rockchip_connector_by_device(split_dev);
1804 	if (!split_conn)
1805 		return NULL;
1806 	ret = rockchip_of_find_panel_or_bridge(split_dev, &split_conn->panel, &split_conn->bridge);
1807 	if (ret)
1808 		debug("Warn: no find panel or bridge\n");
1809 
1810 	split_conn->phy = rockchip_of_find_phy(split_dev);
1811 
1812 	return split_conn;
1813 }
1814 
1815 static bool rockchip_get_display_path_status(ofnode endpoint)
1816 {
1817 	ofnode ep;
1818 	uint phandle;
1819 
1820 	if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle))
1821 		return false;
1822 
1823 	ep = ofnode_get_by_phandle(phandle);
1824 	if (!ofnode_valid(ep) || !ofnode_is_available(ep))
1825 		return false;
1826 
1827 	return true;
1828 }
1829 
1830 #if defined(CONFIG_ROCKCHIP_RK3568)
1831 static int rockchip_display_fixup_dts(void *blob)
1832 {
1833 	ofnode route_node, route_subnode, conn_ep, conn_port;
1834 	const struct device_node *route_sub_devnode;
1835 	const struct device_node *ep_node, *conn_ep_dev_node;
1836 	u32 phandle;
1837 	int conn_ep_offset;
1838 	const char *route_sub_path, *path;
1839 
1840 	/* Don't go further if new variant after
1841 	 * reading PMUGRF_SOC_CON15
1842 	 */
1843 	if ((readl(0xfdc20100) & GENMASK(15, 14)))
1844 		return 0;
1845 
1846 	route_node = ofnode_path("/display-subsystem/route");
1847 	if (!ofnode_valid(route_node))
1848 		return -EINVAL;
1849 
1850 	ofnode_for_each_subnode(route_subnode, route_node) {
1851 		if (!ofnode_is_available(route_subnode))
1852 			continue;
1853 
1854 		route_sub_devnode = ofnode_to_np(route_subnode);
1855 		route_sub_path = route_sub_devnode->full_name;
1856 		if (!strstr(ofnode_get_name(route_subnode), "dsi") &&
1857 		    !strstr(ofnode_get_name(route_subnode), "edp"))
1858 			return 0;
1859 
1860 		phandle = ofnode_read_u32_default(route_subnode, "connect", -1);
1861 		if (phandle < 0) {
1862 			printf("Warn: can't find connect node's handle\n");
1863 			continue;
1864 		}
1865 
1866 		ep_node = of_find_node_by_phandle(phandle);
1867 		if (!ofnode_valid(np_to_ofnode(ep_node))) {
1868 			printf("Warn: can't find endpoint node from phandle\n");
1869 			continue;
1870 		}
1871 
1872 		ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle);
1873 		conn_ep = ofnode_get_by_phandle(phandle);
1874 		if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep))
1875 			return -ENODEV;
1876 
1877 		conn_port = ofnode_get_parent(conn_ep);
1878 		if (!ofnode_valid(conn_port))
1879 			return -ENODEV;
1880 
1881 		ofnode_for_each_subnode(conn_ep, conn_port) {
1882 			conn_ep_dev_node = ofnode_to_np(conn_ep);
1883 			path = conn_ep_dev_node->full_name;
1884 			ofnode_read_u32(conn_ep, "remote-endpoint", &phandle);
1885 			conn_ep_offset = fdt_path_offset(blob, path);
1886 
1887 			if (!ofnode_is_available(conn_ep) &&
1888 			    strstr(ofnode_get_name(conn_ep), "endpoint@0")) {
1889 				do_fixup_by_path_u32(blob, route_sub_path,
1890 						     "connect", phandle, 1);
1891 				fdt_status_okay(blob, conn_ep_offset);
1892 
1893 			} else if (ofnode_is_available(conn_ep) &&
1894 				   strstr(ofnode_get_name(conn_ep), "endpoint@1")) {
1895 				fdt_status_disabled(blob, conn_ep_offset);
1896 			}
1897 		}
1898 	}
1899 
1900 	return 0;
1901 }
1902 #endif
1903 
1904 static int rockchip_display_probe(struct udevice *dev)
1905 {
1906 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
1907 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
1908 	const void *blob = gd->fdt_blob;
1909 	int phandle;
1910 	struct udevice *crtc_dev;
1911 	struct rockchip_crtc *crtc;
1912 	struct rockchip_connector *conn, *split_conn;
1913 	struct display_state *s;
1914 	const char *name;
1915 	int ret;
1916 	ofnode node, route_node, timing_node;
1917 	struct device_node *port_node, *vop_node, *ep_node, *port_parent_node;
1918 	struct public_phy_data *data;
1919 	bool is_ports_node = false;
1920 
1921 #if defined(CONFIG_ROCKCHIP_RK3568)
1922 	rockchip_display_fixup_dts((void *)blob);
1923 #endif
1924 	/* Before relocation we don't need to do anything */
1925 	if (!(gd->flags & GD_FLG_RELOC))
1926 		return 0;
1927 
1928 	data = malloc(sizeof(struct public_phy_data));
1929 	if (!data) {
1930 		printf("failed to alloc phy data\n");
1931 		return -ENOMEM;
1932 	}
1933 	data->phy_init = false;
1934 
1935 	init_display_buffer(plat->base);
1936 
1937 	route_node = dev_read_subnode(dev, "route");
1938 	if (!ofnode_valid(route_node))
1939 		return -ENODEV;
1940 
1941 	ofnode_for_each_subnode(node, route_node) {
1942 		if (!ofnode_is_available(node))
1943 			continue;
1944 		phandle = ofnode_read_u32_default(node, "connect", -1);
1945 		if (phandle < 0) {
1946 			printf("Warn: can't find connect node's handle\n");
1947 			continue;
1948 		}
1949 		ep_node = of_find_node_by_phandle(phandle);
1950 		if (!ofnode_valid(np_to_ofnode(ep_node))) {
1951 			printf("Warn: can't find endpoint node from phandle\n");
1952 			continue;
1953 		}
1954 		port_node = of_get_parent(ep_node);
1955 		if (!ofnode_valid(np_to_ofnode(port_node))) {
1956 			printf("Warn: can't find port node from phandle\n");
1957 			continue;
1958 		}
1959 
1960 		port_parent_node = of_get_parent(port_node);
1961 		if (!ofnode_valid(np_to_ofnode(port_parent_node))) {
1962 			printf("Warn: can't find port parent node from phandle\n");
1963 			continue;
1964 		}
1965 
1966 		is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0;
1967 		if (is_ports_node) {
1968 			vop_node = of_get_parent(port_parent_node);
1969 			if (!ofnode_valid(np_to_ofnode(vop_node))) {
1970 				printf("Warn: can't find crtc node from phandle\n");
1971 				continue;
1972 			}
1973 		} else {
1974 			vop_node = port_parent_node;
1975 		}
1976 
1977 		ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC,
1978 						  np_to_ofnode(vop_node),
1979 						  &crtc_dev);
1980 		if (ret) {
1981 			printf("Warn: can't find crtc driver %d\n", ret);
1982 			continue;
1983 		}
1984 		crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
1985 
1986 		conn = rockchip_of_get_connector(np_to_ofnode(ep_node));
1987 		if (!conn) {
1988 			printf("Warn: can't get connect driver\n");
1989 			continue;
1990 		}
1991 		split_conn = rockchip_get_split_connector(conn);
1992 
1993 		s = malloc(sizeof(*s));
1994 		if (!s)
1995 			continue;
1996 
1997 		memset(s, 0, sizeof(*s));
1998 
1999 		INIT_LIST_HEAD(&s->head);
2000 		ret = ofnode_read_string_index(node, "logo,uboot", 0, &name);
2001 		if (!ret)
2002 			memcpy(s->ulogo_name, name, strlen(name));
2003 		ret = ofnode_read_string_index(node, "logo,kernel", 0, &name);
2004 		if (!ret)
2005 			memcpy(s->klogo_name, name, strlen(name));
2006 		ret = ofnode_read_string_index(node, "logo,mode", 0, &name);
2007 		if (!strcmp(name, "fullscreen"))
2008 			s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
2009 		else
2010 			s->logo_mode = ROCKCHIP_DISPLAY_CENTER;
2011 		ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name);
2012 		if (!strcmp(name, "fullscreen"))
2013 			s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
2014 		else
2015 			s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER;
2016 
2017 		s->force_output = ofnode_read_bool(node, "force-output");
2018 
2019 		if (s->force_output) {
2020 			timing_node = ofnode_find_subnode(node, "force_timing");
2021 			ret = display_get_force_timing_from_dts(timing_node, &s->force_mode);
2022 			if (ofnode_read_u32(node, "force-bus-format", &s->force_bus_format))
2023 				s->force_bus_format = MEDIA_BUS_FMT_RGB888_1X24;
2024 		}
2025 
2026 		s->blob = blob;
2027 		s->conn_state.connector = conn;
2028 		s->conn_state.secondary = NULL;
2029 		s->conn_state.type = conn->type;
2030 		if (split_conn) {
2031 			s->conn_state.secondary = split_conn;
2032 			s->conn_state.output_flags |= ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE;
2033 			s->conn_state.output_flags |= conn->id ? ROCKCHIP_OUTPUT_DATA_SWAP : 0;
2034 		}
2035 		s->conn_state.overscan.left_margin = 100;
2036 		s->conn_state.overscan.right_margin = 100;
2037 		s->conn_state.overscan.top_margin = 100;
2038 		s->conn_state.overscan.bottom_margin = 100;
2039 		s->crtc_state.node = np_to_ofnode(vop_node);
2040 		s->crtc_state.dev = crtc_dev;
2041 		s->crtc_state.crtc = crtc;
2042 		s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node), is_ports_node);
2043 		s->node = node;
2044 
2045 		if (is_ports_node) { /* only vop2 will get into here */
2046 			ofnode vp_node = np_to_ofnode(port_node);
2047 			static bool get_plane_mask_from_dts;
2048 
2049 			s->crtc_state.ports_node = port_parent_node;
2050 			if (!get_plane_mask_from_dts) {
2051 				ofnode vp_sub_node;
2052 				int vp_id = 0;
2053 				bool vp_enable = false;
2054 
2055 				ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) {
2056 					int cursor_plane = -1;
2057 
2058 					vp_id = ofnode_read_u32_default(vp_node, "reg", 0);
2059 
2060 					s->crtc_state.crtc->vps[vp_id].xmirror_en =
2061 						ofnode_read_bool(vp_node, "xmirror-enable");
2062 
2063 					ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0);
2064 
2065 					cursor_plane = ofnode_read_u32_default(vp_node, "cursor-win-id", -1);
2066 					s->crtc_state.crtc->vps[vp_id].cursor_plane = cursor_plane;
2067 					if (ret) {
2068 						s->crtc_state.crtc->vps[vp_id].plane_mask = ret;
2069 						s->crtc_state.crtc->assign_plane |= true;
2070 						s->crtc_state.crtc->vps[vp_id].primary_plane_id =
2071 							ofnode_read_u32_default(vp_node, "rockchip,primary-plane", U8_MAX);
2072 						printf("get vp%d plane mask:0x%x, primary id:%d, cursor_plane:%d, from dts\n",
2073 						       vp_id,
2074 						       s->crtc_state.crtc->vps[vp_id].plane_mask,
2075 						       s->crtc_state.crtc->vps[vp_id].primary_plane_id == U8_MAX ? -1 :
2076 						       s->crtc_state.crtc->vps[vp_id].primary_plane_id,
2077 						       cursor_plane);
2078 					}
2079 
2080 					/* To check current vp status */
2081 					vp_enable = false;
2082 					ofnode_for_each_subnode(vp_sub_node, vp_node)
2083 						vp_enable |= rockchip_get_display_path_status(vp_sub_node);
2084 					s->crtc_state.crtc->vps[vp_id].enable = vp_enable;
2085 				}
2086 				get_plane_mask_from_dts = true;
2087 			}
2088 		}
2089 
2090 		get_crtc_mcu_mode(&s->crtc_state);
2091 
2092 		ret = ofnode_read_u32_default(s->crtc_state.node,
2093 					      "rockchip,dual-channel-swap", 0);
2094 		s->crtc_state.dual_channel_swap = ret;
2095 
2096 		if (connector_phy_init(conn, data)) {
2097 			printf("Warn: Failed to init phy drivers\n");
2098 			free(s);
2099 			continue;
2100 		}
2101 		list_add_tail(&s->head, &rockchip_display_list);
2102 	}
2103 
2104 	if (list_empty(&rockchip_display_list)) {
2105 		debug("Failed to found available display route\n");
2106 		return -ENODEV;
2107 	}
2108 	rockchip_get_baseparameter();
2109 	display_pre_init();
2110 
2111 	uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH;
2112 	uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT;
2113 	uc_priv->bpix = VIDEO_BPP32;
2114 
2115 	#ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER
2116 	rockchip_show_fbbase(plat->base);
2117 	video_set_flush_dcache(dev, true);
2118 	#endif
2119 
2120 	return 0;
2121 }
2122 
2123 void rockchip_display_fixup(void *blob)
2124 {
2125 	const struct rockchip_connector_funcs *conn_funcs;
2126 	const struct rockchip_crtc_funcs *crtc_funcs;
2127 	struct rockchip_connector *conn;
2128 	const struct rockchip_crtc *crtc;
2129 	struct display_state *s;
2130 	int offset;
2131 	int ret;
2132 	const struct device_node *np;
2133 	const char *path;
2134 	const char *cacm_header;
2135 
2136 	if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) {
2137 		list_for_each_entry(s, &rockchip_display_list, head) {
2138 			ret = load_bmp_logo(&s->logo, s->klogo_name);
2139 			if (ret < 0) {
2140 				s->is_klogo_valid = false;
2141 				printf("VP%d fail to load kernel logo\n", s->crtc_state.crtc_id);
2142 			} else {
2143 				s->is_klogo_valid = true;
2144 			}
2145 		}
2146 
2147 		if (!get_display_size())
2148 			return;
2149 
2150 		offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo",
2151 						    (u64)memory_start,
2152 						    (u64)get_display_size());
2153 		if (offset < 0)
2154 			printf("failed to reserve drm-loader-logo memory\n");
2155 
2156 		offset = fdt_update_reserved_memory(blob, "rockchip,drm-cubic-lut",
2157 						    (u64)cubic_lut_memory_start,
2158 						    (u64)get_cubic_memory_size());
2159 		if (offset < 0)
2160 			printf("failed to reserve drm-cubic-lut memory\n");
2161 	} else {
2162 		printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n");
2163 		/* Compatible with rkfb display, only need reserve memory */
2164 		offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo",
2165 						    (u64)memory_start,
2166 						    MEMORY_POOL_SIZE);
2167 		if (offset < 0)
2168 			printf("failed to reserve fb-loader-logo memory\n");
2169 		else
2170 			list_for_each_entry(s, &rockchip_display_list, head)
2171 				load_kernel_bmp_logo(&s->logo, s->klogo_name);
2172 		return;
2173 	}
2174 
2175 	list_for_each_entry(s, &rockchip_display_list, head) {
2176 		/*
2177 		 * If plane mask is not set in dts, fixup dts to assign it
2178 		 * whether crtc is initialized or not.
2179 		 */
2180 		if (s->crtc_state.crtc->funcs->fixup_dts && !s->crtc_state.crtc->assign_plane)
2181 			s->crtc_state.crtc->funcs->fixup_dts(s, blob);
2182 
2183 		if (!s->is_init || !s->is_klogo_valid)
2184 			continue;
2185 
2186 		conn = s->conn_state.connector;
2187 		if (!conn)
2188 			continue;
2189 		conn_funcs = conn->funcs;
2190 		if (!conn_funcs) {
2191 			printf("failed to get exist connector\n");
2192 			continue;
2193 		}
2194 
2195 		if (s->conn_state.secondary) {
2196 			s->conn_state.mode.clock *= 2;
2197 			s->conn_state.mode.hdisplay *= 2;
2198 		}
2199 
2200 		crtc = s->crtc_state.crtc;
2201 		if (!crtc)
2202 			continue;
2203 
2204 		crtc_funcs = crtc->funcs;
2205 		if (!crtc_funcs) {
2206 			printf("failed to get exist crtc\n");
2207 			continue;
2208 		}
2209 
2210 		np = ofnode_to_np(s->node);
2211 		path = np->full_name;
2212 		fdt_increase_size(blob, 0x400);
2213 #define FDT_SET_U32(name, val) \
2214 		do_fixup_by_path_u32(blob, path, name, val, 1);
2215 
2216 		offset = s->logo.offset + (u32)(unsigned long)s->logo.mem
2217 			 - memory_start;
2218 		FDT_SET_U32("logo,offset", offset);
2219 		FDT_SET_U32("logo,width", s->logo.width);
2220 		FDT_SET_U32("logo,height", s->logo.height);
2221 		FDT_SET_U32("logo,bpp", s->logo.bpp);
2222 		FDT_SET_U32("logo,ymirror", s->logo.ymirror);
2223 		FDT_SET_U32("video,clock", s->conn_state.mode.clock);
2224 		FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay);
2225 		FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay);
2226 		FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end);
2227 		FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end);
2228 		FDT_SET_U32("video,vrefresh",
2229 			    drm_mode_vrefresh(&s->conn_state.mode));
2230 		FDT_SET_U32("video,flags", s->conn_state.mode.flags);
2231 		FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio);
2232 		FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin);
2233 		FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin);
2234 		FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin);
2235 		FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin);
2236 
2237 		if (s->conn_state.disp_info) {
2238 			cacm_header = (const char*)&s->conn_state.disp_info->cacm_header;
2239 
2240 			FDT_SET_U32("bcsh,brightness", s->conn_state.disp_info->bcsh_info.brightness);
2241 			FDT_SET_U32("bcsh,contrast", s->conn_state.disp_info->bcsh_info.contrast);
2242 			FDT_SET_U32("bcsh,saturation", s->conn_state.disp_info->bcsh_info.saturation);
2243 			FDT_SET_U32("bcsh,hue", s->conn_state.disp_info->bcsh_info.hue);
2244 
2245 			if (!strncasecmp(cacm_header, "CACM", 4)) {
2246 				FDT_SET_U32("post_csc,hue",
2247 					    s->conn_state.disp_info->csc_info.hue);
2248 				FDT_SET_U32("post_csc,saturation",
2249 					    s->conn_state.disp_info->csc_info.saturation);
2250 				FDT_SET_U32("post_csc,contrast",
2251 					    s->conn_state.disp_info->csc_info.contrast);
2252 				FDT_SET_U32("post_csc,brightness",
2253 					    s->conn_state.disp_info->csc_info.brightness);
2254 				FDT_SET_U32("post_csc,r_gain",
2255 					    s->conn_state.disp_info->csc_info.r_gain);
2256 				FDT_SET_U32("post_csc,g_gain",
2257 					    s->conn_state.disp_info->csc_info.g_gain);
2258 				FDT_SET_U32("post_csc,b_gain",
2259 					    s->conn_state.disp_info->csc_info.b_gain);
2260 				FDT_SET_U32("post_csc,r_offset",
2261 					    s->conn_state.disp_info->csc_info.r_offset);
2262 				FDT_SET_U32("post_csc,g_offset",
2263 					    s->conn_state.disp_info->csc_info.g_offset);
2264 				FDT_SET_U32("post_csc,b_offset",
2265 					    s->conn_state.disp_info->csc_info.b_offset);
2266 				FDT_SET_U32("post_csc,csc_enable",
2267 					    s->conn_state.disp_info->csc_info.csc_enable);
2268 			}
2269 		}
2270 
2271 		if (s->conn_state.disp_info->cubic_lut_data.size &&
2272 		    CONFIG_ROCKCHIP_CUBIC_LUT_SIZE)
2273 			FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id));
2274 
2275 #undef FDT_SET_U32
2276 	}
2277 }
2278 
2279 int rockchip_display_bind(struct udevice *dev)
2280 {
2281 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
2282 
2283 	plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE;
2284 
2285 	return 0;
2286 }
2287 
2288 static const struct udevice_id rockchip_display_ids[] = {
2289 	{ .compatible = "rockchip,display-subsystem" },
2290 	{ }
2291 };
2292 
2293 U_BOOT_DRIVER(rockchip_display) = {
2294 	.name	= "rockchip_display",
2295 	.id	= UCLASS_VIDEO,
2296 	.of_match = rockchip_display_ids,
2297 	.bind	= rockchip_display_bind,
2298 	.probe	= rockchip_display_probe,
2299 };
2300 
2301 static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc,
2302 			char *const argv[])
2303 {
2304 	if (argc != 1)
2305 		return CMD_RET_USAGE;
2306 
2307 	rockchip_show_logo();
2308 
2309 	return 0;
2310 }
2311 
2312 static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc,
2313 				char *const argv[])
2314 {
2315 	if (argc != 2)
2316 		return CMD_RET_USAGE;
2317 
2318 	rockchip_show_bmp(argv[1]);
2319 
2320 	return 0;
2321 }
2322 
2323 static int do_rockchip_vop_dump(cmd_tbl_t *cmdtp, int flag, int argc,
2324 				char *const argv[])
2325 {
2326 	int ret;
2327 
2328 	if (argc < 1 || argc > 2)
2329 		return CMD_RET_USAGE;
2330 
2331 	ret = rockchip_vop_dump(argv[1]);
2332 
2333 	return ret;
2334 }
2335 
2336 U_BOOT_CMD(
2337 	rockchip_show_logo, 1, 1, do_rockchip_logo_show,
2338 	"load and display log from resource partition",
2339 	NULL
2340 );
2341 
2342 U_BOOT_CMD(
2343 	rockchip_show_bmp, 2, 1, do_rockchip_show_bmp,
2344 	"load and display bmp from resource partition",
2345 	"    <bmp_name>"
2346 );
2347 
2348 U_BOOT_CMD(
2349 	vop_dump, 2, 1, do_rockchip_vop_dump,
2350 	"dump vop regs",
2351 	" [a/all]"
2352 );
2353