| 4a271cb1 | 14-Sep-2013 |
Julius Werner <jwerner@chromium.org> |
exynos: usb: Switch USB VBUS GPIOs to be device tree configured
Some Exynos boards, such as the SMDK5250, control USB port power through
a GPIO pin. For now this had been hardcoded in the exynos5-dt
exynos: usb: Switch USB VBUS GPIOs to be device tree configured
Some Exynos boards, such as the SMDK5250, control USB port power through
a GPIO pin. For now this had been hardcoded in the exynos5-dt board
file, but not all boards use the same pin, requiring local changes to
support different boards.
This patch moves the GPIO initialization into the USB host controller
drivers which they belong to, and uses the samsung,vbus-gpio parameter
in the device tree to configure it.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Marek Vasut <marex@denx.de>
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| 5853e133 | 14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
USB: xHCI: Add stack support for xHCI
This adds stack layer for eXtensible Host Controller Interface
which facilitates use of USB 3.0 in host mode.
Adapting xHCI host controller driver in linux-ker
USB: xHCI: Add stack support for xHCI
This adds stack layer for eXtensible Host Controller Interface
which facilitates use of USB 3.0 in host mode.
Adapting xHCI host controller driver in linux-kernel
by Sarah Sharp to needs in u-boot.
Initial porting from Linux kernel version 3.4, with following
top commit history of drivers/usb/host/xhci* :
cf84055 xHCI: Cleanup isoc transfer ring when TD length mismatch found
This adds the basic xHCI host controller driver with bare minimum
features:
- Control/Bulk transfer support has been added with required
infrastructure for necessary xHC data structures.
- Stream protocol hasn't been supported yet.
- No support for quirky devices has been added.
Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Dan Murphy <dmurphy@ti.com>
Cc: Marek Vasut <marex@denx.de>
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| c3904128 | 26-Jul-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
usb: ehci-mx5: Remove unneeded write to cscmr1 register
Currently we have the following behavior in ehci_hcd_init()
- Read csmr1 register, clear bit 26 and then set bit 26.
However a little bit la
usb: ehci-mx5: Remove unneeded write to cscmr1 register
Currently we have the following behavior in ehci_hcd_init()
- Read csmr1 register, clear bit 26 and then set bit 26.
However a little bit later we call set_usb_phy_clk() which clears bit 26, so
let's get rid of the unnecessary code.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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| 120503f3 | 01-Aug-2013 |
Dan Murphy <dmurphy@ti.com> |
ARM: OMAP: USB: Fix linker error when ULPI is not defined
Fix the linker error for missing ulpi_reset when ulpi is not defined
in the board config.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Acked-
ARM: OMAP: USB: Fix linker error when ULPI is not defined
Fix the linker error for missing ulpi_reset when ulpi is not defined
in the board config.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
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| 8bc36036 | 29-Jul-2013 |
Nikita Kiryanov <nikita@compulab.co.il> |
ehci-hcd: fix memory leak in lowlevel init
usb_lowlevel_init() allocates a new periodic_list each time it is invoked,
without freeing the original list. Since it is initialized later on in the code,
ehci-hcd: fix memory leak in lowlevel init
usb_lowlevel_init() allocates a new periodic_list each time it is invoked,
without freeing the original list. Since it is initialized later on in the code,
just reuse the first-allocated list in future invocations of usb_lowlevel_init.
Cc: Marek Vasut <marex@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
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| bb1f327d | 22-Jul-2013 |
Roger Quadros <rogerq@ti.com> |
usb: ehci-omap: Don't softreset USB High-speed Host (UHH) Module
Fixes NFS root problems with Beagle (3530 ES1.0) when used with
external USB-ethernet adapter and "USB start" command used within
u-b
usb: ehci-omap: Don't softreset USB High-speed Host (UHH) Module
Fixes NFS root problems with Beagle (3530 ES1.0) when used with
external USB-ethernet adapter and "USB start" command used within
u-boot.
Soft resetting the UHH module causes instability issues on
all OMAPs so we just avoid it.
See OMAP36xx Errata
i571: USB host EHCI may stall when entering smart-standby mode
i660: USBHOST Configured In Smart-Idle Can Lead To a Deadlock
On OMAP4/5, soft-resetting the UHH module can put it into
Smart-Idle mode and lead to a deadlock.
On OMAP3 this doesn't seem to be the case but still instabilities
are observed on beagle (3530 ES1.0) if soft-reset is used.
e.g. NFS root failures with Linux kernel.
Signed-off-by: Roger Quadros <rogerq@ti.com>
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| d3e07478 | 24-May-2013 |
Stephen Warren <swarren@nvidia.com> |
usb: ehci: add missing cache managment
Commit 8f62ca6 "usb: ehci: Support interrupt transfers via periodic list"
didn't include any cache management in the new interrupt transfer path.
It also added
usb: ehci: add missing cache managment
Commit 8f62ca6 "usb: ehci: Support interrupt transfers via periodic list"
didn't include any cache management in the new interrupt transfer path.
It also added an extra write to or_asynclistaddr in usb_lowlevel_init(),
without having flushed out the data there.
Add the missing cache management calls, so that the code works again.
This allows the USB keyboard on Tegra's Seaboard/Springbank boards to
work.
Cc: Patrick Georgi <patrick@georgi-clan.de>
Cc: Vincent Palatin <vpalatin@chromium.org>
Cc: Julius Werner <jwerner@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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| e82a316d | 15-May-2013 |
Kuo-Jung Su <dantesu@faraday-tech.com> |
usb: ehci: add Faraday USB 2.0 EHCI support
This patch adds support to both Faraday FUSBH200 and FOTG210,
the differences between Faraday EHCI and standard EHCI are
listed bellow:
1. The PORTSC sta
usb: ehci: add Faraday USB 2.0 EHCI support
This patch adds support to both Faraday FUSBH200 and FOTG210,
the differences between Faraday EHCI and standard EHCI are
listed bellow:
1. The PORTSC starts at 0x30 instead of 0x44.
2. The CONFIGFLAG(0x40) is not only un-implemented, and
also has its address space removed.
3. Faraday EHCI is a TDI design, but it doesn't
compatible with the general TDI implementation
found at both U-Boot and Linux.
4. The ISOC descriptors differ from standard EHCI in
several ways. But since U-boot doesn't support ISOC,
we don't have to worry about that.
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Marek Vasut <marex@denx.de>
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| 1dde1423 | 15-May-2013 |
Kuo-Jung Su <dantesu@faraday-tech.com> |
usb: ehci: add weak-aliased function for PORTSC
There is at least one non-EHCI compliant controller (i.e. Faraday EHCI)
not only leave RESERVED and CONFIGFLAG registers un-implemented
but also has t
usb: ehci: add weak-aliased function for PORTSC
There is at least one non-EHCI compliant controller (i.e. Faraday EHCI)
not only leave RESERVED and CONFIGFLAG registers un-implemented
but also has their address spaces removed.
As an result, the PORTSC register of Faraday EHCI always
starts from 0x30 instead of 0x44 in standard EHCI.
So that we'll need a weak-aliased function for abstraction.
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Marek Vasut <marex@denx.de>
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| 9c6a9d7c | 15-May-2013 |
Kuo-Jung Su <dantesu@faraday-tech.com> |
usb: ehci: prevent bad PORTSC register access
1. The 'index' of ehci_submit_root() is not always > 0.
e.g.
While it gets invoked from usb_get_descriptor(),
the 'index' is always a '0'. (Se
usb: ehci: prevent bad PORTSC register access
1. The 'index' of ehci_submit_root() is not always > 0.
e.g.
While it gets invoked from usb_get_descriptor(),
the 'index' is always a '0'. (See ch.9 of USB2.0)
2. The PORTSC register is not always required, and thus it
should only report a port error when necessary.
It would cause a port scan failure if the ehci_submit_root()
always gets terminated by a port error.
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Marek Vasut <marex@denx.de>
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