phy: rockchip: naneng-combphy: Set clamp for rv1126b usb3

The RV1126B USB3.0 PHY clamp default value is 1'b0 which
means that clamp enable. This patch sets clamp value to
1'b1 for USB3.0 function.

phy: rockchip: naneng-combphy: Set clamp for rv1126b usb3

The RV1126B USB3.0 PHY clamp default value is 1'b0 which
means that clamp enable. This patch sets clamp value to
1'b1 for USB3.0 function.

Sync from Rockchip kernel develop-6.1-fpga branch, refer to
commit: "8dd495374585" (phy: rockchip: naneng-combphy: Set clamp for rv1126b usb3)

Change-Id: I4c3d635f2cf194dc6140655c74db1efc809bbfd3
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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phy: rockchip: naneng-combphy: add support for rv1126b usb3

Sync from Rockchip kernel develop-6.1-fpga branch, refer to
commit: "45ff333f6ae4" (phy: rockchip: naneng-combphy: Add support for rv1126b

phy: rockchip: naneng-combphy: add support for rv1126b usb3

Sync from Rockchip kernel develop-6.1-fpga branch, refer to
commit: "45ff333f6ae4" (phy: rockchip: naneng-combphy: Add support for rv1126b usb3)

Change-Id: I937f3212b33e8a74492769443c85bd96bb399dd2
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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phy: rockchip: inno-usb2: add usb2 phy support for rv1126b

Sync from Rockchip kernel develop-6.1-fpga branch, refer to
commit: "f91731cf2eb3" (phy: rockchip: inno-usb2: Add usb2 phy support for rv11

phy: rockchip: inno-usb2: add usb2 phy support for rv1126b

Sync from Rockchip kernel develop-6.1-fpga branch, refer to
commit: "f91731cf2eb3" (phy: rockchip: inno-usb2: Add usb2 phy support for rv1126b)

Change-Id: I6a876ba1f782427ef041d6f9b27bad9ceba75247
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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phy: rockchip: naneng-combphy: rk3562 support rockchip,ext-refclk

Change-Id: I01bd12c64a2d345b377322eaa4f3a7d7af108ddc
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

phy: samsung-hdptx: add support for RBR and HBR pe/vs configurations in DP mode

For RK3588/RK3576, eDP IP can support not only eDP v1.3 but also
DP v1.2.

According to the SI test result, the new RB

phy: samsung-hdptx: add support for RBR and HBR pe/vs configurations in DP mode

For RK3588/RK3576, eDP IP can support not only eDP v1.3 but also
DP v1.2.

According to the SI test result, the new RBR and HBR pe/vs
configurations can better meet the DP v1.2 signal specification
requirements.

Change-Id: Ie7c8e6a36b1c68d3fc7dbb78aff49460df6241a0
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>

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phy: rockchip: usbdp: fix phy device mismatch

Pass the PHY physical address to ensure that the correct PHY device
associated with the USB download controller can be found.

Fixes: 9a60974db526 ("phy

phy: rockchip: usbdp: fix phy device mismatch

Pass the PHY physical address to ensure that the correct PHY device
associated with the USB download controller can be found.

Fixes: 9a60974db526 ("phy: rockchip: usbdp: Fix usb3 phy init for rockusb")
Change-Id: Ic10a9ae570e3831e7b7acbc116d2a20dee51e920
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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phy: rockchip-inno-usb2: Add usb2 phy support for rv1103b

Change-Id: I88edf35ccac836e8445d298c3b08420c47d10987
Signed-off-by: William Wu <william.wu@rock-chips.com>

phy: rockchip: naneng-combphy: Fix force detect out

Change-Id: I8d4b13795d7f15bb0af42544b085fd75cdea67f7
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

phy: rockchip: inno-usb2: add phy tuning for px30

This adds px30 phy tuning to open pre-emphasize in non-chirp
state for both otg and host port.

Change-Id: If1a450c2fff4da49d7ebc1894c735e0b3b237b54

phy: rockchip: inno-usb2: add phy tuning for px30

This adds px30 phy tuning to open pre-emphasize in non-chirp
state for both otg and host port.

Change-Id: If1a450c2fff4da49d7ebc1894c735e0b3b237b54
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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phy: rockchip: inno-usb2: add a new compatible for px30

This adds a new udevice compatible for PX30 SoCs.

Change-Id: I830e322ecbfa24f0f6fec616a25d7ded322e3ec6
Signed-off-by: Frank Wang <frank.wang@

phy: rockchip: inno-usb2: add a new compatible for px30

This adds a new udevice compatible for PX30 SoCs.

Change-Id: I830e322ecbfa24f0f6fec616a25d7ded322e3ec6
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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phy: rockchip-inno-usb2: Support vbus detection via gpio for rk3506

Change-Id: I304a5fae8fa97f479bffd438e2d419ab17e96e12
Signed-off-by: William Wu <william.wu@rock-chips.com>

phy: rockchip-inno-usb2: support u2phy tuning for rk3506

Sync from kernel-6.1 commit 61b5bd9354ed ("phy: rockchip: inno-usb2:
support usb2 phy tuning for rk3506").

Change-Id: Ie2a71dc74c17bb34c2a61

phy: rockchip-inno-usb2: support u2phy tuning for rk3506

Sync from kernel-6.1 commit 61b5bd9354ed ("phy: rockchip: inno-usb2:
support usb2 phy tuning for rk3506").

Change-Id: Ie2a71dc74c17bb34c2a619c25c5a35499a6835b5
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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phy: rockchip-inno-usb2: add more helper functions

This adds clear/set/update register bits helper functions to make
the code more simpler.

Change-Id: I7040cc5ae7122162ef027313ab936987faff2bd1
Sign

phy: rockchip-inno-usb2: add more helper functions

This adds clear/set/update register bits helper functions to make
the code more simpler.

Change-Id: I7040cc5ae7122162ef027313ab936987faff2bd1
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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phy: rockchip: naneng-combphy: fix phy device mismatch

The uclass_get_device_by_driver() API always finds the first device in
DT probed, however, it may not the PHY that associate with USB download

phy: rockchip: naneng-combphy: fix phy device mismatch

The uclass_get_device_by_driver() API always finds the first device in
DT probed, however, it may not the PHY that associate with USB download
controller, if mismathed, the below errors would be printed in terminal.

download key pressed... entering download mode...
RKUSB: LUN 0, dev 0, hwpart 0, sector 0x0, count 0x1d5a000
failed to enable ep0out
failed to start <NULL>: -110
g_dnl_register: failed!, error: -110
g_dnl_register failedEnter rockusb failed, fallback to bootrom...

So passed the PHY physical address and loop to match the correct PHY
device to fix it.

Fixes: 14d5da7dccb8 ("phy: rockchip: naneng-combphy: Add usb3 phy init for rockusb")
Change-Id: Ib65a104008d6302dca09cc081a3457b3d55e0323
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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phy: samsung-hdptx: modify pe/vs/pll configs for R216/R243/R324/R432

According to the SI report, modify pe/vs configs of new
link rate R216/R243/R324/R432, which are configured to
nearby RBR/HBR/HBR

phy: samsung-hdptx: modify pe/vs/pll configs for R216/R243/R324/R432

According to the SI report, modify pe/vs configs of new
link rate R216/R243/R324/R432, which are configured to
nearby RBR/HBR/HBR2 configs in the past.

In addition, modify the pll configs to pass SSC test.

Change-Id: I4a576409661ccf121398366933a9893ee4aa3c0c
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>

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phy: rockchip-inno-usb2: add usb2 phy support for rk3506

rk3506 has two otg ports and uses one USB PHY with two ports.
The OTG0 port support BC1.2 detect.

This sync from rk/kernel/develop-6.1 commi

phy: rockchip-inno-usb2: add usb2 phy support for rk3506

rk3506 has two otg ports and uses one USB PHY with two ports.
The OTG0 port support BC1.2 detect.

This sync from rk/kernel/develop-6.1 commit

Change-Id: Ie6e11c1a58b97d52fbf74b8bfd11482362600e03
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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phy: samsung-hdptx: add more pe/vs configs to pass optional SI test items

According to the SI report, SI test items in TP3, which
are not applicable for eDP v1.3 but necessary for eDP
v1.4, can not

phy: samsung-hdptx: add more pe/vs configs to pass optional SI test items

According to the SI report, SI test items in TP3, which
are not applicable for eDP v1.3 but necessary for eDP
v1.4, can not meet signal requirements.

Add tx_drv_pre_lvl_ctrl, ana_tx_jeq_en, tx_jeq_even_ctrl
and tx_jeq_odd_ctrl to pass above SI test items.

Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I5531e3098e89e7141f68de0be0ed76779e2e9ef6

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UPSTREAM: phy: Track power-on and init counts in uclass

On boards using the RK3399 SoC, the USB OHCI and EHCI controllers share
the same PHY device instance. While these controllers are being stoppe

UPSTREAM: phy: Track power-on and init counts in uclass

On boards using the RK3399 SoC, the USB OHCI and EHCI controllers share
the same PHY device instance. While these controllers are being stopped
they both attempt to power-off and deinitialize it, but trying to
power-off the deinitialized PHY device results in a hang. This usually
happens just before booting an OS, and can be explicitly triggered by
running "usb start; usb stop" in the U-Boot shell.

Implement a uclass-wide counting mechanism for PHY initialization and
power state change requests, so that we don't power-off/deinitialize a
PHY instance until all of its users want it done. The Allwinner A10 USB
PHY driver does this counting in-driver, remove those parts in favour of
this in-uclass implementation.

The sandbox PHY operations test needs some changes since the uclass will
no longer call into the drivers for actions matching its tracked state
(e.g. powering-off a powered-off PHY). Update that test, and add a new
one which simulates multiple users of a single PHY.

The major complication here is that PHY handles aren't deduplicated per
instance, so the obvious idea of putting the counts in the PHY handles
don't immediately work. It seems possible to bind a child udevice per
PHY instance to the PHY provider and deduplicate the handles in each
child's uclass-private areas, like in the CLK framework. An alternative
approach could be to use those bound child udevices themselves as the
PHY handles. Instead, to avoid the architectural changes those would
require, this patch solves things by dynamically allocating a list of
structs (one per instance) in the provider's uclass-private area.

Change-Id: If25109d441b4d93638b450f9137eccd159935aa8
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com> - Rock960
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 226fce6108fe364e35f3eb9a84ff1a7ec93727ce)

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phy: samsung-hdptx: add support for rate R216/R243/R324/R432

R216/R243/R324/R432 are the new recommended link rates in
eDP v1.4, which may be read from DPCD SUPPORTED_LINK_RATES
(0x00010h through 0x

phy: samsung-hdptx: add support for rate R216/R243/R324/R432

R216/R243/R324/R432 are the new recommended link rates in
eDP v1.4, which may be read from DPCD SUPPORTED_LINK_RATES
(0x00010h through 0x0001fh). And set the link rate by DPCD
LINK_BW_SET(0x00100h).

Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I091ec2192fc8075420ea5d7454f9c9e0af561891

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phy: rockchip: usbdp: update phy parameters for SI test

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: Ib8fb562c882de985a0a875d3c899211205a323de

phy: rockchip: naneng-combphy: Support disable usb3 port

The usb3 host controller support one usb3 port and one
usb2 port, and these two ports can work independently.

+------

phy: rockchip: naneng-combphy: Support disable usb3 port

The usb3 host controller support one usb3 port and one
usb2 port, and these two ports can work independently.

+------+ +----------+
+----------------+ | USB2 |---->| USB2 PHY |
| |---->| PORT | +----------+
| USB3 HOST CTRL | +------+
| |---->| USB3 | +----------+
+----------------+ | PROT |---->| COMBO PHY|
+------+ +----------+

This patch support usb3 host to disable usb3 port
and only support usb2 port.

In addition, for RK3576, it use pipe_phymode to select
MMU for PCIe/SATA/USB controllers, and the default
pipe_phymode value is 2'b00 which used for PCIe mode.
So it needs to set pipe_phymode for usb even if only
use usb2 port.

Change-Id: I26b8b5445cf153719944442195421e10e88c269b
Signed-off-by: William Wu <william.wu@rock-chips.com>

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phy: rockchip: naneng-combphy: Support RK3576

Change-Id: Ib7f895311a085f928f927f8f77c3a057b9f175c5
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

phy: rockchip: naneng-combphy: Build depends on platform config

When build for RK3588 with CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY enabled:

size drivers/phy/phy-rockchip-naneng-combphy.o

before:
te

phy: rockchip: naneng-combphy: Build depends on platform config

When build for RK3588 with CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY enabled:

size drivers/phy/phy-rockchip-naneng-combphy.o

before:
text data bss dec hex filename
6539 120 0 6659 1a03 drivers/phy/phy-rockchip-naneng-combphy.o

after:
text data bss dec hex filename
3217 120 0 3337 d09 drivers/phy/phy-rockchip-naneng-combphy.o

Change-Id: I6d4bf8168bd2b89750def8491ebfeb135373f763
Signed-off-by: William Wu <william.wu@rock-chips.com>

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phy: rockchip: usbdp: Build depends on platform config

When build for RK3576 with CONFIG_PHY_ROCKCHIP_USBDP enabled:

size drivers/phy/phy-rockchip-usbdp.o

before:
text data bss dec

phy: rockchip: usbdp: Build depends on platform config

When build for RK3576 with CONFIG_PHY_ROCKCHIP_USBDP enabled:

size drivers/phy/phy-rockchip-usbdp.o

before:
text data bss dec hex filename
8592 360 0 8952 22f8 drivers/phy/phy-rockchip-usbdp.o

after:
text data bss dec hex filename
8374 360 0 8734 221e drivers/phy/phy-rockchip-usbdp.o

Change-Id: Id5b53f9133247e868a93b952d4b0ea8441953a27
Signed-off-by: William Wu <william.wu@rock-chips.com>

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phy: rockchip: usbdp: add rk3576 device match data

Sync from Rockchip Kernel-6.1 branch, commit "3de053bb9adf"
(phy: rockchip: usbdp: add rk3576 device match data)

Signed-off-by: Frank Wang <frank.

phy: rockchip: usbdp: add rk3576 device match data

Sync from Rockchip Kernel-6.1 branch, commit "3de053bb9adf"
(phy: rockchip: usbdp: add rk3576 device match data)

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: I774c03a2d5fb164315f4b43e069096434e476cef

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