| 91ec615e | 29-Jan-2016 |
Paul Burton <paul.burton@imgtec.com> |
malta: Use I/O accessors for SuperI/O controller
Rather than passing the I/O port base address to the Super I/O code, switch it to using outb such that it makes use of the I/O port base address auto
malta: Use I/O accessors for SuperI/O controller
Rather than passing the I/O port base address to the Super I/O code, switch it to using outb such that it makes use of the I/O port base address automatically.
Drop the extern keyword to satisfy checkpatch whilst here.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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| 28c8c3d4 | 29-Jan-2015 |
Paul Burton <paul.burton@imgtec.com> |
malta: delay after reset
Reset isn't instant, so delay to give it a chance. Otherwise we go on to print a failure message before resetting anyway.
Signed-off-by: Paul Burton <paul.burton@imgtec.com
malta: delay after reset
Reset isn't instant, so delay to give it a chance. Otherwise we go on to print a failure message before resetting anyway.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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| 024fba54 | 08-Nov-2013 |
Paul Burton <paul.burton@imgtec.com> |
malta: add script & instructions to flash U-boot
This patch adds a script which may be used with MIPS Navigator Console and a MIPS Nagivator Probe in order to flash U-boot to a MIPS Malta developmen
malta: add script & instructions to flash U-boot
This patch adds a script which may be used with MIPS Navigator Console and a MIPS Nagivator Probe in order to flash U-boot to a MIPS Malta development board.
Please see the newly added doc/README.malta for usage instructions.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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| 81f98bbd | 08-Nov-2013 |
Paul Burton <paul.burton@imgtec.com> |
malta: setup PIIX4 interrupt route
Without setting up the PIRQ[A:D] interrupt routes, PCI interrupts will be left disabled. Linux does not set up this routing but relies upon it having been set up b
malta: setup PIIX4 interrupt route
Without setting up the PIRQ[A:D] interrupt routes, PCI interrupts will be left disabled. Linux does not set up this routing but relies upon it having been set up by the bootloader, reading back the IRQ lines which the PIRQ[A:D] signals have been routed to.
This patch routes PIRQA & PIRQB to IRQ 10, and PIRQC & PIRQD to IRQ 11. This matches the setup used by YAMON.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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| 3ced12a0 | 08-Nov-2013 |
Paul Burton <paul.burton@imgtec.com> |
malta: enable RTC support
This is actually required in order for a Linux kernel to boot successfully on a physical Malta board. Without enabling the RTC, a Malta Linux kernel will get stuck in its e
malta: enable RTC support
This is actually required in order for a Linux kernel to boot successfully on a physical Malta board. Without enabling the RTC, a Malta Linux kernel will get stuck in its estimate_frequencies function on boot.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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| e174bd74 | 08-Nov-2013 |
Paul Burton <paul.burton@imgtec.com> |
malta: disable L2 caches
Malta boards may be used with cores which support L2 caches, however U-boot does not yet support L2 cache for MIPS. Thus for the moment we'll disable L2 caches by setting th
malta: disable L2 caches
Malta boards may be used with cores which support L2 caches, however U-boot does not yet support L2 cache for MIPS. Thus for the moment we'll disable L2 caches by setting the L2B bit in Config2. This is specific to MTI/Imagination MIPS cores which is why this is done for the Malta board rather than generically.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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