1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <linux/compiler.h> 15 #include <version.h> 16 #include <console.h> 17 #include <environment.h> 18 #include <dm.h> 19 #include <fdtdec.h> 20 #include <fs.h> 21 #if defined(CONFIG_CMD_IDE) 22 #include <ide.h> 23 #endif 24 #include <i2c.h> 25 #include <initcall.h> 26 #include <logbuff.h> 27 #include <malloc.h> 28 #include <mapmem.h> 29 30 /* TODO: Can we move these into arch/ headers? */ 31 #ifdef CONFIG_8xx 32 #include <mpc8xx.h> 33 #endif 34 #ifdef CONFIG_5xx 35 #include <mpc5xx.h> 36 #endif 37 #ifdef CONFIG_MPC5xxx 38 #include <mpc5xxx.h> 39 #endif 40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 41 #include <asm/mp.h> 42 #endif 43 44 #include <os.h> 45 #include <post.h> 46 #include <spi.h> 47 #include <status_led.h> 48 #include <timer.h> 49 #include <trace.h> 50 #include <video.h> 51 #include <watchdog.h> 52 #include <linux/errno.h> 53 #include <asm/io.h> 54 #include <asm/sections.h> 55 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 56 #include <asm/init_helpers.h> 57 #endif 58 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA) 59 #include <asm/relocate.h> 60 #endif 61 #include <dm/root.h> 62 #include <linux/compiler.h> 63 64 /* 65 * Pointer to initial global data area 66 * 67 * Here we initialize it if needed. 68 */ 69 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 70 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 71 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 72 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 73 #else 74 DECLARE_GLOBAL_DATA_PTR; 75 #endif 76 77 /* 78 * TODO(sjg@chromium.org): IMO this code should be 79 * refactored to a single function, something like: 80 * 81 * void led_set_state(enum led_colour_t colour, int on); 82 */ 83 /************************************************************************ 84 * Coloured LED functionality 85 ************************************************************************ 86 * May be supplied by boards if desired 87 */ 88 __weak void coloured_LED_init(void) {} 89 __weak void red_led_on(void) {} 90 __weak void red_led_off(void) {} 91 __weak void green_led_on(void) {} 92 __weak void green_led_off(void) {} 93 __weak void yellow_led_on(void) {} 94 __weak void yellow_led_off(void) {} 95 __weak void blue_led_on(void) {} 96 __weak void blue_led_off(void) {} 97 98 /* 99 * Why is gd allocated a register? Prior to reloc it might be better to 100 * just pass it around to each function in this file? 101 * 102 * After reloc one could argue that it is hardly used and doesn't need 103 * to be in a register. Or if it is it should perhaps hold pointers to all 104 * global data for all modules, so that post-reloc we can avoid the massive 105 * literal pool we get on ARM. Or perhaps just encourage each module to use 106 * a structure... 107 */ 108 109 /* 110 * Could the CONFIG_SPL_BUILD infection become a flag in gd? 111 */ 112 113 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 114 static int init_func_watchdog_init(void) 115 { 116 # if defined(CONFIG_HW_WATCHDOG) && \ 117 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 118 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \ 119 defined(CONFIG_DESIGNWARE_WATCHDOG) || \ 120 defined(CONFIG_IMX_WATCHDOG)) 121 hw_watchdog_init(); 122 puts(" Watchdog enabled\n"); 123 # endif 124 WATCHDOG_RESET(); 125 126 return 0; 127 } 128 129 int init_func_watchdog_reset(void) 130 { 131 WATCHDOG_RESET(); 132 133 return 0; 134 } 135 #endif /* CONFIG_WATCHDOG */ 136 137 __weak void board_add_ram_info(int use_default) 138 { 139 /* please define platform specific board_add_ram_info() */ 140 } 141 142 static int init_baud_rate(void) 143 { 144 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 145 return 0; 146 } 147 148 static int display_text_info(void) 149 { 150 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP) 151 ulong bss_start, bss_end, text_base; 152 153 bss_start = (ulong)&__bss_start; 154 bss_end = (ulong)&__bss_end; 155 156 #ifdef CONFIG_SYS_TEXT_BASE 157 text_base = CONFIG_SYS_TEXT_BASE; 158 #else 159 text_base = CONFIG_SYS_MONITOR_BASE; 160 #endif 161 162 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", 163 text_base, bss_start, bss_end); 164 #endif 165 166 #ifdef CONFIG_USE_IRQ 167 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 168 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 169 #endif 170 171 return 0; 172 } 173 174 static int announce_dram_init(void) 175 { 176 puts("DRAM: "); 177 return 0; 178 } 179 180 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 181 static int init_func_ram(void) 182 { 183 return initdram(); 184 } 185 #endif 186 187 static int show_dram_config(void) 188 { 189 unsigned long long size; 190 191 #ifdef CONFIG_NR_DRAM_BANKS 192 int i; 193 194 debug("\nRAM Configuration:\n"); 195 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 196 size += gd->bd->bi_dram[i].size; 197 debug("Bank #%d: %llx ", i, 198 (unsigned long long)(gd->bd->bi_dram[i].start)); 199 #ifdef DEBUG 200 print_size(gd->bd->bi_dram[i].size, "\n"); 201 #endif 202 } 203 debug("\nDRAM: "); 204 #else 205 size = gd->ram_size; 206 #endif 207 208 print_size(size, ""); 209 board_add_ram_info(0); 210 putc('\n'); 211 212 return 0; 213 } 214 215 __weak void dram_init_banksize(void) 216 { 217 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 218 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 219 gd->bd->bi_dram[0].size = get_effective_memsize(); 220 #endif 221 } 222 223 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 224 static int init_func_i2c(void) 225 { 226 puts("I2C: "); 227 #ifdef CONFIG_SYS_I2C 228 i2c_init_all(); 229 #else 230 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 231 #endif 232 puts("ready\n"); 233 return 0; 234 } 235 #endif 236 237 #if defined(CONFIG_HARD_SPI) 238 static int init_func_spi(void) 239 { 240 puts("SPI: "); 241 spi_init(); 242 puts("ready\n"); 243 return 0; 244 } 245 #endif 246 247 __maybe_unused 248 static int zero_global_data(void) 249 { 250 memset((void *)gd, '\0', sizeof(gd_t)); 251 252 return 0; 253 } 254 255 static int setup_mon_len(void) 256 { 257 #if defined(__ARM__) || defined(__MICROBLAZE__) 258 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 259 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP) 260 gd->mon_len = (ulong)&_end - (ulong)_init; 261 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA) 262 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 263 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) 264 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start); 265 #elif defined(CONFIG_SYS_MONITOR_BASE) 266 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 267 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 268 #endif 269 return 0; 270 } 271 272 __weak int arch_cpu_init(void) 273 { 274 return 0; 275 } 276 277 __weak int mach_cpu_init(void) 278 { 279 return 0; 280 } 281 282 /* Get the top of usable RAM */ 283 __weak ulong board_get_usable_ram_top(ulong total_size) 284 { 285 #ifdef CONFIG_SYS_SDRAM_BASE 286 /* 287 * Detect whether we have so much RAM that it goes past the end of our 288 * 32-bit address space. If so, clip the usable RAM so it doesn't. 289 */ 290 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) 291 /* 292 * Will wrap back to top of 32-bit space when reservations 293 * are made. 294 */ 295 return 0; 296 #endif 297 return gd->ram_top; 298 } 299 300 static int setup_dest_addr(void) 301 { 302 debug("Monitor len: %08lX\n", gd->mon_len); 303 /* 304 * Ram is setup, size stored in gd !! 305 */ 306 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 307 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 308 /* 309 * Subtract specified amount of memory to hide so that it won't 310 * get "touched" at all by U-Boot. By fixing up gd->ram_size 311 * the Linux kernel should now get passed the now "corrected" 312 * memory size and won't touch it either. This should work 313 * for arch/ppc and arch/powerpc. Only Linux board ports in 314 * arch/powerpc with bootwrapper support, that recalculate the 315 * memory size from the SDRAM controller setup will have to 316 * get fixed. 317 */ 318 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 319 #endif 320 #ifdef CONFIG_SYS_SDRAM_BASE 321 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 322 #endif 323 gd->ram_top += get_effective_memsize(); 324 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 325 gd->relocaddr = gd->ram_top; 326 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 327 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 328 /* 329 * We need to make sure the location we intend to put secondary core 330 * boot code is reserved and not used by any part of u-boot 331 */ 332 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 333 gd->relocaddr = determine_mp_bootpg(NULL); 334 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 335 } 336 #endif 337 return 0; 338 } 339 340 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 341 static int reserve_logbuffer(void) 342 { 343 /* reserve kernel log buffer */ 344 gd->relocaddr -= LOGBUFF_RESERVE; 345 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 346 gd->relocaddr); 347 return 0; 348 } 349 #endif 350 351 #ifdef CONFIG_PRAM 352 /* reserve protected RAM */ 353 static int reserve_pram(void) 354 { 355 ulong reg; 356 357 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 358 gd->relocaddr -= (reg << 10); /* size is in kB */ 359 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 360 gd->relocaddr); 361 return 0; 362 } 363 #endif /* CONFIG_PRAM */ 364 365 /* Round memory pointer down to next 4 kB limit */ 366 static int reserve_round_4k(void) 367 { 368 gd->relocaddr &= ~(4096 - 1); 369 return 0; 370 } 371 372 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 373 defined(CONFIG_ARM) 374 static int reserve_mmu(void) 375 { 376 /* reserve TLB table */ 377 gd->arch.tlb_size = PGTABLE_SIZE; 378 gd->relocaddr -= gd->arch.tlb_size; 379 380 /* round down to next 64 kB limit */ 381 gd->relocaddr &= ~(0x10000 - 1); 382 383 gd->arch.tlb_addr = gd->relocaddr; 384 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 385 gd->arch.tlb_addr + gd->arch.tlb_size); 386 387 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE 388 /* 389 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten 390 * with location within secure ram. 391 */ 392 gd->arch.tlb_allocated = gd->arch.tlb_addr; 393 #endif 394 395 return 0; 396 } 397 #endif 398 399 #ifdef CONFIG_DM_VIDEO 400 static int reserve_video(void) 401 { 402 ulong addr; 403 int ret; 404 405 addr = gd->relocaddr; 406 ret = video_reserve(&addr); 407 if (ret) 408 return ret; 409 gd->relocaddr = addr; 410 411 return 0; 412 } 413 #else 414 415 # ifdef CONFIG_LCD 416 static int reserve_lcd(void) 417 { 418 # ifdef CONFIG_FB_ADDR 419 gd->fb_base = CONFIG_FB_ADDR; 420 # else 421 /* reserve memory for LCD display (always full pages) */ 422 gd->relocaddr = lcd_setmem(gd->relocaddr); 423 gd->fb_base = gd->relocaddr; 424 # endif /* CONFIG_FB_ADDR */ 425 426 return 0; 427 } 428 # endif /* CONFIG_LCD */ 429 430 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 431 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 432 !defined(CONFIG_M68K) 433 static int reserve_legacy_video(void) 434 { 435 /* reserve memory for video display (always full pages) */ 436 gd->relocaddr = video_setmem(gd->relocaddr); 437 gd->fb_base = gd->relocaddr; 438 439 return 0; 440 } 441 # endif 442 #endif /* !CONFIG_DM_VIDEO */ 443 444 static int reserve_trace(void) 445 { 446 #ifdef CONFIG_TRACE 447 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 448 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 449 debug("Reserving %dk for trace data at: %08lx\n", 450 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 451 #endif 452 453 return 0; 454 } 455 456 static int reserve_uboot(void) 457 { 458 /* 459 * reserve memory for U-Boot code, data & bss 460 * round down to next 4 kB limit 461 */ 462 gd->relocaddr -= gd->mon_len; 463 gd->relocaddr &= ~(4096 - 1); 464 #ifdef CONFIG_E500 465 /* round down to next 64 kB limit so that IVPR stays aligned */ 466 gd->relocaddr &= ~(65536 - 1); 467 #endif 468 469 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 470 gd->relocaddr); 471 472 gd->start_addr_sp = gd->relocaddr; 473 474 return 0; 475 } 476 477 #ifndef CONFIG_SPL_BUILD 478 /* reserve memory for malloc() area */ 479 static int reserve_malloc(void) 480 { 481 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 482 debug("Reserving %dk for malloc() at: %08lx\n", 483 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 484 return 0; 485 } 486 487 /* (permanently) allocate a Board Info struct */ 488 static int reserve_board(void) 489 { 490 if (!gd->bd) { 491 gd->start_addr_sp -= sizeof(bd_t); 492 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 493 memset(gd->bd, '\0', sizeof(bd_t)); 494 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 495 sizeof(bd_t), gd->start_addr_sp); 496 } 497 return 0; 498 } 499 #endif 500 501 static int setup_machine(void) 502 { 503 #ifdef CONFIG_MACH_TYPE 504 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 505 #endif 506 return 0; 507 } 508 509 static int reserve_global_data(void) 510 { 511 gd->start_addr_sp -= sizeof(gd_t); 512 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 513 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 514 sizeof(gd_t), gd->start_addr_sp); 515 return 0; 516 } 517 518 static int reserve_fdt(void) 519 { 520 #ifndef CONFIG_OF_EMBED 521 /* 522 * If the device tree is sitting immediately above our image then we 523 * must relocate it. If it is embedded in the data section, then it 524 * will be relocated with other data. 525 */ 526 if (gd->fdt_blob) { 527 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 528 529 gd->start_addr_sp -= gd->fdt_size; 530 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 531 debug("Reserving %lu Bytes for FDT at: %08lx\n", 532 gd->fdt_size, gd->start_addr_sp); 533 } 534 #endif 535 536 return 0; 537 } 538 539 int arch_reserve_stacks(void) 540 { 541 return 0; 542 } 543 544 static int reserve_stacks(void) 545 { 546 /* make stack pointer 16-byte aligned */ 547 gd->start_addr_sp -= 16; 548 gd->start_addr_sp &= ~0xf; 549 550 /* 551 * let the architecture-specific code tailor gd->start_addr_sp and 552 * gd->irq_sp 553 */ 554 return arch_reserve_stacks(); 555 } 556 557 static int display_new_sp(void) 558 { 559 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 560 561 return 0; 562 } 563 564 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 565 defined(CONFIG_SH) 566 static int setup_board_part1(void) 567 { 568 bd_t *bd = gd->bd; 569 570 /* 571 * Save local variables to board info struct 572 */ 573 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 574 bd->bi_memsize = gd->ram_size; /* size in bytes */ 575 576 #ifdef CONFIG_SYS_SRAM_BASE 577 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 578 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 579 #endif 580 581 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ 582 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 583 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 584 #endif 585 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K) 586 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 587 #endif 588 #if defined(CONFIG_MPC83xx) 589 bd->bi_immrbar = CONFIG_SYS_IMMR; 590 #endif 591 592 return 0; 593 } 594 #endif 595 596 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 597 static int setup_board_part2(void) 598 { 599 bd_t *bd = gd->bd; 600 601 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 602 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 603 #if defined(CONFIG_CPM2) 604 bd->bi_cpmfreq = gd->arch.cpm_clk; 605 bd->bi_brgfreq = gd->arch.brg_clk; 606 bd->bi_sccfreq = gd->arch.scc_clk; 607 bd->bi_vco = gd->arch.vco_out; 608 #endif /* CONFIG_CPM2 */ 609 #if defined(CONFIG_MPC512X) 610 bd->bi_ipsfreq = gd->arch.ips_clk; 611 #endif /* CONFIG_MPC512X */ 612 #if defined(CONFIG_MPC5xxx) 613 bd->bi_ipbfreq = gd->arch.ipb_clk; 614 bd->bi_pcifreq = gd->pci_clk; 615 #endif /* CONFIG_MPC5xxx */ 616 #if defined(CONFIG_M68K) && defined(CONFIG_PCI) 617 bd->bi_pcifreq = gd->pci_clk; 618 #endif 619 #if defined(CONFIG_EXTRA_CLOCK) 620 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ 621 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ 622 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ 623 #endif 624 625 return 0; 626 } 627 #endif 628 629 #ifdef CONFIG_SYS_EXTBDINFO 630 static int setup_board_extra(void) 631 { 632 bd_t *bd = gd->bd; 633 634 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); 635 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, 636 sizeof(bd->bi_r_version)); 637 638 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ 639 bd->bi_plb_busfreq = gd->bus_clk; 640 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 641 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 642 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) 643 bd->bi_pci_busfreq = get_PCI_freq(); 644 bd->bi_opbfreq = get_OPB_freq(); 645 #elif defined(CONFIG_XILINX_405) 646 bd->bi_pci_busfreq = get_PCI_freq(); 647 #endif 648 649 return 0; 650 } 651 #endif 652 653 #ifdef CONFIG_POST 654 static int init_post(void) 655 { 656 post_bootmode_init(); 657 post_run(NULL, POST_ROM | post_bootmode_get(0)); 658 659 return 0; 660 } 661 #endif 662 663 static int setup_dram_config(void) 664 { 665 /* Ram is board specific, so move it to board code ... */ 666 dram_init_banksize(); 667 668 return 0; 669 } 670 671 static int reloc_fdt(void) 672 { 673 #ifndef CONFIG_OF_EMBED 674 if (gd->flags & GD_FLG_SKIP_RELOC) 675 return 0; 676 if (gd->new_fdt) { 677 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 678 gd->fdt_blob = gd->new_fdt; 679 } 680 #endif 681 682 return 0; 683 } 684 685 static int setup_reloc(void) 686 { 687 if (gd->flags & GD_FLG_SKIP_RELOC) { 688 debug("Skipping relocation due to flag\n"); 689 return 0; 690 } 691 692 #ifdef CONFIG_SYS_TEXT_BASE 693 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 694 #ifdef CONFIG_M68K 695 /* 696 * On all ColdFire arch cpu, monitor code starts always 697 * just after the default vector table location, so at 0x400 698 */ 699 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); 700 #endif 701 #endif 702 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 703 704 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 705 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 706 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 707 gd->start_addr_sp); 708 709 return 0; 710 } 711 712 #ifdef CONFIG_OF_BOARD_FIXUP 713 static int fix_fdt(void) 714 { 715 return board_fix_fdt((void *)gd->fdt_blob); 716 } 717 #endif 718 719 /* ARM calls relocate_code from its crt0.S */ 720 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 721 !CONFIG_IS_ENABLED(X86_64) 722 723 static int jump_to_copy(void) 724 { 725 if (gd->flags & GD_FLG_SKIP_RELOC) 726 return 0; 727 /* 728 * x86 is special, but in a nice way. It uses a trampoline which 729 * enables the dcache if possible. 730 * 731 * For now, other archs use relocate_code(), which is implemented 732 * similarly for all archs. When we do generic relocation, hopefully 733 * we can make all archs enable the dcache prior to relocation. 734 */ 735 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 736 /* 737 * SDRAM and console are now initialised. The final stack can now 738 * be setup in SDRAM. Code execution will continue in Flash, but 739 * with the stack in SDRAM and Global Data in temporary memory 740 * (CPU cache) 741 */ 742 arch_setup_gd(gd->new_gd); 743 board_init_f_r_trampoline(gd->start_addr_sp); 744 #else 745 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 746 #endif 747 748 return 0; 749 } 750 #endif 751 752 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 753 static int mark_bootstage(void) 754 { 755 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 756 757 return 0; 758 } 759 760 static int initf_console_record(void) 761 { 762 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN) 763 return console_record_init(); 764 #else 765 return 0; 766 #endif 767 } 768 769 static int initf_dm(void) 770 { 771 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN) 772 int ret; 773 774 ret = dm_init_and_scan(true); 775 if (ret) 776 return ret; 777 #endif 778 #ifdef CONFIG_TIMER_EARLY 779 ret = dm_timer_init(); 780 if (ret) 781 return ret; 782 #endif 783 784 return 0; 785 } 786 787 /* Architecture-specific memory reservation */ 788 __weak int reserve_arch(void) 789 { 790 return 0; 791 } 792 793 __weak int arch_cpu_init_dm(void) 794 { 795 return 0; 796 } 797 798 static const init_fnc_t init_sequence_f[] = { 799 setup_mon_len, 800 #ifdef CONFIG_OF_CONTROL 801 fdtdec_setup, 802 #endif 803 #ifdef CONFIG_TRACE 804 trace_early_init, 805 #endif 806 initf_malloc, 807 initf_console_record, 808 #if defined(CONFIG_HAVE_FSP) 809 arch_fsp_init, 810 #endif 811 arch_cpu_init, /* basic arch cpu dependent setup */ 812 mach_cpu_init, /* SoC/machine dependent CPU setup */ 813 initf_dm, 814 arch_cpu_init_dm, 815 mark_bootstage, /* need timer, go after init dm */ 816 #if defined(CONFIG_BOARD_EARLY_INIT_F) 817 board_early_init_f, 818 #endif 819 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K) 820 /* get CPU and bus clocks according to the environment variable */ 821 get_clocks, /* get CPU and bus clocks (etc.) */ 822 #endif 823 timer_init, /* initialize timer */ 824 #if defined(CONFIG_BOARD_POSTCLK_INIT) 825 board_postclk_init, 826 #endif 827 env_init, /* initialize environment */ 828 init_baud_rate, /* initialze baudrate settings */ 829 serial_init, /* serial communications setup */ 830 console_init_f, /* stage 1 init of console */ 831 display_options, /* say that we are here */ 832 display_text_info, /* show debugging info if required */ 833 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \ 834 defined(CONFIG_X86) 835 checkcpu, 836 #endif 837 #if defined(CONFIG_DISPLAY_CPUINFO) 838 print_cpuinfo, /* display cpu info (and speed) */ 839 #endif 840 #if defined(CONFIG_DISPLAY_BOARDINFO) 841 show_board_info, 842 #endif 843 INIT_FUNC_WATCHDOG_INIT 844 #if defined(CONFIG_MISC_INIT_F) 845 misc_init_f, 846 #endif 847 INIT_FUNC_WATCHDOG_RESET 848 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 849 init_func_i2c, 850 #endif 851 #if defined(CONFIG_HARD_SPI) 852 init_func_spi, 853 #endif 854 announce_dram_init, 855 /* TODO: unify all these dram functions? */ 856 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \ 857 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) || \ 858 defined(CONFIG_SH) 859 dram_init, /* configure available RAM banks */ 860 #endif 861 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 862 init_func_ram, 863 #endif 864 #ifdef CONFIG_POST 865 post_init_f, 866 #endif 867 INIT_FUNC_WATCHDOG_RESET 868 #if defined(CONFIG_SYS_DRAM_TEST) 869 testdram, 870 #endif /* CONFIG_SYS_DRAM_TEST */ 871 INIT_FUNC_WATCHDOG_RESET 872 873 #ifdef CONFIG_POST 874 init_post, 875 #endif 876 INIT_FUNC_WATCHDOG_RESET 877 /* 878 * Now that we have DRAM mapped and working, we can 879 * relocate the code and continue running from DRAM. 880 * 881 * Reserve memory at end of RAM for (top down in that order): 882 * - area that won't get touched by U-Boot and Linux (optional) 883 * - kernel log buffer 884 * - protected RAM 885 * - LCD framebuffer 886 * - monitor code 887 * - board info struct 888 */ 889 setup_dest_addr, 890 #if defined(CONFIG_XTENSA) 891 /* Blackfin u-boot monitor should be on top of the ram */ 892 reserve_uboot, 893 #endif 894 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 895 reserve_logbuffer, 896 #endif 897 #ifdef CONFIG_PRAM 898 reserve_pram, 899 #endif 900 reserve_round_4k, 901 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 902 defined(CONFIG_ARM) 903 reserve_mmu, 904 #endif 905 #ifdef CONFIG_DM_VIDEO 906 reserve_video, 907 #else 908 # ifdef CONFIG_LCD 909 reserve_lcd, 910 # endif 911 /* TODO: Why the dependency on CONFIG_8xx? */ 912 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 913 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 914 !defined(CONFIG_M68K) 915 reserve_legacy_video, 916 # endif 917 #endif /* CONFIG_DM_VIDEO */ 918 reserve_trace, 919 #if !defined(CONFIG_XTENSA) 920 reserve_uboot, 921 #endif 922 #ifndef CONFIG_SPL_BUILD 923 reserve_malloc, 924 reserve_board, 925 #endif 926 setup_machine, 927 reserve_global_data, 928 reserve_fdt, 929 reserve_arch, 930 reserve_stacks, 931 setup_dram_config, 932 show_dram_config, 933 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 934 defined(CONFIG_SH) 935 setup_board_part1, 936 #endif 937 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 938 INIT_FUNC_WATCHDOG_RESET 939 setup_board_part2, 940 #endif 941 display_new_sp, 942 #ifdef CONFIG_SYS_EXTBDINFO 943 setup_board_extra, 944 #endif 945 #ifdef CONFIG_OF_BOARD_FIXUP 946 fix_fdt, 947 #endif 948 INIT_FUNC_WATCHDOG_RESET 949 reloc_fdt, 950 setup_reloc, 951 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 952 copy_uboot_to_ram, 953 do_elf_reloc_fixups, 954 clear_bss, 955 #endif 956 #if defined(CONFIG_XTENSA) 957 clear_bss, 958 #endif 959 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 960 !CONFIG_IS_ENABLED(X86_64) 961 jump_to_copy, 962 #endif 963 NULL, 964 }; 965 966 void board_init_f(ulong boot_flags) 967 { 968 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA 969 /* 970 * For some architectures, global data is initialized and used before 971 * calling this function. The data should be preserved. For others, 972 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack 973 * here to host global data until relocation. 974 */ 975 gd_t data; 976 977 gd = &data; 978 979 /* 980 * Clear global data before it is accessed at debug print 981 * in initcall_run_list. Otherwise the debug print probably 982 * get the wrong value of gd->have_console. 983 */ 984 zero_global_data(); 985 #endif 986 987 gd->flags = boot_flags; 988 gd->have_console = 0; 989 990 if (initcall_run_list(init_sequence_f)) 991 hang(); 992 993 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 994 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) 995 /* NOTREACHED - jump_to_copy() does not return */ 996 hang(); 997 #endif 998 } 999 1000 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 1001 /* 1002 * For now this code is only used on x86. 1003 * 1004 * init_sequence_f_r is the list of init functions which are run when 1005 * U-Boot is executing from Flash with a semi-limited 'C' environment. 1006 * The following limitations must be considered when implementing an 1007 * '_f_r' function: 1008 * - 'static' variables are read-only 1009 * - Global Data (gd->xxx) is read/write 1010 * 1011 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 1012 * supported). It _should_, if possible, copy global data to RAM and 1013 * initialise the CPU caches (to speed up the relocation process) 1014 * 1015 * NOTE: At present only x86 uses this route, but it is intended that 1016 * all archs will move to this when generic relocation is implemented. 1017 */ 1018 static const init_fnc_t init_sequence_f_r[] = { 1019 #if !CONFIG_IS_ENABLED(X86_64) 1020 init_cache_f_r, 1021 #endif 1022 1023 NULL, 1024 }; 1025 1026 void board_init_f_r(void) 1027 { 1028 if (initcall_run_list(init_sequence_f_r)) 1029 hang(); 1030 1031 /* 1032 * The pre-relocation drivers may be using memory that has now gone 1033 * away. Mark serial as unavailable - this will fall back to the debug 1034 * UART if available. 1035 */ 1036 gd->flags &= ~GD_FLG_SERIAL_READY; 1037 1038 /* 1039 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 1040 * Transfer execution from Flash to RAM by calculating the address 1041 * of the in-RAM copy of board_init_r() and calling it 1042 */ 1043 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); 1044 1045 /* NOTREACHED - board_init_r() does not return */ 1046 hang(); 1047 } 1048 #endif /* CONFIG_X86 */ 1049