clk: rockchip: Add mac clock support for rk3308

Change-Id: I972e2b7977f0f94164c72ae2205ec51780eb7373
Signed-off-by: David Wu <david.wu@rock-chips.com>

rockchip: param: add ddr memory region parse

Change-Id: I7d59ee54a82da57b62970f4bc47faded60ba6ac8
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

lib: sysmem: refactor code

- import memblk id to manage memory blocks;
- change "sysmem_property" to generic "memblock";
- use alloc instead of reserve for all memory blocks;
- clean up and fix some

lib: sysmem: refactor code

- import memblk id to manage memory blocks;
- change "sysmem_property" to generic "memblock";
- use alloc instead of reserve for all memory blocks;
- clean up and fix some logic;
- add U-Boot cmd for sysmem;

Change-Id: I614223ce3bf97a7b3566412a9d1864fb30b68fd8
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

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rockchip: atags: add tag for SoC information

Change-Id: Ic2f89b8deb5cebeaaa05fb6cd67997429821904c
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

rockchip: atags: pass public key through atags

Change-Id: I202f354a3b48b8e64c7b2ade7e3b65fa3b78500a
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

rockchip: atags: add JShash for tag

Since atags is passed between so many pre-loader, it's better
add hash check for tag.

It compatibles with legacy code and tag data, because 'hash'
is reserved fi

rockchip: atags: add JShash for tag

Since atags is passed between so many pre-loader, it's better
add hash check for tag.

It compatibles with legacy code and tag data, because 'hash'
is reserved field in old tag data.

Change-Id: I18b4c46f75b2c5a50194c23576e6f1437c83ccf5
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

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arm: asm: add read_mpidr() for 32-bit ARM

Change-Id: I2556d589802d2290da129e03bb33ec11536119cd
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

clk: rockchip: rk3288: add clk_set_default

support aclk_vio\hclk_vio clk setting.

Change-Id: Ie826c770670598161f22208f504d8762b8597811
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

arm: arm32_macros: fix coding style

Change-Id: I736139237d184aa7a35c840ea0ed3214d7e47e44
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

clk: rockchip: rk3066: print arm enter and init rate

Change-Id: Iaf4ffbb61830b7bb7cef31843f0e9b75c34d08ec
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

clk: rockchip: rk3188: print arm enter and init rate

Change-Id: I604c18050e8ccbbc9aa25ecd8f4379a877239d49
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

rockchip: resource: add interface to get resource file size

clean up code and add comment for other interfaces.

Change-Id: Ibc64978d8db595c4fe76432faca77cdad9c949e6
Signed-off-by: Joseph Chen <chen

rockchip: resource: add interface to get resource file size

clean up code and add comment for other interfaces.

Change-Id: Ibc64978d8db595c4fe76432faca77cdad9c949e6
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

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rockchip: add platform param parse interface to param.c

parse: atf/optee/bootdev and common reserved memory.

Change-Id: I829eb42370b217e567cdafe03de4dab6063aa251
Signed-off-by: Joseph Chen <chenjh@

rockchip: add platform param parse interface to param.c

parse: atf/optee/bootdev and common reserved memory.

Change-Id: I829eb42370b217e567cdafe03de4dab6063aa251
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

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clk: rockchip: rk3128: print arm enter and init rate

Change-Id: I0be1752522a83a2d111870e5a8ac95f92bd7f9a5
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

clk: rockchip: rk3036: print arm enter and init rate

Change-Id: Ic9212c8a0f1d50006f7121957b8bd5f34d2622d9
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

clk: rockchip: rk3288: print arm enter and init rate

Change-Id: I5a6d564a973111841df6b53a4df64a54f728e116
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

clk: rockchip: rk322x: print arm enter and init rate

Change-Id: Iab7034c8cef09908a99b5a1e396f6e015da350fb
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

clk: rockchip: rk3308: print arm enter and init rate

Change-Id: I6df66d7b5dda643dba49ee87c2a2c0544ddbcded
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

clk: rockchip: rk3328: print arm enter and init rate

Change-Id: I80ebeee0d6d8b151061d0bbb0d1d12070dcc6f98
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

clk: rockchip: rk3368: print arm enter and init rate

Change-Id: Ib201cf442ce7398bbe8009ce9b7de9dc1f53c587
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

clk: rockchip: rk3399: print arm enter and init rate

Change-Id: Ib5e3e0f9a3e1a5b535ec852e7c58966dc0db77cf
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

clk: rockchip: px30: print arm enter and init rate

Change-Id: I0d2a1c6bb92397210314322fd147c4a8a6e81abd
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

clk: rockchip: rk1808: print arm enter and init rate

Change-Id: I14f0b0c95b1367266fe9c64050a602ad58208d53
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

clk: rockchip: rv1108: add NANDC and SFC clk init

Currently RV1108 run in 1.2G GPLL.
NANDC need 1200 / 8 div = 150MHz.
SFC need 1200 / 12 div = 100MHz.

Change-Id: Ia3f401b0cf13587209d0d68d76a9891dd

clk: rockchip: rv1108: add NANDC and SFC clk init

Currently RV1108 run in 1.2G GPLL.
NANDC need 1200 / 8 div = 150MHz.
SFC need 1200 / 12 div = 100MHz.

Change-Id: Ia3f401b0cf13587209d0d68d76a9891dd3bcf990
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

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rockchip: sdram: add ddr page size and bandwidth get interface

Change-Id: I05e0f32c7e8423843c7b874f8ff89e8e9d093390
Signed-off-by: Tang Yun ping <typ@rock-chips.com>