xref: /rk3399_rockchip-uboot/arch/arm/dts/rv1108-evb.dts (revision 98e497fd55e2e5d2a6dae4647f2b34d9f9981e75)
1/*
2 * (C) Copyright 2016 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier:     GPL-2.0+
5 */
6
7/dts-v1/;
8
9#include "rv1108.dtsi"
10#include "rv1108-sdram-ddr3-400.dtsi"
11#include <dt-bindings/input/input.h>
12
13/ {
14	model = "Rockchip RV1108 Evaluation board";
15	compatible = "rockchip,rv1108-evb", "rockchip,rv1108";
16
17	memory@60000000 {
18		device_type = "memory";
19		reg = <0x60000000 0x08000000>;
20	};
21
22	chosen {
23		stdout-path = "serial2:1500000n8";
24	};
25
26	adc-keys {
27		compatible = "adc-keys";
28		io-channels = <&saradc 0>;
29		volup-key {
30			linux,code = <KEY_VOLUMEUP>;
31			label = "volume up";
32			press-threshold-microvolt = <18000>;
33		};
34	};
35
36	backlight: backlight {
37		compatible = "pwm-backlight";
38		pwms = <&pwm0 0 25000 0>;
39		default-brightness-level = <200>;
40		brightness-levels = <
41			  0   1   2   3   4   5   6   7
42			  8   9  10  11  12  13  14  15
43			 16  17  18  19  20  21  22  23
44			 24  25  26  27  28  29  30  31
45			 32  33  34  35  36  37  38  39
46			 40  41  42  43  44  45  46  47
47			 48  49  50  51  52  53  54  55
48			 56  57  58  59  60  61  62  63
49			 64  65  66  67  68  69  70  71
50			 72  73  74  75  76  77  78  79
51			 80  81  82  83  84  85  86  87
52			 88  89  90  91  92  93  94  95
53			 96  97  98  99 100 101 102 103
54			104 105 106 107 108 109 110 111
55			112 113 114 115 116 117 118 119
56			120 121 122 123 124 125 126 127
57			128 129 130 131 132 133 134 135
58			136 137 138 139 140 141 142 143
59			144 145 146 147 148 149 150 151
60			152 153 154 155 156 157 158 159
61			160 161 162 163 164 165 166 167
62			168 169 170 171 172 173 174 175
63			176 177 178 179 180 181 182 183
64			184 185 186 187 188 189 190 191
65			192 193 194 195 196 197 198 199
66			200 201 202 203 204 205 206 207
67			208 209 210 211 212 213 214 215
68			216 217 218 219 220 221 222 223
69			224 225 226 227 228 229 230 231
70			232 233 234 235 236 237 238 239
71			240 241 242 243 244 245 246 247
72			248 249 250 251 252 253 254 255>;
73	};
74
75	vcc5v0_otg: vcc5v0-otg-drv {
76		compatible = "regulator-fixed";
77		enable-active-high;
78		regulator-name = "vcc5v0_otg";
79		gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
80		regulator-min-microvolt = <5000000>;
81		regulator-max-microvolt = <5000000>;
82	};
83
84	vcc_phy: vcc-phy-regulator {
85		compatible = "regulator-fixed";
86		enable-active-high;
87		regulator-name = "vcc_phy";
88		regulator-min-microvolt = <3300000>;
89		regulator-max-microvolt = <3300000>;
90		regulator-always-on;
91		regulator-boot-on;
92	};
93};
94
95&display_subsystem {
96	status = "okay";
97};
98
99&dsi {
100	status = "okay";
101
102	panel: panel@0 {
103		compatible = "simple-panel-dsi";
104		reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>;
105		enable-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
106		prepare-delay-ms = <20>;
107		reset-delay-ms = <20>;
108		init-delay-ms = <20>;
109		enable-delay-ms = <20>;
110		reg =<0>;
111		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
112			      MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
113		dsi,format = <MIPI_DSI_FMT_RGB888>;
114		dsi,lanes = <4>;
115		status = "okay";
116
117		panel-init-sequence = [
118			39 00 06 F0 55 AA 52 08 00
119			39 00 05 B0 0F 0F 1E 14
120			15 00 02 B2 00
121			15 00 02 B6 03
122			39 00 15 C0 03 00 06 07 08 09 00 00 00 00 02 00 0A 0B 0C 0D 00 00 00 00
123			39 00 11 C1 08 24 24 01 18 24 9F 85 08 24 24 01 18 24 95 85
124			39 00 19 C2 03 05 1B 24 13 31 01 05 1B 24 13 31 03 05 1B 38 00 11 02 05 1B 38 00 11
125			39 00 19 C3 02 05 1B 24 13 11 03 05 1B 24 13 11 03 05 1B 38 00 11 02 05 1B 38 00 11
126			39 00 06 F0 55 AA 52 08 01
127			15 00 02 B5 1E
128			15 00 02 B6 2D
129			15 00 02 B7 04
130			15 00 02 B8 05
131			15 00 02 B9 04
132			15 00 02 BA 14
133			15 00 02 BB 2F
134			15 00 02 BE 12
135			39 00 04 C2 00 35 07
136			39 00 06 F0 55 AA 52 08 02
137			15 00 02 C9 13
138			39 00 04 D4 02 04 2C
139			39 00 24 E1 00 91 AE CB E6 54 FF 1e 33 43 55 4F 66 78 8B 55 9D AC C0 CF 55 E0 e8 F2 FB AA 03 0D 15 1F AA 27 2C 31 34
140			39 00 24 E2 00 AD C6 E4 FD 55 11 2A 3B 49 55 54 6B 7C 8F 55 A1 AF C3 D1 55 E2 EA F3 FC AA 04 0E 15 20 AA 28 2D 32 35
141			39 00 24 E3 55 05 1E 37 4B 55 5A 64 72 7F 55 8B A3 B8 D1 A5 E4 F6 0E 23 AA 39 42 4F 59 AA 64 70 7A 86 AA 90 96 9C 9F
142			39 00 07 8F 5A 96 3C C3 A5 69
143			15 00 02 89 00
144			39 00 04 8C 55 49 53
145			15 00 02 9A 5A
146			39 00 05 FF A5 5A 13 86
147			39 00 03 FE 01 54
148			15 00 02 35 00
149			15 96 02 11 00
150			15 32 02 29 00
151		];
152
153		display-timings {
154			native-mode = <&timing_e555hbm2>;
155
156			timing_e555hbm2: timing0 {
157				clock-frequency = <62000000>;
158				hactive = <720>;
159				vactive = <1280>;
160				hsync-len = <4>;
161				hback-porch = <20>;
162				hfront-porch = <32>;
163				vsync-len = <4>;
164				vback-porch = <15>;
165				vfront-porch = <15>;
166				hsync-active = <0>;
167				vsync-active = <0>;
168				de-active = <0>;
169				pixelclk-active = <0>;
170			};
171		};
172	};
173};
174
175&gmac {
176	status = "okay";
177	clock_in_out ="output";
178	phy-supply = <&vcc_phy>;
179	snps,reset-active-low;
180	snps,reset-delays-us = <0 10000 1000000>;
181	snps,reset-gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_LOW>;
182};
183
184&mipi_dphy {
185	status = "okay";
186};
187
188&pwm0 {
189	status = "okay";
190};
191
192&route_dsi {
193	status = "okay";
194};
195
196&saradc {
197	status = "okay";
198};
199
200&sfc {
201	compatible = "rockchip,rksfc";
202	status = "okay";
203};
204
205&u2phy {
206	status = "okay";
207};
208
209&u2phy_otg {
210	status = "okay";
211};
212
213&u2phy_host {
214	status = "okay";
215};
216
217&uart0 {
218	status = "okay";
219};
220
221&uart1 {
222	status = "okay";
223};
224
225&uart2 {
226	status = "okay";
227};
228
229&usb20_otg {
230	vbus-supply = <&vcc5v0_otg>;
231	status = "okay";
232};
233
234&usb_host_ehci {
235	status = "okay";
236};
237
238&usb_host_ohci {
239	status = "okay";
240};
241
242&vop {
243	status = "okay";
244};
245
246&i2c0 {
247	i2c-scl-rising-time-ns = <275>;
248	i2c-scl-falling-time-ns = <16>;
249	clock-frequency = <200000>;
250	nack-retry = <1>;
251	status = "okay";
252
253	rk805: pmic@18 {
254		compatible = "rockchip,rk805";
255		status = "okay";
256		reg = <0x18>;
257		interrupt-parent = <&gpio1>;
258		interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
259		pinctrl-names = "default";
260		pinctrl-0 = <&pmic_int_l>;
261		rockchip,system-power-controller;
262		wakeup-source;
263		gpio-controller;
264		#gpio-cells = <2>;
265		#clock-cells = <1>;
266		clock-output-names = "xin32k", "rk805-clkout2";
267
268		pwrkey {
269			status = "okay";
270		};
271
272		regulators {
273			vdd_arm: DCDC_REG1 {
274				regulator-name = "vdd_arm";
275				regulator-min-microvolt = <712500>;
276				regulator-max-microvolt = <1450000>;
277				regulator-ramp-delay = <6001>;
278				regulator-boot-on;
279				regulator-always-on;
280				regulator-state-mem {
281					regulator-on-in-suspend;
282					regulator-suspend-microvolt = <1000000>;
283				};
284			};
285
286			vdd_cam: DCDC_REG2 {
287				regulator-name = "vdd_cam";
288				regulator-min-microvolt = <712500>;
289				regulator-max-microvolt = <2000000>;
290				regulator-ramp-delay = <6001>;
291				regulator-boot-on;
292				regulator-always-on;
293				regulator-state-mem {
294					regulator-on-in-suspend;
295					regulator-suspend-microvolt = <2000000>;
296				};
297			};
298
299			vcc_ddr: DCDC_REG3 {
300				regulator-name = "vcc_ddr";
301				regulator-boot-on;
302				regulator-always-on;
303				regulator-state-mem {
304					regulator-on-in-suspend;
305				};
306			};
307
308			vcc_io: DCDC_REG4 {
309				regulator-name = "vcc_io";
310				regulator-min-microvolt = <3300000>;
311				regulator-max-microvolt = <3300000>;
312				regulator-boot-on;
313				regulator-always-on;
314				regulator-state-mem {
315					regulator-on-in-suspend;
316					regulator-suspend-microvolt = <3300000>;
317				};
318			};
319
320			vdd_10: LDO_REG1 {
321				regulator-name = "vdd_10";
322				regulator-min-microvolt = <1000000>;
323				regulator-max-microvolt = <1000000>;
324				regulator-boot-on;
325				regulator-always-on;
326				regulator-state-mem {
327					regulator-on-in-suspend;
328					regulator-suspend-microvolt = <1000000>;
329				};
330			};
331
332			vcc_18emmc: LDO_REG2 {
333				regulator-name = "vcc_18emmc";
334				regulator-min-microvolt = <1800000>;
335				regulator-max-microvolt = <1800000>;
336				regulator-boot-on;
337				regulator-always-on;
338				regulator-state-mem {
339					regulator-on-in-suspend;
340					regulator-suspend-microvolt = <1800000>;
341				};
342			};
343
344			vdd_10_pmu: LDO_REG3 {
345				regulator-name = "vdd_10_pmu";
346				regulator-min-microvolt = <1000000>;
347				regulator-max-microvolt = <1000000>;
348				regulator-boot-on;
349				regulator-always-on;
350				regulator-state-mem {
351					regulator-on-in-suspend;
352					regulator-suspend-microvolt = <1000000>;
353				};
354			};
355		};
356	};
357};
358
359&pinctrl {
360	pmic {
361		pmic_int_l: pmic-int-l {
362		rockchip,pins =
363			<0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
364		};
365	};
366};
367