History log of /rk3399_ARM-atf/ (Results 7076 – 7100 of 18314)
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d99998f714-Apr-2022 Patrick Delaunay <patrick.delaunay@foss.st.com>

feat(st-uart): add initialization with the device tree

Add the pincontrol configuration and clock enable in UART driver
with information found in the device tree.

This patch avoids an issue on STM3

feat(st-uart): add initialization with the device tree

Add the pincontrol configuration and clock enable in UART driver
with information found in the device tree.

This patch avoids an issue on STM32MP13x platform because the UART
configuration is reset by the ROM code for UART serial boot
(STM32MP_UART_PROGRAMMER=1).

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I575fd0e1026b857059abcfd4a3166eb3a239e1fd

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7d197d6214-Apr-2022 Patrick Delaunay <patrick.delaunay@foss.st.com>

refactor(stm32mp1): move DT_UART_COMPAT in include file

Move the definition of DT_UART_COMPAT in stm32mp1_def.h to be used
in several files.

Change-Id: I74d0350bcd971df9b15697f2b9ec04061d6a7656
Sig

refactor(stm32mp1): move DT_UART_COMPAT in include file

Move the definition of DT_UART_COMPAT in stm32mp1_def.h to be used
in several files.

Change-Id: I74d0350bcd971df9b15697f2b9ec04061d6a7656
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>

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4b2f23e515-Mar-2022 Patrick Delaunay <patrick.delaunay@foss.st.com>

feat(stm32mp1): configure the serial boot load address

For product with 128MB DDR size, the OP-TEE is located at the end
of the DDR and the FIP can't be loaded at the default location
because it ove

feat(stm32mp1): configure the serial boot load address

For product with 128MB DDR size, the OP-TEE is located at the end
of the DDR and the FIP can't be loaded at the default location
because it overlap the OP-TEE final location. So the default value
for DWL_BUFFER_BASE is invalid.

To avoid this conflict the serial boot load address = DWL_BUFFER_BASE
can be modified with a configuration flags.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ie27b87c10c57fea5d4c6200ce4f624e775b9a080

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32f2ca0428-Feb-2022 Patrick Delaunay <patrick.delaunay@foss.st.com>

fix(stm32mp1): update the FIP load address for serial boot

Update the FIP load address and size for serial boot to support
product with a DDR size = 128MB
1/ Move the FIP location at the end of the

fix(stm32mp1): update the FIP load address for serial boot

Update the FIP load address and size for serial boot to support
product with a DDR size = 128MB
1/ Move the FIP location at the end of the first 128MB
2/ Reduce the DWL_BUFFER_SIZE to 16MB, to be coherent with the value
indicated in USB enumeration
- for STM32MP13x: "@SSBL /0x03/1*16Me"
- for STM32MP15x: "@Partition3 /0x03/1*16Me"

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Id93bf00c64832c17426bfd78e060861275677ecc

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e7705e9a02-Mar-2022 Patrick Delaunay <patrick.delaunay@foss.st.com>

refactor(st): configure baudrate for UART programmer

Add the possibility to configure the UART baudrate; reused the
console configuration, defined in STM32MP_UART_BAUDRATE.

The default value remain

refactor(st): configure baudrate for UART programmer

Add the possibility to configure the UART baudrate; reused the
console configuration, defined in STM32MP_UART_BAUDRATE.

The default value remains 115200.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ifcf2b36e8ac929265405bc88e824ee78be3b5bbb

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1258189502-Mar-2022 Patrick Delaunay <patrick.delaunay@foss.st.com>

refactor(st-uart): compute the over sampling dynamically

The parameter over_sampling of stm32_uart_init_s is not required
as it can be computed dynamically from clock rate of the serial
device and t

refactor(st-uart): compute the over sampling dynamically

The parameter over_sampling of stm32_uart_init_s is not required
as it can be computed dynamically from clock rate of the serial
device and the requested baudrate.

Oversampling by 8 is allowed only for higher speed
(up to clock_rate / 8) to reduce the maximum receiver tolerance
to clock deviation.

This patch update the driver, the serial init struct and the
only user, the stm32cubeprogrammer over uart support.

Change-Id: I422731089730a288defeb7fa49886db65d0902b2
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>

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278bc85723-Sep-2022 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge changes from topic "bl31_in_sram" into integration

* changes:
feat(sgi): remove override for `ARM_BL31_IN_DRAM` build-option
feat(sgi): configure SRAM and BL31 size for sgi platform

aef9b0da23-Sep-2022 Olivier Deprez <olivier.deprez@arm.com>

Merge "fix(bl31): fix validate_el3_interrupt_rm preprocessor usage" into integration

a371327b08-Jul-2022 Rohit Mathew <rohit.mathew@arm.com>

feat(sgi): remove override for `ARM_BL31_IN_DRAM` build-option

RD-N2* variants of Neoverse reference design platforms could be
configured to boot from SRAM or DRAM. Having ARM_BL31_IN_DRAM set to 1

feat(sgi): remove override for `ARM_BL31_IN_DRAM` build-option

RD-N2* variants of Neoverse reference design platforms could be
configured to boot from SRAM or DRAM. Having ARM_BL31_IN_DRAM set to 1
within the common makefile would deter these platforms from having this
flexibility. Remove the default override configuration for
`ARM_BL31_IN_DRAM`.

Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: I8d79969c003a984675cbe705de890b51a1f7f4ea

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8fd820ff08-Jul-2022 Rohit Mathew <rohit.mathew@arm.com>

feat(sgi): configure SRAM and BL31 size for sgi platform

Update SRAM size for Neoverse reference design platforms from 256KB to
512KB. This is required to place and execute BL31 image from the
on-ch

feat(sgi): configure SRAM and BL31 size for sgi platform

Update SRAM size for Neoverse reference design platforms from 256KB to
512KB. This is required to place and execute BL31 image from the
on-chip SRAM. Additionally, revise BL31 image size to accommodate
larger BL31 images of multi-chip platforms.

Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: I11c2672a1089f24a9fafcf6555b8e1d52032cfde

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6023945022-Sep-2022 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "mediatek upstream" into integration

* changes:
refactor(mt8188): move platform_def.h to mt8188/include
feat(mt8188): add MCUSYS support
feat(mt8188): add armv8.2 supp

Merge changes from topic "mediatek upstream" into integration

* changes:
refactor(mt8188): move platform_def.h to mt8188/include
feat(mt8188): add MCUSYS support
feat(mt8188): add armv8.2 support
feat(mt8188): add DFD control in SiP service
feat(mt8188): add EMI MPU basic drivers
feat(mt8188): add DCM driver
feat(mt8188): add reset and poweroff functions
feat(mediatek): add more flexibility of mtk_pm.c
feat(mediatek): add more options for build helper
feat(mt8188): add LPM driver support
feat(mt8188): apply ERRATA for CA-78
fix(mediatek): remove unused cold_boot.[c|h]
fix(mediatek): wrap cold_boot.h with MTK_SIP_KERNEL_BOOT_ENABLE
feat(mt8186): add EMI MPU support for SCP and DSP

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a64d9f4414-Sep-2022 Bo-Chen Chen <rex-bc.chen@mediatek.com>

refactor(mt8188): move platform_def.h to mt8188/include

It is more suitable to place platform_def.h in mt8188/include.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I35720690ff4

refactor(mt8188): move platform_def.h to mt8188/include

It is more suitable to place platform_def.h in mt8188/include.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I35720690ff4f2ca99c9430edb8bbe17edf9aefb9

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4cc1ff7e16-Sep-2022 Edward-JW Yang <edward-jw.yang@mediatek.com>

feat(mt8188): add MCUSYS support

Add MCUSYS drivers support for MT8188.

Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.com>
Change-Id: I84107702a9fd021c37d2997ad25b321a483a1a66

45711e4e05-Sep-2022 Edward-JW Yang <edward-jw.yang@mediatek.com>

feat(mt8188): add armv8.2 support

Add armv8.2 support for MT8188.

Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.com>
Change-Id: I0ac865949ba864fb207ee1f0937092cbabd550de

7079a94217-Aug-2022 Fengquan Chen <fengquan.chen@mediatek.corp-partner.google.com>

feat(mt8188): add DFD control in SiP service

DFD (Design for Debug) is a debugging tool, which scans flip-flops and
dumps to internal RAM on the WDT reset. After system reboots, those
values could b

feat(mt8188): add DFD control in SiP service

DFD (Design for Debug) is a debugging tool, which scans flip-flops and
dumps to internal RAM on the WDT reset. After system reboots, those
values could be showed for debugging.

TEST=build pass.
BUG=b:244216434

Signed-off-by: Fengquan Chen <fengquan.chen@mediatek.corp-partner.google.com>
Change-Id: I468036131e941a46bc1ec12d33105146000730d8

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8454f0d605-Sep-2022 Dawei Chien <dawei.chien@mediatek.com>

feat(mt8188): add EMI MPU basic drivers

EMI MPU stands for external memory interface memory protect unit.
MT8188 supports 32 regions and 16 domains.

Signed-off-by: Dawei Chien <dawei.chien@mediatek

feat(mt8188): add EMI MPU basic drivers

EMI MPU stands for external memory interface memory protect unit.
MT8188 supports 32 regions and 16 domains.

Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
Change-Id: I9bbeb355665401cc71dda6db22157d9d751570d1

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bc9410e205-Sep-2022 Garmin Chang <garmin.chang@mediatek.com>

feat(mt8188): add DCM driver

DCM means dynamic clock management, and it can dynamically
slow down or gate clocks during CPU or bus idle.

1. Add MCUSYS related DCM drivers.
2. Enable MCUSYS related

feat(mt8188): add DCM driver

DCM means dynamic clock management, and it can dynamically
slow down or gate clocks during CPU or bus idle.

1. Add MCUSYS related DCM drivers.
2. Enable MCUSYS related DCM by default.

Signed-off-by: Garmin Chang <garmin.chang@mediatek.com>
Change-Id: I131354d72bbc190af504e9639bcc85a720e2bb17

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a72b9e7729-Jul-2022 Rex-BC Chen <rex-bc.chen@mediatek.com>

feat(mt8188): add reset and poweroff functions

- Add mtk_pm_system_reset_cros() for cros reset.
- Add mtk_pm_system_off_cros() for cros power-off.

TEST=build pass
BUG=b:236331724

Signed-off-by: Bo

feat(mt8188): add reset and poweroff functions

- Add mtk_pm_system_reset_cros() for cros reset.
- Add mtk_pm_system_off_cros() for cros power-off.

TEST=build pass
BUG=b:236331724

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I4117f6080e282551b37a936a490ab7b37ac31827

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6ca2046e05-Sep-2022 Edward-JW Yang <edward-jw.yang@mediatek.com>

feat(mediatek): add more flexibility of mtk_pm.c

To use power manager function more easier, we add some drivers to let
the implementation easier.

Signed-off-by: Edward-JW Yang <edward-jw.yang@media

feat(mediatek): add more flexibility of mtk_pm.c

To use power manager function more easier, we add some drivers to let
the implementation easier.

Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.com>
Change-Id: Ibc6e1680c4534592ed37de49da39b6667f468ea1

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5b95e43905-Sep-2022 Edward-JW Yang <edward-jw.yang@mediatek.com>

feat(mediatek): add more options for build helper

To support more LPM feature, we add more options for build helper.

Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.com>
Change-Id: I17eeedbe

feat(mediatek): add more options for build helper

To support more LPM feature, we add more options for build helper.

Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.com>
Change-Id: I17eeedbe0674e321f1891074ba0c72d858841dae

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f604e4ef05-Sep-2022 Bo-Chen Chen <rex-bc.chen@mediatek.com>

feat(mt8188): add LPM driver support

Add LPM drivers and create rules.mk for makefile.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I0bfb99a4a763e7ca93260f62d1ced184259acb39

abb995ab14-Sep-2022 Bo-Chen Chen <rex-bc.chen@mediatek.com>

feat(mt8188): apply ERRATA for CA-78

Apply ERRATA_A78_2376745 and ERRATA_A78_2395406 for CA-78.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I4575e83025af971a669dc1f8561cf19e1f

feat(mt8188): apply ERRATA for CA-78

Apply ERRATA_A78_2376745 and ERRATA_A78_2395406 for CA-78.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I4575e83025af971a669dc1f8561cf19e1fdac469

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8cd3b69308-Sep-2022 Bo-Chen Chen <rex-bc.chen@mediatek.com>

fix(mediatek): remove unused cold_boot.[c|h]

We are not using cold_boot.[c|h] for mt8188, so remove them first.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I721aca37d5fb422f27

fix(mediatek): remove unused cold_boot.[c|h]

We are not using cold_boot.[c|h] for mt8188, so remove them first.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I721aca37d5fb422f274bb1ab46150e1eddf7c480

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24476b2e08-Sep-2022 Bo-Chen Chen <rex-bc.chen@mediatek.com>

fix(mediatek): wrap cold_boot.h with MTK_SIP_KERNEL_BOOT_ENABLE

We should wrap cold_boot.h with MTK_SIP_KERNEL_BOOT_ENABLE to avoid
build error.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.co

fix(mediatek): wrap cold_boot.h with MTK_SIP_KERNEL_BOOT_ENABLE

We should wrap cold_boot.h with MTK_SIP_KERNEL_BOOT_ENABLE to avoid
build error.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: Idfd760fbb7c782d4fc9de674d86a7123e0129c0d

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3d4b6f9312-Sep-2022 Allen-KH Cheng <allen-kh.cheng@mediatek.corp-partner.google.com>

feat(mt8186): add EMI MPU support for SCP and DSP

1. Enable domain D0 and D3 (SCP) access 0x50000000~0x5109FFFF.
2. Enable domain D4 (DSP & AFE) access 0x60000000~0x610FFFFF.

BUG=b:204229221
TEST=b

feat(mt8186): add EMI MPU support for SCP and DSP

1. Enable domain D0 and D3 (SCP) access 0x50000000~0x5109FFFF.
2. Enable domain D4 (DSP & AFE) access 0x60000000~0x610FFFFF.

BUG=b:204229221
TEST=build pass

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.corp-partner.google.com>
Change-Id: I6a7d2eafaaa7a558829a0d741dfb3307885e3b98

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