Merge "docs(security): rename Makalu and SB optimisation" into integration

Merge "docs(maintainers): update qti maintainer" into integration

docs(rme): add instruction to build rmm

Add documentation to build and run TF-A with RMM,
Linux kernel and TFTF Realm Payload.

Signed-off-by: Shruti Gupta <shruti.gupta@arm.com>
Change-Id: I951b41a

docs(rme): add instruction to build rmm

Add documentation to build and run TF-A with RMM,
Linux kernel and TFTF Realm Payload.

Signed-off-by: Shruti Gupta <shruti.gupta@arm.com>
Change-Id: I951b41a144aabe0fec16eb933d7f005a65f06fb2

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Merge "docs: add link to DCO" into integration

fix(versal-net): add default values for silicon

Add missing default value for silicon.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: Iac7d4db17a29a148298e9e3bd3eb3f74cafe7bc1

chore(docs): move deprecated platforms information around

We used to have a dedicated page for deprecated platforms information.
This document contained 2 pieces of information:

a) the process for

chore(docs): move deprecated platforms information around

We used to have a dedicated page for deprecated platforms information.
This document contained 2 pieces of information:

a) the process for deprecating a platform port;
b) the list of deprecated platforms to this day.

I think it makes more sense to move b) to the platforms ports landing
page, such that it is more visible.

This also has the nice effect to move the 'Deprecated platforms' title
as the last entry of the 'Platform ports' table of contents, like so:

- Platform ports
- 1. Allwinner ARMv8 SoCs
- 2. Arm Development Platforms
...
- 39. Broadcom Stingray
- Deprecated platforms

instead of it being lost in the middle of supported platform ports.

Regarding a), this gets moved under the "Processes & Policies" section.
More specifically, it gets clubbed with the existing platform
compatibility policy. The combined document gets renamed into a
"Platforms Ports Policy" document.

Change-Id: I6e9ce2abc68b8a8ac88e7bd5f21749c14c9a2af6
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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Merge "chore(docs): refresh platform ports landing page" into integration

Merge changes from topic "rdn2cfg2_spi_support" into integration

* changes:
feat(rdn2): enable extended SPI support
feat(rdn2): add SPI ID ranges for RD-N2 multichip platform

Merge "feat: pass SMCCCv1.3 SVE hint bit to dispatchers" into integration

docs(security): rename Makalu and SB optimisation

Changing Makalu reference to the public name Cortex-A715. Also, added
a note on use of SB instruction for all CPUs supporting ENABLE_FEAT_SB.

Signe

docs(security): rename Makalu and SB optimisation

Changing Makalu reference to the public name Cortex-A715. Also, added
a note on use of SB instruction for all CPUs supporting ENABLE_FEAT_SB.

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I98bd36c684fa7ae79bd4e8e641fd73404435c202

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docs: add link to DCO

The link to the Developer Certificate of Origin was mistakenly removed
in a patch some time ago. This change re-adds it.

Change-Id: Ia8aed055cb449cdf4c1aaeac9b81ca15099e73f5
S

docs: add link to DCO

The link to the Developer Certificate of Origin was mistakenly removed
in a patch some time ago. This change re-adds it.

Change-Id: Ia8aed055cb449cdf4c1aaeac9b81ca15099e73f5
Signed-off-by: Chris Kay <chris.kay@arm.com>

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Merge "docs(changelog): add missing scopes for release" into integration

Merge changes from topic "npm-dependencies" into integration

* changes:
docs(changelog): fix invalid context management scope
docs(commit-style): fix incorrect instructions for adding scopes
d

Merge changes from topic "npm-dependencies" into integration

* changes:
docs(changelog): fix invalid context management scope
docs(commit-style): fix incorrect instructions for adding scopes
docs(prerequisites): update Node.js prerequisites documentation

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docs: document do_panic() and panic() helper functions

panic() and do_panic() are widely used helper functions called when
encountering a critical failure that cannot be recovered from.
Document the

docs: document do_panic() and panic() helper functions

panic() and do_panic() are widely used helper functions called when
encountering a critical failure that cannot be recovered from.
Document them in porting guide. Also, remove panic() documentation
from PSCI guide(where it is unused anyways).

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ib0965cce56c03d0de5ac0d05d5714a6942793ede

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build: warn about RSS driver experimental status

Change-Id: I93b7afe17395a94e1ec0ae09457eb2fd320d59a9
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

refactor(trng): cleanup the existing TRNG support

This patch adds the following changes to complete the existing
TRNG implementation:

1. Adds a feature specific scope for buildlog generation.
2. Up

refactor(trng): cleanup the existing TRNG support

This patch adds the following changes to complete the existing
TRNG implementation:

1. Adds a feature specific scope for buildlog generation.
2. Updates the docs on the build flag "TRNG_SUPPORT" and its values.
3. Makefile update and improves the existing comments at few sections
for better understanding of the underlying logic.

Change-Id: I3f72f0ccd5c94005a2df87158cf23199d2160d37
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

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chore(docs): refresh platform ports landing page

- Remove mentions of Arm SGM-775 and MediaTek MT6795 platforms.
Both platform ports were deleted from TF-A source tree in the
last release (v2

chore(docs): refresh platform ports landing page

- Remove mentions of Arm SGM-775 and MediaTek MT6795 platforms.
Both platform ports were deleted from TF-A source tree in the
last release (v2.7).

- Remove mention of Arm Morello platform, as it now has a dedicated
documentation page accessible from the table of contents
(see docs/plat/arm/morello/).

Change-Id: Ie3acdddab81f5589bb36114a8a766200f5b08ad4
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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Merge "build(bl2): only set BL2_CPPFLAGS for armv8" into integration

fix(ras): restrict RAS support for NS world

Current RAS framework in TF-A only supports handling errors originating
from NS world but the HANDLE_EA_EL3_FIRST flag configures it for all
lower Els. To

fix(ras): restrict RAS support for NS world

Current RAS framework in TF-A only supports handling errors originating
from NS world but the HANDLE_EA_EL3_FIRST flag configures it for all
lower Els. To make the current design of RAS explicit, rename this macro
to HANDLE_EA_EL3_FIRST_NS and set EA bit in scr_el3 only when
switching to NS world.

Note: I am unaware of any platform which traps errors originating in
Secure world to EL3, if there is any such platform then it need to
be explicitly implemented in TF-A

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: If58eb201d8fa792c16325c85c26056e9b409b750

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fix(debug): decouple "get_el_str()" from backtrace

get_el_str() was implemented under ENABLE_BACKTRACE macro but being
used at generic places too, this causes multiple definition of this
function.
R

fix(debug): decouple "get_el_str()" from backtrace

get_el_str() was implemented under ENABLE_BACKTRACE macro but being
used at generic places too, this causes multiple definition of this
function.
Remove duplicate definition of this function and move it out of
backtrace scope. Also, this patch fixes a small bug where in default
case S-EL1 is returned which ideally should be EL1, as there is no
notion of security state in EL string.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ib186ea03b776e2478eff556065449ebd478c3538

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feat: pass SMCCCv1.3 SVE hint bit to dispatchers

SMCCCv1.3 introduces the SVE hint bit added to the SMC FID (bit 16)
denoting that the world issuing an SMC doesn't expect the callee to
preserve the

feat: pass SMCCCv1.3 SVE hint bit to dispatchers

SMCCCv1.3 introduces the SVE hint bit added to the SMC FID (bit 16)
denoting that the world issuing an SMC doesn't expect the callee to
preserve the SVE state (FFR, predicates, Zn vector bits greater than
127). Update the generic SMC handler to copy the SVE hint bit state
to SMC flags and mask out the bit by default for the services called
by the standard dispatcher. It is permitted by the SMCCC standard to
ignore the bit as long as the SVE state is preserved. In any case a
callee must preserve the NEON state (FPCR/FPSR, Vn 128b vectors)
whichever the SVE hint bit state.

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I2b163ed83dc311b8f81f96b23c942829ae9fa1b5

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docs(maintainers): update qti maintainer

Add Muhammad Arsath K F in qti maintainer

Signed-off-by: Muhammad Arsath K F <quic_mkf@quicinc.com>
Change-Id: I71e6cc72b3c658730abe5255977f3b93dd7e4563

docs(changelog): add missing scopes for release

Add missing scopes from commits for the upcoming release.

Change-Id: I22e38fb0658e42b45591c82aa30e063f7a7edc86
Signed-off-by: Lauren Wehrmeister <lau

docs(changelog): add missing scopes for release

Add missing scopes from commits for the upcoming release.

Change-Id: I22e38fb0658e42b45591c82aa30e063f7a7edc86
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>

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fix(bl31): harden check in delegate_async_ea

Following hardening done around ESR_EL3 register usage
- Panic if exception is anyting other than SError
- AET bit is only valid if DFSC is 0x11, move

fix(bl31): harden check in delegate_async_ea

Following hardening done around ESR_EL3 register usage
- Panic if exception is anyting other than SError
- AET bit is only valid if DFSC is 0x11, move DFSC check before AET.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ib15159920f6cad964332fd40f88943aee2bc73b4

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docs(marvell): fix typo 8K => A8K

It is Armada 80x0, hence A8K (like A7K).

Change-Id: I4888b472204ecd19bfe9b8c89adaa1a99b01dd5f
Signed-off-by: Pali Rohár <pali@kernel.org>