| b34a48c1 | 10-Nov-2022 |
Jit Loon Lim <jit.loon.lim@intel.com> |
fix(intel): missing NCORE CCU snoop filter fix in BL2
Clear Ncore CCU snoop filter. There is hardware bug in NCORE CCU IP and it is causing an issue in the coherent directory tracking of outstanding
fix(intel): missing NCORE CCU snoop filter fix in BL2
Clear Ncore CCU snoop filter. There is hardware bug in NCORE CCU IP and it is causing an issue in the coherent directory tracking of outstanding cache lines.
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Change-Id: I9ee67c94e6379d318516ae8f660a62323ce8d563
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| 19e09e27 | 14-Dec-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes Ib02688f7,If17fe04d into integration
* changes: fix(cpus): workaround for Cortex-X2 erratum 2768515 fix(cpus): workaround for Cortex-A710 erratum 2768515 |
| bb0e3360 | 14-Dec-2022 |
Jens Wiklander <jens.wiklander@linaro.org> |
docs(build): describes the SPMC_OPTEE build option
Explains that the SPMC_OPTEE build option is used to load the SPMC at S-EL1 using an OP-TEE specific mechanism.
Signed-off-by: Jens Wiklander <jen
docs(build): describes the SPMC_OPTEE build option
Explains that the SPMC_OPTEE build option is used to load the SPMC at S-EL1 using an OP-TEE specific mechanism.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Change-Id: I71757d2d9ac98caf0ac6d8e64b221adaa0f70846
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| 1cbe42a5 | 17-Nov-2022 |
Manish Pandey <manish.pandey2@arm.com> |
fix(el3_runtime): allow SErrors when executing in EL3
SCR_EL3.EA is set to 1 in BL31 initialization and is cleared before entering to lower ELs(except for RAS FFH case "HANDLE_EA_EL3_FIRST_NS"). The
fix(el3_runtime): allow SErrors when executing in EL3
SCR_EL3.EA is set to 1 in BL31 initialization and is cleared before entering to lower ELs(except for RAS FFH case "HANDLE_EA_EL3_FIRST_NS"). The cleared value persist even during run time when execution comes back to EL3.
When SCR_EL3.EA is 0 and execution state is EL3, Async EAs(delivered as SErrors) are implicitly masked and hence any Async EA by EL3 will remain pending and will trap at the exception level EA is targeted to and unmasked when entering lower EL. This causes unexpected EA at lower EL. This is a very rare to get SError in EL3 until unless there is any programming error.
This patch sets SCR_EL3.EA to 1 when entering EL3 from lower EL.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Ibb593369edb034f670fd85ee79adc9829b900a83
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| e61713b0 | 07-Dec-2022 |
Manish Pandey <manish.pandey2@arm.com> |
fix(el3_runtime): do not save scr_el3 during EL3 entry
scr_el3 registers cannot be modified in lower ELs which means it retains the same value which is stored in the EL3 cpu context structure for th
fix(el3_runtime): do not save scr_el3 during EL3 entry
scr_el3 registers cannot be modified in lower ELs which means it retains the same value which is stored in the EL3 cpu context structure for the given world. So, we should not save the register when entering to EL3 from lower EL as we have the copy of it present in cpu context.
During EL3 execution SCR_EL3 value can be modifed for following cases 1. Changes which is required for EL3 execution, this change is temp and do not need to be saved. 2. Changes which affects lower EL execution, these changes need to be written to cpu context as well and will be retrieved when scr_el3 is restored as part of exiting EL3
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: I9cc984ddf50e27d09e361bd83b1b3c9f068cf2fd
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| 4e025c63 | 13-Dec-2022 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "ffa_el3_spmc_fixes" into integration
* changes: fix(tsp): use verbose for power logs fix(el3-spmc): fix coverity scan warnings fix(el3-spmc): improve bound check for
Merge changes from topic "ffa_el3_spmc_fixes" into integration
* changes: fix(tsp): use verbose for power logs fix(el3-spmc): fix coverity scan warnings fix(el3-spmc): improve bound check for descriptor
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| 8b1d186a | 13-Dec-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes Ie6a13e4a,I517074b8,Ifd29b748,I1279d9cb,I3b78e0c5, ... into integration
* changes: feat(imx8mq): add BL31 PIE support refactor(imx8mq): introduce BL31_SIZE refactor(imx8mq): make
Merge changes Ie6a13e4a,I517074b8,Ifd29b748,I1279d9cb,I3b78e0c5, ... into integration
* changes: feat(imx8mq): add BL31 PIE support refactor(imx8mq): introduce BL31_SIZE refactor(imx8mq): make use of setup_page_tables() feat(imx8mq): always set up console feat(imx8mq): remove empty bl31_plat_runtime_setup feat(imx8mq): make IMX_BOOT_UART_BASE configurable via build parameter
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| 8cfa94b7 | 08-Dec-2022 |
Lucas Stach <l.stach@pengutronix.de> |
feat(imx8mq): add BL31 PIE support
Enable PIE support so the BL31 firmware can be loaded from anywhere within the OCRAM (SRAM). For the PIE support we only need to replace the BL31_BASE define by th
feat(imx8mq): add BL31 PIE support
Enable PIE support so the BL31 firmware can be loaded from anywhere within the OCRAM (SRAM). For the PIE support we only need to replace the BL31_BASE define by the BL31_START symbol which is a relocatable and we need to enable it by setting ENABLE_PIE := 1.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Change-Id: Ie6a13e4ae0fdc6627a94798d7a86df7d5b310896
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| 0445a4ab | 08-Dec-2022 |
Lucas Stach <l.stach@pengutronix.de> |
refactor(imx8mq): introduce BL31_SIZE
No functional change.
Introduce BL31_SIZE define and calculate the limits based on the BL31_BASE and the BL31_SIZE define. Also make use of SZ_64K to make it e
refactor(imx8mq): introduce BL31_SIZE
No functional change.
Introduce BL31_SIZE define and calculate the limits based on the BL31_BASE and the BL31_SIZE define. Also make use of SZ_64K to make it easier to read. This is required for later BL31 PIE support since it drops the calculation based on the BL31_LIMIT and BL31_BASE.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Change-Id: I517074b866b5bf11841b51777f87c926b304488d
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| c0fb8874 | 08-Dec-2022 |
Lucas Stach <l.stach@pengutronix.de> |
refactor(imx8mq): make use of setup_page_tables()
Improve code readability and align with other i.MX8M* platforms.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Change-Id: Ifd29b74872e3a56728
refactor(imx8mq): make use of setup_page_tables()
Improve code readability and align with other i.MX8M* platforms.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Change-Id: Ifd29b74872e3a567288d208de4827403078164e9
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| 36be1086 | 08-Dec-2022 |
Lucas Stach <l.stach@pengutronix.de> |
feat(imx8mq): always set up console
This aligns the i.MX8MQ platform behaviour with the other i.MX8M* platforms by always setting up the console UART.
Signed-off-by: Lucas Stach <l.stach@pengutroni
feat(imx8mq): always set up console
This aligns the i.MX8MQ platform behaviour with the other i.MX8M* platforms by always setting up the console UART.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Change-Id: I1279d9cb4feb6e789422b9844cab711b8daae74e
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| 7698dbab | 08-Dec-2022 |
Lucas Stach <l.stach@pengutronix.de> |
feat(imx8mq): remove empty bl31_plat_runtime_setup
Having this empty definition is actively harmful, as it prevents the default weak function to be used, which does a switch of the console state.
S
feat(imx8mq): remove empty bl31_plat_runtime_setup
Having this empty definition is actively harmful, as it prevents the default weak function to be used, which does a switch of the console state.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Change-Id: I3b78e0c524c4907714036dba573a44d8f9c48b09
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| 202737ef | 08-Dec-2022 |
Lucas Stach <l.stach@pengutronix.de> |
feat(imx8mq): make IMX_BOOT_UART_BASE configurable via build parameter
This aligns the i.MX8MQ build with the other i.MX8M platforms by allowing to override the default IMX_BOOT_UART_BASE value via
feat(imx8mq): make IMX_BOOT_UART_BASE configurable via build parameter
This aligns the i.MX8MQ build with the other i.MX8M platforms by allowing to override the default IMX_BOOT_UART_BASE value via a make parameter.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Change-Id: Iad9b844517209fc7d051c61767f71ac9fa2b55c7
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| 6b3ca0a8 | 13-Dec-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(st-crypto): remove platdata functions
The functions stm32_pka_get_platdata() and stm32_saes_get_platdata() are not used. They can be removed as we always use DT to retrieve the device configurat
fix(st-crypto): remove platdata functions
The functions stm32_pka_get_platdata() and stm32_saes_get_platdata() are not used. They can be removed as we always use DT to retrieve the device configuration. This issue was triggered by sparse tool or when enabling warning -Wmissing-prototypes.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I5cce9a0765144d694e8ddece37361ccbb85d1734
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| 70a422ba | 12-Dec-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(st-crypto): set get_plain_pk_from_asn1() static
The issue is triggered when enabling -Wmissing-prototypes warning: plat/st/common/stm32mp_crypto_lib.c:81:5: warning: no previous prototype for '
fix(st-crypto): set get_plain_pk_from_asn1() static
The issue is triggered when enabling -Wmissing-prototypes warning: plat/st/common/stm32mp_crypto_lib.c:81:5: warning: no previous prototype for 'get_plain_pk_from_asn1' [-Wmissing-prototypes] 81 | int get_plain_pk_from_asn1(void *pk_ptr, unsigned int pk_len, | ^~~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: Ia36bbaba6e187ab47c203ddf0d7d017b210545cf
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| 6e55f9e2 | 18-Nov-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(stm32mp1): add missing platform.h include
This includes the functions definitions, and avoids sparse warnings: plat/st/stm32mp1/plat_image_load.c:13:6: warning: symbol 'plat_flush_next_bl_param
fix(stm32mp1): add missing platform.h include
This includes the functions definitions, and avoids sparse warnings: plat/st/stm32mp1/plat_image_load.c:13:6: warning: symbol 'plat_flush_next_bl_params' was not declared. Should it be static? plat/st/stm32mp1/plat_image_load.c:21:16: warning: symbol 'plat_get_bl_image_load_info' was not declared. Should it be static? plat/st/stm32mp1/plat_image_load.c:29:13: warning: symbol 'plat_get_next_bl_params' was not declared. Should it be static?
The issue was also found when enabling -Wmissing-prototypes warning: plat/st/stm32mp1/plat_image_load.c:13:6: error: no previous prototype for 'plat_flush_next_bl_params' [-Werror=missing-prototypes] 13 | void plat_flush_next_bl_params(void) | ^~~~~~~~~~~~~~~~~~~~~~~~~ plat/st/stm32mp1/plat_image_load.c:21:17: error: no previous prototype for 'plat_get_bl_image_load_info' [-Werror=missing-prototypes] 21 | bl_load_info_t *plat_get_bl_image_load_info(void) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~ plat/st/stm32mp1/plat_image_load.c:29:14: error: no previous prototype for 'plat_get_next_bl_params' [-Werror=missing-prototypes] 29 | bl_params_t *plat_get_next_bl_params(void) | ^~~~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I0bb3052f6efd888462eab2fd8f18862e7fbf02b9
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| d1d8a9ba | 18-Nov-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(st): make metadata_block_spec static
This issue was triggered by sparse tool: plat/st/common/stm32mp_fconf_io.c:31:17: warning: symbol 'metadata_block_spec' was not declared. Should it be stati
fix(st): make metadata_block_spec static
This issue was triggered by sparse tool: plat/st/common/stm32mp_fconf_io.c:31:17: warning: symbol 'metadata_block_spec' was not declared. Should it be static?
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I283d15792ed0e7ac5181e18aaf54010a0e61b370
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| abd6d7ea | 12-Dec-2022 |
Lauren Wehrmeister <lauren.wehrmeister@arm.com> |
Merge changes from topic "full_dev_rsa_key" into integration
* changes: docs(arm): add ARM_ROTPK_LOCATION variant full key feat(arm): add ARM_ROTPK_LOCATION variant full key |
| 78fbb0ec | 30-Nov-2022 |
Channagoud kadabi <kadabi@google.com> |
fix(gic): wrap cache enabled assert under plat_can_cmo
with reference to feature 04c730 (feat(cpus): make cache ops conditional), booting with caches in debug recovery means SCTLR_C_BIT will be 0. W
fix(gic): wrap cache enabled assert under plat_can_cmo
with reference to feature 04c730 (feat(cpus): make cache ops conditional), booting with caches in debug recovery means SCTLR_C_BIT will be 0. Wrap the assert for the d-cache enabled check in CONDITIONAL_CMO and plat_can_cmo calls to allow booting with d-cache disabled.
Signed-off-by: Channagoud kadabi <kadabi@google.com> Change-Id: I80153df493d1ec9e5e354c7c2e6a14322d22c446
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| 96851eeb | 12-Dec-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "fix_misra_st_drivers" into integration
* changes: fix(st-gpio): define shift as uint32_t fix(st-sdmmc): check transfer size before filling register |
| c781765e | 12-Dec-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(st): include utils.h to solve compilation error" into integration |
| 377846b6 | 12-Dec-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(st): include utils.h to solve compilation error
If compiling with STM32MP13 with DECRYPTION_SUPPORT != none, there is a compilation error: plat/st/common/stm32mp_crypto_lib.c: In function 'plat
fix(st): include utils.h to solve compilation error
If compiling with STM32MP13 with DECRYPTION_SUPPORT != none, there is a compilation error: plat/st/common/stm32mp_crypto_lib.c: In function 'plat_get_enc_key_info': plat/st/common/stm32mp_crypto_lib.c:532:25: error: implicit declaration of function 'zeromem' [-Werror=implicit-function-declaration] 532 | zeromem(key, *key_len); | ^~~~~~~
Adding #include <lib/utils.h> solves the error.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I0a20c5632f0379612149333e69875369d4cfca15
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| 291be198 | 07-Dec-2022 |
Boyan Karatotev <boyan.karatotev@arm.com> |
docs: describe the new warning levels
When -Wextra was added, the warning levels changed their meaning. Add a description in the build option section and leave the security hardening section as most
docs: describe the new warning levels
When -Wextra was added, the warning levels changed their meaning. Add a description in the build option section and leave the security hardening section as mostly a pointer to it.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: Iabf2f598d0bf3e865c9b991c5d44d2acb9572bd5
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| c0d68bbf | 12-Dec-2022 |
Joanna Farley <joanna.farley@arm.com> |
Merge "fix(xilinx): use lib/smccc.h macros instead of trusty spd" into integration |
| 0ee07d79 | 12-Dec-2022 |
Akshay Belsare <Akshay.Belsare@amd.com> |
fix(xilinx): use lib/smccc.h macros instead of trusty spd
There is no reason to use macros from trusty spd header and creating dependency on it. Use directly macros from lib/smccc.h
Co-developed-by
fix(xilinx): use lib/smccc.h macros instead of trusty spd
There is no reason to use macros from trusty spd header and creating dependency on it. Use directly macros from lib/smccc.h
Co-developed-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Akshay Belsare <akshay.belsare@amd.com> Change-Id: I7cf1f76a5358ffc297c914f41c437469f5a42411
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