1Xilinx Zynq UltraScale+ MPSoC 2============================= 3 4Trusted Firmware-A (TF-A) implements the EL3 firmware layer for Xilinx Zynq 5UltraScale + MPSoC. 6The platform only uses the runtime part of TF-A as ZynqMP already has a 7BootROM (BL1) and FSBL (BL2). 8 9BL31 is TF-A. 10BL32 is an optional Secure Payload. 11BL33 is the non-secure world software (U-Boot, Linux etc). 12 13To build: 14 15.. code:: bash 16 17 make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp RESET_TO_BL31=1 bl31 18 19To build bl32 TSP you have to rebuild bl31 too: 20 21.. code:: bash 22 23 make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp SPD=tspd RESET_TO_BL31=1 bl31 bl32 24 25To build TF-A for JTAG DCC console: 26 27.. code:: bash 28 29 make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp RESET_TO_BL31=1 bl31 ZYNQMP_CONSOLE=dcc 30 31ZynqMP platform specific build options 32-------------------------------------- 33 34- ``ZYNQMP_ATF_MEM_BASE``: Specifies the base address of the bl31 binary. 35- ``ZYNQMP_ATF_MEM_SIZE``: Specifies the size of the memory region of the bl31 binary. 36- ``ZYNQMP_BL32_MEM_BASE``: Specifies the base address of the bl32 binary. 37- ``ZYNQMP_BL32_MEM_SIZE``: Specifies the size of the memory region of the bl32 binary. 38 39- ``ZYNQMP_CONSOLE``: Select the console driver. Options: 40 41 - ``cadence``, ``cadence0``: Cadence UART 0 42 - ``cadence1`` : Cadence UART 1 43 44FSBL->TF-A Parameter Passing 45---------------------------- 46 47The FSBL populates a data structure with image information for TF-A. TF-A uses 48that data to hand off to the loaded images. The address of the handoff data 49structure is passed in the ``PMU_GLOBAL.GLOBAL_GEN_STORAGE6`` register. The 50register is free to be used by other software once TF-A has brought up 51further firmware images. 52 53Power Domain Tree 54----------------- 55 56The following power domain tree represents the power domain model used by TF-A 57for ZynqMP: 58 59:: 60 61 +-+ 62 |0| 63 +-+ 64 +-------+---+---+-------+ 65 | | | | 66 | | | | 67 v v v v 68 +-+ +-+ +-+ +-+ 69 |0| |1| |2| |3| 70 +-+ +-+ +-+ +-+ 71 72The 4 leaf power domains represent the individual A53 cores, while resources 73common to the cluster are grouped in the power domain on the top. 74 75CUSTOM SIP service support 76-------------------------- 77 78- Dedicated SMC FID ZYNQMP_SIP_SVC_CUSTOM(0x82002000)(32-bit)/ 79 (0xC2002000)(64-bit) to be used by a custom package for 80 providing CUSTOM SIP service. 81 82- by default platform provides bare minimum definition for 83 custom_smc_handler in this service. 84 85- to use this service, custom package should implement their 86 smc handler with the name custom_smc_handler. once custom package is 87 included in TF-A build, their definition of custom_smc_handler is 88 enabled. 89 90Custom package makefile fragment inclusion in TF-A build 91-------------------------------------------------------- 92 93- custom package is not directly part of TF-A source. 94 95- <CUSTOM_PKG_PATH> is the location at which user clones a 96 custom package locally. 97 98- custom package needs to implement makefile fragment named 99 custom_pkg.mk so as to get included in TF-A build. 100 101- custom_pkg.mk specify all the rules to include custom package 102 specific header files, dependent libs, source files that are 103 supposed to be included in TF-A build. 104 105- when <CUSTOM_PKG_PATH> is specified in TF-A build command, 106 custom_pkg.mk is included from <CUSTOM_PKG_PATH> in TF-A build. 107 108- TF-A build command: 109 make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp RESET_TO_BL31=1 110 bl31 CUSTOM_PKG_PATH=<...> 111