| b2258ce3 | 25-Apr-2023 |
Michal Simek <michal.simek@amd.com> |
feat(xilinx): move IPI related macros to plat_ipi.h
The reason is to have all IPI related macros in the same file.
Change-Id: I88ddaa3a5dd1f10114371fc5405f8daf148ca3b8 Signed-off-by: Michal Simek <
feat(xilinx): move IPI related macros to plat_ipi.h
The reason is to have all IPI related macros in the same file.
Change-Id: I88ddaa3a5dd1f10114371fc5405f8daf148ca3b8 Signed-off-by: Michal Simek <michal.simek@amd.com>
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| 570a2309 | 05-May-2023 |
Rob Hughes <robert.hughes@arm.com> |
fix(fiptool): move juno plat_fiptool.mk
plat_fiptool.mk files now need to be in tools/fiptool/plat_fiptool/, so this file has been moved to the new location so that it is picked up correctly by the
fix(fiptool): move juno plat_fiptool.mk
plat_fiptool.mk files now need to be in tools/fiptool/plat_fiptool/, so this file has been moved to the new location so that it is picked up correctly by the build system.
Change-Id: Id3596b08bc856362e300f3dfefcaab5d75b4c400 Signed-off-by: Rob Hughes <robert.hughes@arm.com>
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| ba56b012 | 15-May-2023 |
Prasad Kummari <prasad.kummari@amd.com> |
feat(versal-net): add the IPI CRC checksum macro support
Add support for CRC checksum for IPI data when the macro IPI_CRC_CHECK is enabled.
Change-Id: I14dee4729f88c407bafdf1d6b46106459d8e22c4 Sign
feat(versal-net): add the IPI CRC checksum macro support
Add support for CRC checksum for IPI data when the macro IPI_CRC_CHECK is enabled.
Change-Id: I14dee4729f88c407bafdf1d6b46106459d8e22c4 Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
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| 08d7a101 | 16-May-2023 |
Bipin Ravi <bipin.ravi@arm.com> |
Merge "docs(prerequisites): update software and libraries prerequisites" into integration |
| 0d7e702e | 12-May-2023 |
Govindraj Raja <govindraj.raja@arm.com> |
docs(prerequisites): update software and libraries prerequisites
Update to use the following software:
- mbed TLS == 3.4.0 - (DTC) >= 1.4.7 - Ubuntu 22.04 for builds.
Signed-off-by: Govindraj Raja
docs(prerequisites): update software and libraries prerequisites
Update to use the following software:
- mbed TLS == 3.4.0 - (DTC) >= 1.4.7 - Ubuntu 22.04 for builds.
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com> Change-Id: I384aab4dfee9cae9453eebf4091abe82ef9ccfaa
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| 2834bc6b | 16-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(tegra210): mark bits [23:17] as zero for Fast SMCs" into integration |
| 20304ce2 | 16-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "ja/mem_share_doc" into integration
* changes: docs(spm): threat model for memory sharing functionality docs(spm): add memory sharing documentation |
| 493d4223 | 16-May-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topics "plat_tests_scalability", "sb/tc-plat-tests" into integration
* changes: test(tc): unify platform tests traces test(tc): return test failures count for tfm-testsuite
Merge changes from topics "plat_tests_scalability", "sb/tc-plat-tests" into integration
* changes: test(tc): unify platform tests traces test(tc): return test failures count for tfm-testsuite test(tc): move platform tests in their own function test(tc): centralize platform error handling refactor(tc): define PLATFORM_TESTS for scale
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| a9779c11 | 15-May-2023 |
Andre Przywara <andre.przywara@arm.com> |
fix(brcm): fix misspelled header inclusion guard
The header inclusion guard for some header for the Broadcom Stingray board was misspelled.
Make the preprocessor symbol for the #ifndef and #define
fix(brcm): fix misspelled header inclusion guard
The header inclusion guard for some header for the Broadcom Stingray board was misspelled.
Make the preprocessor symbol for the #ifndef and #define lines the same, so that the double inclusion protection works as expected.
Change-Id: I19d73c854cd0689a248ce914ef35ae87c39ebf39 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| 9be6b168 | 10-May-2023 |
J-Alves <joao.alves@arm.com> |
feat: define memory ranges for tc platform
In [1] we missed to update the SPMC manifest for the TC platform, managing OPTEE as an SP.
[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-
feat: define memory ranges for tc platform
In [1] we missed to update the SPMC manifest for the TC platform, managing OPTEE as an SP.
[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/20107
Signed-off-by: J-Alves <joao.alves@arm.com> Change-Id: I68c2e0da6e63216c827f77b5b86afe9f5813e62f
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| 303ef33e | 05-May-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
test(tc): unify platform tests traces
Add some traces at the start and end of platform tests. These traces are the same regardless of the set of platform tests we run (NV counter tests / TF-M testsu
test(tc): unify platform tests traces
Add some traces at the start and end of platform tests. These traces are the same regardless of the set of platform tests we run (NV counter tests / TF-M testsuite / future set of tests).
This makes it easier to integrate these tests in the CI because we can now have a unified "expect" script for all platform tests, instead of having one dedicated "expect" script for each possible set of tests.
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Change-Id: I5ec30a7a25d8a9a4a90e3338a9789acff7ad4843
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| 26207c2d | 05-May-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
test(tc): return test failures count for tfm-testsuite
When running the "tfm-testsuite" set of platform tests, we now count the number of failed tests (in addition to printing a test summary) and re
test(tc): return test failures count for tfm-testsuite
When running the "tfm-testsuite" set of platform tests, we now count the number of failed tests (in addition to printing a test summary) and report that back to the caller, i.e. tc_bl31_common_platform_setup().
This will be useful to consolidate the tests failure reporting code in a subsequent patch.
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Change-Id: I8e51f03869f3b2f264b6581b3bd2a53be0198057
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| 4eefbf1b | 05-May-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
test(tc): move platform tests in their own function
This is a bit cleaner, as it avoids cluttering the normal boot execution path. It also gives us the opportunity to mark the tests function with th
test(tc): move platform tests in their own function
This is a bit cleaner, as it avoids cluttering the normal boot execution path. It also gives us the opportunity to mark the tests function with the __dead2 attribute, which inform both the compiler and the developer that the test function never returns (since it suspends booting).
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Change-Id: I082a34a840ef791a2ac4c1f59b19b32aeb0a9ec7
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| 57cc12c8 | 05-May-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
test(tc): centralize platform error handling
Note that this change only affects the platform tests execution path. It has no impact on the normal boot flow.
Make individual test functions propagate
test(tc): centralize platform error handling
Note that this change only affects the platform tests execution path. It has no impact on the normal boot flow.
Make individual test functions propagate an error code, instead of calling the platform error handler at the point of failure. The latter is now the responsibility of the caller - in this case tc_bl31_common_platform_setup().
Note that right now, tc_bl31_common_platform_setup() does not look at the said error code but this initial change opens up an opportunity to centralize any error handling in tc_bl31_common_platform_setup(), which we will seize in subsequent patches.
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Change-Id: Ib282b64039e0b1ec6e6d29476fbaa2bcd33cb0c7
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| cc60aba2 | 23-Feb-2023 |
Harrison Mutai <harrison.mutai@arm.com> |
feat(memmap): add topological memory view
Present memory usage in hierarchical view. This view maps modules to their respective segments and sections.
Change-Id: I5c374b46738edbc83133441ff3f4268f08
feat(memmap): add topological memory view
Present memory usage in hierarchical view. This view maps modules to their respective segments and sections.
Change-Id: I5c374b46738edbc83133441ff3f4268f08cb011d Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| fcb72e16 | 19-Apr-2023 |
Harrison Mutai <harrison.mutai@arm.com> |
build(bl32): add symbols for memory layout
Add symbols for mapping the physical memory layout of BL32. There are symbols that partially satisfy this requirement, however, the naming of these is inco
build(bl32): add symbols for memory layout
Add symbols for mapping the physical memory layout of BL32. There are symbols that partially satisfy this requirement, however, the naming of these is inconsistent.
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com> Change-Id: I106187f93b227d604bda650892f9e919047b3fc7
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| d9d5eb13 | 23-Feb-2023 |
Harrison Mutai <harrison.mutai@arm.com> |
feat(memmap): add tabular memory use data
Add support for tabulating static memory consumption data from ELF binaries. This relies on static symbols, defined in the linker files, that provide inform
feat(memmap): add tabular memory use data
Add support for tabulating static memory consumption data from ELF binaries. This relies on static symbols, defined in the linker files, that provide information about the memory ranges.
Change-Id: Ie19cd2b80a7b591607640feeb84c63266963ea4d Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| 9b5498a7 | 19-Apr-2023 |
Harrison Mutai <harrison.mutai@arm.com> |
build(bl31): add symbols for memory layout
Add symbols for mapping the physical memory layout of BL31. There are symbols that partially satisfy this requirement, however, the naming of these is inco
build(bl31): add symbols for memory layout
Add symbols for mapping the physical memory layout of BL31. There are symbols that partially satisfy this requirement, however, the naming of these is inconsistent.
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com> Change-Id: I413cc4e9d7471582eed61d631bed6214bd17a564
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| f6088168 | 19-Apr-2023 |
Harrison Mutai <harrison.mutai@arm.com> |
build(bl2): add symbols for memory layout
Add symbols for mapping the physical memory layout of BL2. There are symbols that partially satisfy this requirement, however, the naming of these is incons
build(bl2): add symbols for memory layout
Add symbols for mapping the physical memory layout of BL2. There are symbols that partially satisfy this requirement, however, the naming of these is inconsistent.
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com> Change-Id: I83ce5e3f5c45b71022279649f823ed0cb33a145d
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| 5e7e8bfa | 19-Apr-2023 |
Harrison Mutai <harrison.mutai@arm.com> |
build(bl1): add symbols for memory layout
Add symbols for mapping the physical memory layout of BL1. There are symbols that partially satisfy this requirement, however, the naming of these is incons
build(bl1): add symbols for memory layout
Add symbols for mapping the physical memory layout of BL1. There are symbols that partially satisfy this requirement, however, the naming of these is inconsistent.
Change-Id: I615a7eb28d17e4c2983636ec021124de304573df Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| af5b49e9 | 23-Feb-2023 |
Harrison Mutai <harrison.mutai@arm.com> |
refactor: improve readability of symbol table
Make the symbol table produced by the memory mapping script more readable. Add a generic interface for interacting with ELF binaries. This interface ena
refactor: improve readability of symbol table
Make the symbol table produced by the memory mapping script more readable. Add a generic interface for interacting with ELF binaries. This interface enables us to get symbols that provide some insights into TF-A's memory usage.
Change-Id: I6646f817a1d38d6184b837b78039b7465a533c5c Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| cb6c8efc | 24-Apr-2023 |
Kalyani Chidambaram Vaidyanathan <kalyanic@nvidia.com> |
fix(tegra210): mark bits [23:17] as zero for Fast SMCs
Per SMCCC documentation, bits [23:17] must be zero for Fast SMCs. Other values are reserved for future use. Ensure that these bits are zeroes f
fix(tegra210): mark bits [23:17] as zero for Fast SMCs
Per SMCCC documentation, bits [23:17] must be zero for Fast SMCs. Other values are reserved for future use. Ensure that these bits are zeroes for TEGRA_SIP_PMC_COMMANDS.
Commit f8a35797 introduced a check to return error if these bits are not zero, thus breaking Tegra210 platforms. This patch fixes the anomaly.
Change-Id: I19edc3b33c999a6fee6b86184233fba146316466 Signed-off-by: Kalyani Chidambaram Vaidyanathan <kalyanic@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| 24566a3f | 12-May-2023 |
Harrison Mutai <harrison.mutai@arm.com> |
docs: fix syntax error in note
Change-Id: Ibd4599c761641431e02778bd65c2696fb886a326 Signed-off-by: Harrison Mutai <harrison.mutai@arm.com> |
| ff8f1c5f | 05-Dec-2022 |
J-Alves <joao.alves@arm.com> |
docs(spm): threat model for memory sharing functionality
Update the SPM threat model with information about FF-A v1.1 memory sharing functionality.
Change-Id: I65ea0d53aba8ac2f8432539968ceaab6be109
docs(spm): threat model for memory sharing functionality
Update the SPM threat model with information about FF-A v1.1 memory sharing functionality.
Change-Id: I65ea0d53aba8ac2f8432539968ceaab6be109ac8 Signed-off-by: J-Alves <joao.alves@arm.com>
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| cc63ff97 | 26-Oct-2022 |
J-Alves <joao.alves@arm.com> |
docs(spm): add memory sharing documentation
Add documentation that explains implementation specific relevant information from the update done to FF-A v1.1 memory sharing in Hafnium.
Change-Id: Ifc3
docs(spm): add memory sharing documentation
Add documentation that explains implementation specific relevant information from the update done to FF-A v1.1 memory sharing in Hafnium.
Change-Id: Ifc3c6b86c0545d53331207b017b990427ee84f2d Signed-off-by: J-Alves <joao.alves@arm.com>
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