Merge "fix(docs): fix some broken links" into integration

fix(lfa): check error code from plat_lfa_load_auth_image

This patch checks the return values from plat_lfa_load_auth_image and
returns an LFA* error code to the caller, if required.

Change-Id: I7c1

fix(lfa): check error code from plat_lfa_load_auth_image

This patch checks the return values from plat_lfa_load_auth_image and
returns an LFA* error code to the caller, if required.

Change-Id: I7c1cad8e5f24b0e4cfdf2667adeed30c4d33bda0
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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fix(imx): match function parameters to declaration

The gic helpers always take core_pos as an argument.

Change-Id: I92c3e293c03ae788e6eaa0d251c9867d53c3139f
Signed-off-by: Boyan Karatotev <boyan.ka

fix(imx): match function parameters to declaration

The gic helpers always take core_pos as an argument.

Change-Id: I92c3e293c03ae788e6eaa0d251c9867d53c3139f
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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fix(intel): match declaration with definition

Patch 2fcb37db8 changed the alignment to 8, but the `extern` definition
remained at 32 so bring in line. Also use the same macro for the size of
the arr

fix(intel): match declaration with definition

Patch 2fcb37db8 changed the alignment to 8, but the `extern` definition
remained at 32 so bring in line. Also use the same macro for the size of
the array.

Change-Id: I95149f5e3428a58c464e616c385250b10eda2834
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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Merge changes from topic "gr/cpu_lib" into integration

* changes:
feat(cpus): add support for caddo cpu
feat(cpus): add support for veymont cpu

Merge changes Id711e387,I531a2ee1,Ic5b48514,I81f5f663,I6c529c13, ... into integration

* changes:
refactor(romlib): absorb WRAPPER_FLAGS into LDFLAGS
fix(build): simplify the -target options
fe

Merge changes Id711e387,I531a2ee1,Ic5b48514,I81f5f663,I6c529c13, ... into integration

* changes:
refactor(romlib): absorb WRAPPER_FLAGS into LDFLAGS
fix(build): simplify the -target options
feat(build): allow full LTO builds with clang
refactor(build): make sorting of sections generic
feat(build): use clang as a linker
fix(build): correctly detect that an option is missing with ld_option
feat(build): pass cflags to the linker when LTO is enabled

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Merge changes from topic "gr/spectre_bhb_updates" into integration

* changes:
fix(security): fix Neoverse V2 CVE-2022-23960
fix(security): fix Cortex-X3 CVE-2022-23960
fix(security): fix Corte

Merge changes from topic "gr/spectre_bhb_updates" into integration

* changes:
fix(security): fix Neoverse V2 CVE-2022-23960
fix(security): fix Cortex-X3 CVE-2022-23960
fix(security): fix Cortex-A715 CVE-2022-23960
fix(security): fix spectre bhb loop count for Cortex-A720

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fix(cm): correctly restore BL2's context

We have a single context management library but two BLs that use it very
differently - BL1 and BL31. Configuring it correctly is quite tricky as
in the BL1 +

fix(cm): correctly restore BL2's context

We have a single context management library but two BLs that use it very
differently - BL1 and BL31. Configuring it correctly is quite tricky as
in the BL1 + BL2 + BL31 + spmd case we have it operate on both EL1 and
EL2 context (for BL1 and BL31 respectively).

Welp, we've got that wrong - BL1 will skip EL1's register initialisation
leaving it at the mercy of UNKNOWN registers' values. If they aren't as
we expect, things don't go well.

This is not the end of the world as BL1 is expected to be the first
thing to run and UNKNOWN values generally reset to things we find
acceptable. But add the correct BL1 carveouts so they are set up
correctly.

Change-Id: Ia0d5522ac0c9f4616dd124b10f0c2fdc823a0d87
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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Merge changes I769ac07f,Ia52ad5ed,I5d22ff86,Iea14d49c into integration

* changes:
fix(build): prevent races on the build directory
refactor(build): make it standard to request a custom linker sc

Merge changes I769ac07f,Ia52ad5ed,I5d22ff86,Iea14d49c into integration

* changes:
fix(build): prevent races on the build directory
refactor(build): make it standard to request a custom linker script
perf(bl32): don't call cm_get_context() unnecessarily
refactor(bl1): simplify context getting and setting

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Merge changes from topic "imx8m-rdc" into integration

* changes:
refactor(imx8m): simplify RDC console config
fix(imx8m): add RDC entries for all missing UARTs

Merge "fix(nxp): tbbr: adds snvs_init" into integration

Merge "feat(flexspi): add 128Mbytes flash info" into integration

fix(nxp): tbbr: adds snvs_init

Fix to initialize the SNVS driver as part of soc early init, that sets
the snvs base address to read or write to the memory mapped registers of
SNVS IP.

Change-Id: I6

fix(nxp): tbbr: adds snvs_init

Fix to initialize the SNVS driver as part of soc early init, that sets
the snvs base address to read or write to the memory mapped registers of
SNVS IP.

Change-Id: I6ebd1d17302647487ec786f5e20f51450ce29473
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>

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feat(flexspi): add 128Mbytes flash info

Those 4 nor flash have the same geometry:
Micron MT25QU01GBBB
GigaDevice GD55LB01GF
Macronix MX66U1G45G
Winbond W25Q01NW

Signed-off-by: Vincent Jardi

feat(flexspi): add 128Mbytes flash info

Those 4 nor flash have the same geometry:
Micron MT25QU01GBBB
GigaDevice GD55LB01GF
Macronix MX66U1G45G
Winbond W25Q01NW

Signed-off-by: Vincent Jardin <vjardin@free.fr>
Change-Id: Iff74461ef3b252fc0f07745317d9860bd42c1ba1

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Merge "fix(nxp-ddr): add missing macro define for Errata A009663" into integration

fix(build): prevent races on the build directory

The tools (eg fiptool) don't depend on the build directory so it's
possible that make tries to build them before it exists. Doing that
leads to rando

fix(build): prevent races on the build directory

The tools (eg fiptool) don't depend on the build directory so it's
possible that make tries to build them before it exists. Doing that
leads to random and unpredictable errors. Almost always, they are built
after a BL image which always has a build directory dependency, but
when building MANY tf-a builds over MANY threads concurrently this could
be observed (I suspect the high load of the system increases latency
just enough that this race is lost).

The fix is simple - have an explicit dependency on the build directory.

This is the same problem as 9855568cc and 25cde5f81.

Change-Id: I769ac07f8882f82ea9d72f3b976337284d697310
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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refactor(build): make it standard to request a custom linker script

Hoist the add_define to a global location so that platforms only have to
declare its usage. Fix up #ifdef to #if since we will now

refactor(build): make it standard to request a custom linker script

Hoist the add_define to a global location so that platforms only have to
declare its usage. Fix up #ifdef to #if since we will now always pass a
definition.

Change-Id: Ia52ad5ed4dcbd157d139c8ca2fb3d35b32343b93
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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perf(bl32): don't call cm_get_context() unnecessarily

We already have the result, all that's needed is to store and reuse it.

Change-Id: I5d22ff862421688d160f43d296c84454155378a4
Signed-off-by: Boy

perf(bl32): don't call cm_get_context() unnecessarily

We already have the result, all that's needed is to store and reuse it.

Change-Id: I5d22ff862421688d160f43d296c84454155378a4
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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refactor(bl1): simplify context getting and setting

BL1 has no need to support cm_set_context() as that is only needed by
runtime services which BL1 doesn't provide. So the context can be
simplified

refactor(bl1): simplify context getting and setting

BL1 has no need to support cm_set_context() as that is only needed by
runtime services which BL1 doesn't provide. So the context can be
simplified to make it easier to understand.

Change-Id: Iea14d49c973436afad40cd41d1159b2abf51c65d
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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Merge changes from topic "xlnx_remove_abort_suspend" into integration

* changes:
fix(versal-net): remove client-side code of PM_ABORT_SUSPEND
fix(versal): remove client-side implementation of PM

Merge changes from topic "xlnx_remove_abort_suspend" into integration

* changes:
fix(versal-net): remove client-side code of PM_ABORT_SUSPEND
fix(versal): remove client-side implementation of PM_ABORT_SUSPEND
fix(xilinx): remove PM_ABORT_SUSPEND API implementation
fix(zynqmp): remove PM_ABORT_SUSPEND API implementation
fix(versal2): remove PM_ABORT_SUSPEND API implementation

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Merge "feat(imx9): add full system power control option" into integration

feat(imx9): add full system power control option

Add an optional build-time configuration to enable full system
shutdown and reset control through SCMI.

By default, only logical machine (cluster-le

feat(imx9): add full system power control option

Add an optional build-time configuration to enable full system
shutdown and reset control through SCMI.

By default, only logical machine (cluster-level) power-off and
reset are performed. When the SYS_PWR_FULL_CTRL option is set,
the PSCI implementation uses the full system power control
commands instead, allowing a complete system shutdown and reset.

Tested on iMX95 based modules.

Change-Id: I56b31f9b91def31784857f5a299c69f68db706a4
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>

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fix(versal-net): remove client-side code of PM_ABORT_SUSPEND

PM_ABORT_SUSPEND API is removed; client-side implementation is no
longer needed.

Change-Id: If2559ca106dbb60d761d0f8c7deeb86c1f30af16
Si

fix(versal-net): remove client-side code of PM_ABORT_SUSPEND

PM_ABORT_SUSPEND API is removed; client-side implementation is no
longer needed.

Change-Id: If2559ca106dbb60d761d0f8c7deeb86c1f30af16
Signed-off-by: Madhav Bhatt <madhav.bhatt@amd.com>

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fix(versal): remove client-side implementation of PM_ABORT_SUSPEND

PM_ABORT_SUSPEND API is removed; client-side implementation is no
longer needed.

Change-Id: I34ac563b88b98e484cf33993545c0151db936

fix(versal): remove client-side implementation of PM_ABORT_SUSPEND

PM_ABORT_SUSPEND API is removed; client-side implementation is no
longer needed.

Change-Id: I34ac563b88b98e484cf33993545c0151db9362e0
Signed-off-by: Madhav Bhatt <madhav.bhatt@amd.com>

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fix(xilinx): remove PM_ABORT_SUSPEND API implementation

The API is not getting called by Linux. Removing it to reduce dead
code and improve maintainability.

Note: This change removes code that is c

fix(xilinx): remove PM_ABORT_SUSPEND API implementation

The API is not getting called by Linux. Removing it to reduce dead
code and improve maintainability.

Note: This change removes code that is common between versal and
versal_net.

Change-Id: Ia7bfbcf2bbf80309beda7f8fa1ecf87de2591e2e
Signed-off-by: Madhav Bhatt <madhav.bhatt@amd.com>

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