refactor(gicv3): introducing is_valid_interrupt, a new helper utility

In gicv3_main.c the function is_sgi_ppi() returns true when its
sgi/ppi or false when the interrupt number matches an spi interr

refactor(gicv3): introducing is_valid_interrupt, a new helper utility

In gicv3_main.c the function is_sgi_ppi() returns true when its
sgi/ppi or false when the interrupt number matches an spi interrupt.
Introducing a new API is_valid_interrupt() which validates if
an interrupt number matches SGI/PPI or SPI as a valid interrupt,
any other interrupt number is considered invalid and panics.

Change-Id: Idce8f5432a94c8d300b9408cf5b2502c60e13318
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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fix(fvp): permit enabling SME for SPD=spmd

Essentially revert [1] to permit specifying SME support along with
SPD=spmd on FVP platform.

[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmwar

fix(fvp): permit enabling SME for SPD=spmd

Essentially revert [1] to permit specifying SME support along with
SPD=spmd on FVP platform.

[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/20764

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: Iab15d5a4c966b9f5b265ccde6711765e242abeaa

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feat(spmd): pass SMCCCv1.3 SVE hint to lower EL

A normal world caller can emit an SMC with the SVE hint bit set such
that the callee can perform an optimization by omitting to save/restore
the SVE c

feat(spmd): pass SMCCCv1.3 SVE hint to lower EL

A normal world caller can emit an SMC with the SVE hint bit set such
that the callee can perform an optimization by omitting to save/restore
the SVE context. Update the SPMD to pass this information to the SPMC
when set by the caller in the SMC flags parameter.
For now, restrict this behavior to the SPMC living at S-EL2.

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: Icf46eb8a391dd3ddd2ee6aff8581a2f1c8a1c274

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Merge changes from topic "ja/spm_rme" into integration

* changes:
docs: change FVP argument in RME configuration
feat(fvp): added calls to unprotect/protect memory

Merge "docs: fix link to TBBR specification" into integration

Merge "fix(cpus): workaround for Cortex-A715 erratum 2561034" into integration

fix(rss): fix bound check during protocol selection

Fix the wrong placement of the closing parenthesis in the second
condition check that resulted in the incorrect calculation of the MHU
message siz

fix(rss): fix bound check during protocol selection

Fix the wrong placement of the closing parenthesis in the second
condition check that resulted in the incorrect calculation of the MHU
message size. Also, format the code for readability.

Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Change-Id: I0e012f3ff00bae2dfc12cdb1c2c636fc6c0a0b55

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fix(mhuv2): provide only the usable size of memory

The function mhu_get_max_message_size() for MHUv2 should return only the
available memory for use after considering all the overheads for its own
u

fix(mhuv2): provide only the usable size of memory

The function mhu_get_max_message_size() for MHUv2 should return only the
available memory for use after considering all the overheads for its own
use.

Signed-off-by: Sathyam Panda <sathyam.panda@arm.com>
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Change-Id: I14ad16e8f4b781e396bca6173077513db74157d5

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Merge "fix(rockchip): fix documentation in how build bl31 in AARCH64" into integration

Merge changes from topic "jc/psci_spe" into integration

* changes:
fix(spe): invoke spe_disable during power domain off/suspend
feat(psci): add psci_do_manage_extensions API
fix(arm_fpga): hal

Merge changes from topic "jc/psci_spe" into integration

* changes:
fix(spe): invoke spe_disable during power domain off/suspend
feat(psci): add psci_do_manage_extensions API
fix(arm_fpga): halve number of PEs per core

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build: use toolchain identifiers in conditions

The toolchain refactor change introduces the `${toolchain}-${tool}-id`
variables, which provide identifiers for all of the toolchain tools used
by the

build: use toolchain identifiers in conditions

The toolchain refactor change introduces the `${toolchain}-${tool}-id`
variables, which provide identifiers for all of the toolchain tools used
by the build system. This change replaces the various conditions that
are in use to identify these tools based on the path with a standard set
of comparisons against these new identifier variables.

Change-Id: Ib60e592359fa6e415c19a012e68d660f87436ca7
Signed-off-by: Chris Kay <chris.kay@arm.com>

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build: use new toolchain variables for tools

This change migrates the values of `CC`, `CPP`, `AS` and other toolchain
variables to the new `$(toolchain)-$(tool)` variables, which were
introduced by

build: use new toolchain variables for tools

This change migrates the values of `CC`, `CPP`, `AS` and other toolchain
variables to the new `$(toolchain)-$(tool)` variables, which were
introduced by the toolchain refactor patch. These variables should be
equivalent to the values that they're replacing.

Change-Id: I644fe4ce82ef1894bed129ddb4b6ab94fb04985d
Signed-off-by: Chris Kay <chris.kay@arm.com>

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build: refactor toolchain detection

This change refactors how we identify the toolchain, with the ultimate
aim of eventually cleaning up the various mechanisms that we employ to
configure default to

build: refactor toolchain detection

This change refactors how we identify the toolchain, with the ultimate
aim of eventually cleaning up the various mechanisms that we employ to
configure default tools, identify the tools in use, and configure
toolchain flags.

To do this, we introduce three new concepts in this change:

- Toolchain identifiers,
- Tool class identifiers, and
- Tool identifiers.

Toolchain identifiers identify a configurable chain of tools targeting
one platform/machine/architecture. Today, these are:

- The host machine, which receives the `host` identifier,
- The AArch32 architecture, which receives the `aarch32` identifier, and
- The AArch64 architecture, which receivs the `aarch64` identifier.

The tools in a toolchain may come from different vendors, and are not
necessarily expected to come from one single toolchain distribution. In
most cases it is perfectly valid to mix tools from different toolchain
distributions, with some exceptions (notably, link-time optimization
generally requires the compiler and the linker to be aligned).

Tool class identifiers identify a class (or "role") of a tool. C
compilers, assemblers and linkers are all examples of tool classes.

Tool identifiers identify a specific tool recognized and supported by
the build system. Every tool that can make up a part of a toolchain must
receive a tool identifier.

These new identifiers can be used to retrieve information about the
toolchain in a more standardized fashion.

For example, logic in a Makefile that should only execute when the C
compiler is GNU GCC can now check the tool identifier for the C compiler
in the relevant toolchain:

ifeq ($($(ARCH)-cc-id),gnu-gcc)
...
endif

Change-Id: Icc23e43aaa32f4fd01d8187c5202f5012a634e7c
Signed-off-by: Chris Kay <chris.kay@arm.com>

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docs: change FVP argument in RME configuration

In RME documentation use "bp.secure_memory=0" to disable TZC,
and avoid conflicts with SPM in 4-world configuration.

Signed-off-by: J-Alves <joao.alve

docs: change FVP argument in RME configuration

In RME documentation use "bp.secure_memory=0" to disable TZC,
and avoid conflicts with SPM in 4-world configuration.

Signed-off-by: J-Alves <joao.alves@arm.com>
Change-Id: I532bca8ab3bd3e6d4f18b5aa7e848c533e016f39

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feat(fvp): added calls to unprotect/protect memory

Added SiP calls to FVP platform to protect/unprotect a
memory range.
These leverage rme features to change the PAS of a given
memory range from non

feat(fvp): added calls to unprotect/protect memory

Added SiP calls to FVP platform to protect/unprotect a
memory range.
These leverage rme features to change the PAS of a given
memory range from non-secure to secure.

The mentioned call is leveraged by the SPMC in the memory
sharing flow, when memory is shared from the normal world
onto the secure world.

More details in the SPM related patches.

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Signed-off-by: J-Alves <joao.alves@arm.com>
Change-Id: Iaf15d8603a549d247ffb1fc14c16bfb94d0e178a

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fix(cpus): workaround for Cortex-A715 erratum 2561034

Cortex-A715 erratum 2561034 is a Cat B erratum that applies to
revision r1p0 and is fixed in r1p1.

The workaround is to set bit[26] in CPUACTLR

fix(cpus): workaround for Cortex-A715 erratum 2561034

Cortex-A715 erratum 2561034 is a Cat B erratum that applies to
revision r1p0 and is fixed in r1p1.

The workaround is to set bit[26] in CPUACTLR2_EL1. Setting this
bit is not expected to have a significant performance impact.

SDEN documentation:
https://developer.arm.com/documentation/SDEN2148827/latest

Change-Id: I377f250a2994b6ced3ac7d93f947af6ceb690d49
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>

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Merge "feat(fvp): delegate FFH RAS handling to SP" into integration

Merge changes from topic "gr/build_refac" into integration

* changes:
refactor(build): minor updates
refactor(build): remove enabling feat
fix(build): march handling with arch-features
refac

Merge changes from topic "gr/build_refac" into integration

* changes:
refactor(build): minor updates
refactor(build): remove enabling feat
fix(build): march handling with arch-features
refactor(build): refactor mandatory options

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feat(stm32mp2): add STM32MP_USB_PROGRAMMER compilation

Add minimal compilation step when enabling STM32MP_USB_PROGRAMMER flag
on STM32MP2. Add DWL_BUFFER_BASE in platform.mk and the compilation
of t

feat(stm32mp2): add STM32MP_USB_PROGRAMMER compilation

Add minimal compilation step when enabling STM32MP_USB_PROGRAMMER flag
on STM32MP2. Add DWL_BUFFER_BASE in platform.mk and the compilation
of the new file plat/st/stm32mp2/stm32mp2_usb_dfu.c (just stubs for
the moment).

Signed-off-by: Pankaj Dev <pankaj.dev@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I8891ff23ddc3d40d7477ada3e49e439dd8af8316

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refactor(st): move macros to common folder

As these definitions will be the same for STM32MP1 and STM32MP2, move
PLATFORM_MTD_MAX_PAGE_SIZE and DWL_BUFFER_SIZE macro definition to the
file: plat/st/

refactor(st): move macros to common folder

As these definitions will be the same for STM32MP1 and STM32MP2, move
PLATFORM_MTD_MAX_PAGE_SIZE and DWL_BUFFER_SIZE macro definition to the
file: plat/st/common/include/stm32mp_common.h

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I480669d009d15fec753298f47b136e34fa240132

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refactor(stm32mp1): remove unused macros

PLAT_STM32MP_NS_IMAGE_OFFSET and PLAT_EMMC_BOOT_SSBL_OFFSET macros should
have been removed with patch [1].

[1] 981b9dcb87 ("refactor(stm32mp1): remove STM3

refactor(stm32mp1): remove unused macros

PLAT_STM32MP_NS_IMAGE_OFFSET and PLAT_EMMC_BOOT_SSBL_OFFSET macros should
have been removed with patch [1].

[1] 981b9dcb87 ("refactor(stm32mp1): remove STM32MP_USE_STM32IMAGE")

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ice98c43c0257041226525199be06134fde8466c5

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fix(usb): add missing include

When trying to compile USB stack for STM32MP2, the following warning
happens:
In file included from plat/st/stm32mp2/stm32mp2_usb_dfu.c:7:
include/drivers/usb_device.h:

fix(usb): add missing include

When trying to compile USB stack for STM32MP2, the following warning
happens:
In file included from plat/st/stm32mp2/stm32mp2_usb_dfu.c:7:
include/drivers/usb_device.h:193:9: error: unknown type name 'bool'
193 | bool is_in;

Correct it by adding: #include <stdbool.h>

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: If17e4e269fcdc885e42f5fcad9cfb763829786e4

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Revert "fix(ti): do not take system power reference in bl31_platform_setup()"

The workaround that we required to get over the timing issue with our
Device Manager is fixed in [0], revert the workaro

Revert "fix(ti): do not take system power reference in bl31_platform_setup()"

The workaround that we required to get over the timing issue with our
Device Manager is fixed in [0], revert the workaround as it is no longer
required.

[0]: https://git.ti.com/cgit/processor-firmware/ti-linux-firmware/commit?id=9ad862b528112f7bc26d80668fbb9b38521cddf9

This reverts commit 9977948112d732935362a3fe8518e3b2e4b7f6b7. It also
adds a check to make this backward compatible.

Change-Id: Icf10f9df9558de1ae7ba6f5f586485111aac4f8d
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>

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refactor(ti): remove ti_sci_init function

ti_sci_get_revision handles getting the firmware version and ti_sci_init
is just a wrapper around it with no added benefit.

Refactor the ti_sci_get_revisio

refactor(ti): remove ti_sci_init function

ti_sci_get_revision handles getting the firmware version and ti_sci_init
is just a wrapper around it with no added benefit.

Refactor the ti_sci_get_revision to give the version information and
remove ti_sci_init wrapper.

Change-Id: I39184af5b00bedc8b9220533f1ddac3b6672d2f1
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>

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Merge "feat(spmd): initialize SCR_EL3.EEL2 bit at RESET" into integration