| 2c406dda | 16-Aug-2023 |
Kshitij Sisodia <kshitij.sisodia@arm.com> |
feat(tc): interrupt numbers for `smmu_700`
Interrupt numbers definitions and names added to `smmu_700` node.
Signed-off-by: Kshitij Sisodia <kshitij.sisodia@arm.com> Change-Id: Iee0b5e854e5516fce13
feat(tc): interrupt numbers for `smmu_700`
Interrupt numbers definitions and names added to `smmu_700` node.
Signed-off-by: Kshitij Sisodia <kshitij.sisodia@arm.com> Change-Id: Iee0b5e854e5516fce13315c1e6ad5bb2a55246ec
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| 127eabed | 26-Jul-2023 |
Ben Horgan <ben.horgan@arm.com> |
feat(tc): enable gpu/dpu scmi power domain and also gpu perf domain
The scmi-perf-domain property is a custom property while we wait for proper support in the kernel for using the scmi_pm_domain dri
feat(tc): enable gpu/dpu scmi power domain and also gpu perf domain
The scmi-perf-domain property is a custom property while we wait for proper support in the kernel for using the scmi_pm_domain driver and scmi_perf_domain driver at the same time.
GPU operating points are now in the SCP firmware.
Change-Id: Ib6d8f52c8bf69194b1d2da4e065a34c4a341c221 Signed-off-by: Ben Horgan <ben.horgan@arm.com>
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| 29872eb3 | 09-Feb-2024 |
Olivier Deprez <olivier.deprez@arm.com> |
fix(spm): reduce verbosity on passing tf-a-tests
Reduce info messages verbosity for RME test cases:
INFO: Sip Call - Protect memory INFO: Sip Call - Unprotect memory INFO: Sip Call - Prote
fix(spm): reduce verbosity on passing tf-a-tests
Reduce info messages verbosity for RME test cases:
INFO: Sip Call - Protect memory INFO: Sip Call - Unprotect memory INFO: Sip Call - Protect memory INFO: Sip Call - Unprotect memory
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I0bdb545bc6576110dd740ecda8130618f51ed710
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| 885e93f9 | 22-Feb-2024 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "fix(cm): update gic el2 sysregs save/restore mechanism" into integration |
| 81f0f8c3 | 22-Feb-2024 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "jc/el1_ctx_optimization" into integration
* changes: refactor(context-mgmt): remove el1_context routines from RMM refactor(context-mgmt): move EL1 save/restore routines
Merge changes from topic "jc/el1_ctx_optimization" into integration
* changes: refactor(context-mgmt): remove el1_context routines from RMM refactor(context-mgmt): move EL1 save/restore routines into C
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| e58daa66 | 12-Sep-2023 |
Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> |
refactor(context-mgmt): remove el1_context routines from RMM
This is an effort to optimise the unused members in the cpu_context_t structure. TF-A statically allocates memory for context entry for e
refactor(context-mgmt): remove el1_context routines from RMM
This is an effort to optimise the unused members in the cpu_context_t structure. TF-A statically allocates memory for context entry for each wolrd per PE. Some of the members in this struct are not used for all the build combinations.
RMM in particular, is not using this context member and henceforth removing them.
Change-Id: Ia5bf9c8dfef6e856ba6d88fa678876c704d42858 Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
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| 59f8882b | 08-Jan-2024 |
Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> |
refactor(context-mgmt): move EL1 save/restore routines into C
Similar to the refactoring process followed for EL2 system registers, moving the save and restore routines of EL1 system registers into
refactor(context-mgmt): move EL1 save/restore routines into C
Similar to the refactoring process followed for EL2 system registers, moving the save and restore routines of EL1 system registers into C file, thereby reducing assembly code.
Change-Id: Ib59fbbe2eef2aa815effe854cf962fc4ac62a2ae Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
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| 75414f71 | 03-Feb-2024 |
Rohit Mathew <Rohit.Mathew@arm.com> |
refactor(sgi): replace references to "SGI"/"sgi" for neoverse_rd
Currently, there are several reference to "SGI" or "sgi" in comments or as macro prefix within the neoverse_rd directory. As part of
refactor(sgi): replace references to "SGI"/"sgi" for neoverse_rd
Currently, there are several reference to "SGI" or "sgi" in comments or as macro prefix within the neoverse_rd directory. As part of the migration to neoverse_rd, rename all occurences of "SGI/sgi" to "Neoverse-RD" or the "NRD" prefix accordingly. All references in comments are rephrased as "Neoverse RD platforms". References in code are renamed as "NRD"/"nrd" accordingly.
Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com> Change-Id: Iec195427ff2bee565cb4a325a1a22892be95ae16
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| 2cd66a44 | 03-Feb-2024 |
Rohit Mathew <Rohit.Mathew@arm.com> |
refactor(sgi): rename "CSS_SGI"" macro prefixes to "NRD"
As of now, several internal macros utilize "CSS_SGI" as their prefix. Given the change to neoverse_rd, and the subsequent migration out of th
refactor(sgi): rename "CSS_SGI"" macro prefixes to "NRD"
As of now, several internal macros utilize "CSS_SGI" as their prefix. Given the change to neoverse_rd, and the subsequent migration out of the css directory, the prefix "CSS_SGI" is no longer appropriate. Therefore, update the macro prefixes to "NRD" for consistency and clarity.
Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com> Change-Id: I3d1a9dba3e83f6e107379fc5bcf8256cc93d8c3d
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| 40ea4208 | 03-Feb-2024 |
Rohit Mathew <Rohit.Mathew@arm.com> |
refactor(sgi): move apis and types to "nrd" prefix
Currently, functions and types internal to "neoverse_rd" platforms are named with "sgi" as the prefix. Since common code and platforms are no longe
refactor(sgi): move apis and types to "nrd" prefix
Currently, functions and types internal to "neoverse_rd" platforms are named with "sgi" as the prefix. Since common code and platforms are no longer under the "sgi" umbrella, move the prefix to "nrd". This change would amend the prefixes for functions, types and objects.
Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com> Change-Id: I706a82bddf55c3be7cf9cef9aaa5df6d420098ca
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| a1e6467b | 03-Feb-2024 |
Rohit Mathew <Rohit.Mathew@arm.com> |
refactor(sgi): replace build-option prefix to "NRD"
As of now, CSS_SGI_PLATFORM_VARIANT and CSS_SGI_CHIP_COUNT are the external build option that "sgi" platforms support. As "sgi" has been renamed t
refactor(sgi): replace build-option prefix to "NRD"
As of now, CSS_SGI_PLATFORM_VARIANT and CSS_SGI_CHIP_COUNT are the external build option that "sgi" platforms support. As "sgi" has been renamed to "neoverse_rd" and the source files have been migrated out of the css directory, replace the prefix "CSS_SGI" with "NRD".
Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com> Change-Id: I27989ff42404d823dd2a8cd22ff485497ccb62d4
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| 4ced5956 | 03-Feb-2024 |
Rohit Mathew <Rohit.Mathew@arm.com> |
refactor(sgi): move neoverse_rd out of css
Currently, neoverse_rd is hosted under the "css" directory. However, "css" directory is more relevant for hosting css definitions and corresponding sources
refactor(sgi): move neoverse_rd out of css
Currently, neoverse_rd is hosted under the "css" directory. However, "css" directory is more relevant for hosting css definitions and corresponding sources. Since neoverse_rd hosts source and header for css and soc, move neoverse_rd from css to board folder. Consolidate common sources and headers under neoverse_rd/common. Additionally, group RD-V1, RD-V1-MC, RD-N2, RD-N1-Edgex2 and SGI-575 within neoverse_rd/platform. With the changes in this commit, the tree view would look as follows:
plat/arm/board/neoverse_rd/ ├── common │ ├── arch │ ├── include │ └── ras └── platform ├── rdn1edge ├── rdn2 ├── rdv1 ├── rdv1mc └── sgi575
Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com> Change-Id: Iaccc86bc9d415f5c045c834902241fcf3c00277b
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| c669f653 | 03-Feb-2024 |
Rohit Mathew <Rohit.Mathew@arm.com> |
refactor(sgi): move from "sgi" to "neoverse_rd"
Currently, reference design platforms such as RD-N2, RD-N1-Edge, RD-V1-MC, RD-V1 and SGI-575 utilize "css/sgi" as the common source directory. The "sg
refactor(sgi): move from "sgi" to "neoverse_rd"
Currently, reference design platforms such as RD-N2, RD-N1-Edge, RD-V1-MC, RD-V1 and SGI-575 utilize "css/sgi" as the common source directory. The "sgi" prefix originated from the System Guidance for Infrastructure (SGI) and was initially associated with the SGI-575 platform. However, subsequent platforms released were under the Neoverse Reference Design product name.
To align with the Neoverse Reference Design nomenclature, rename the common source directory from "css/sgi" to "css/neoverse_rd" and update all file prefixes from "sgi" to "nrd."
Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com> Change-Id: I3dcbb31b9ab202e82caf25218ba33c520dcea4e4
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| 2d32517c | 20-Feb-2024 |
Rohit Mathew <Rohit.Mathew@arm.com> |
feat(sgi): remove unused SGI_PLAT build-option
Currently, the common makefile has reference to "SGI_PLAT" build-option. This however is not set by any of the platforms that makes use of the common m
feat(sgi): remove unused SGI_PLAT build-option
Currently, the common makefile has reference to "SGI_PLAT" build-option. This however is not set by any of the platforms that makes use of the common makefile. Therefore, remove the unused SGI_PLAT build-option.
Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com> Change-Id: I6cc0b8d87222c7b3aef998774cee964a920cceb6
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| cacee060 | 06-Feb-2024 |
Rohit Mathew <Rohit.Mathew@arm.com> |
fix(sgi): align to misra rule for braces
Misra rule states that braces have to be used with every 'if', 'else', 'for', 'do', and 'while' statement. In order to align with the said rule, add braces f
fix(sgi): align to misra rule for braces
Misra rule states that braces have to be used with every 'if', 'else', 'for', 'do', and 'while' statement. In order to align with the said rule, add braces for the statements within plat_css_get_scmi_info.
Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com> Change-Id: I826685e92926d90734b11d870dd624b11c9d1c30
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| c69253cc | 11-Jan-2024 |
Rohit Mathew <Rohit.Mathew@arm.com> |
feat(rde1edge): remove support for RD-E1-Edge
As RD-E1_Edge is no longer actively supported and has been in the deprecated list for a while, remove its support.
Signed-off-by: Rohit Mathew <Rohit.M
feat(rde1edge): remove support for RD-E1-Edge
As RD-E1_Edge is no longer actively supported and has been in the deprecated list for a while, remove its support.
Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com> Change-Id: Iff66ad498dd99e44e2e6b79251ba2cbefbd5f3eb
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| 10dcffed | 12-Feb-2024 |
Rohit Mathew <Rohit.Mathew@arm.com> |
fix(rdn2): populate TOS_CONFIG only when SPMC_AT_EL3 is enabled
As of now, TOS_FW_CONFIG (trusted OS config) gets populated by default for RD-N2. However, TOS_FW_CONFIG is required only when SPMC_AT
fix(rdn2): populate TOS_CONFIG only when SPMC_AT_EL3 is enabled
As of now, TOS_FW_CONFIG (trusted OS config) gets populated by default for RD-N2. However, TOS_FW_CONFIG is required only when SPMC_AT_EL3 is enabled. As the platform should support SPMC_AT_EL3 disabled mode as well, populate TOS_CONFIG only when SPMC_AT_EL3 is enabled. Additionally, building of rdn2_stmm_sel0_manifest.dtb is made conditional to align with this configuration.
Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com> Change-Id: I9077d44b21d32ba7bf6b3b1c539662c14785ca6b
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| 89d85778 | 10-Feb-2024 |
Rohit Mathew <Rohit.Mathew@arm.com> |
fix(board): update spi_id max for sgi multichip platforms
According to GIC-600 TRM, 960 SPIs could be supported on a platform. However, with the current configuration, platforms such as RD-V1-MC and
fix(board): update spi_id max for sgi multichip platforms
According to GIC-600 TRM, 960 SPIs could be supported on a platform. However, with the current configuration, platforms such as RD-V1-MC and RD-N1-Edge Dual-Chip utilize a much smaller range. With commit 'a02a45dfe' gic600 driver is updated to get the max SPI id from the GIC-600 and probe for the corresponding GIC instance for each SPI id. Since RD-V1-MC and RD-N1-Edge Dual-Chip supports wider range, increase SPI range for the chip 0 to max SPI range supported.
Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com> Change-Id: Ia8c02c6d999033af33d8e7a0bedc7b73c6552ab4
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| 805de116 | 21-Feb-2024 |
Mark Dykes <mark.dykes@arm.com> |
Merge "build: correct minor toolchain documentation error" into integration |
| c9f097ec | 21-Feb-2024 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "chore(ufs): refactor ufs_get_device_info" into integration |
| 87799772 | 14-Feb-2024 |
Harsimran Singh Tungal <harsimransingh.tungal@arm.com> |
build(corstone1000): add CORSTONE1000_WITH_BL32 preprocessor flag
This change includes adding new CORSTONE1000_WITH_BL32 preprocessor flag on the basis of NEED_BL32 flag. This flag allows us to run
build(corstone1000): add CORSTONE1000_WITH_BL32 preprocessor flag
This change includes adding new CORSTONE1000_WITH_BL32 preprocessor flag on the basis of NEED_BL32 flag. This flag allows us to run the TF-A with or without loading BL32 image. This feature is required to add the support of Corstone-1000 FVP in TF-A open CI. After this, we can run the TF-A tftf tests with or without executing BL32 image, which is optee in case of Corstone-1000.
Signed-off-by: Harsimran Singh Tungal <harsimransingh.tungal@arm.com> Change-Id: Idacbd3883473473841481a2032314db8c9715b1f
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| 1c0d0252 | 20-Feb-2024 |
Chris Kay <chris.kay@arm.com> |
build: correct minor toolchain documentation error
Default values for toolchain tools are instead provided by the main toolchain makefile, rather than a parent makefile. This was an oversight from a
build: correct minor toolchain documentation error
Default values for toolchain tools are instead provided by the main toolchain makefile, rather than a parent makefile. This was an oversight from a previous version of the original toolchain refactor patch.
Change-Id: I75752ed7874b36e1c679d94292a2664e234c484b Signed-off-by: Chris Kay <chris.kay@arm.com>
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| 64e3efe7 | 20-Feb-2024 |
Lauren Wehrmeister <lauren.wehrmeister@arm.com> |
Merge "docs(threat_model): mark power analysis threats out-of-scope" into integration |
| ef685219 | 20-Feb-2024 |
Mark Dykes <mark.dykes@arm.com> |
Merge "build: use toolchain identifiers in conditions" into integration |
| 60dd8069 | 20-Feb-2024 |
Mark Dykes <mark.dykes@arm.com> |
Merge "build: use new toolchain variables for tools" into integration |