refactor(rpi): move more platform-specific code into common

In preparation for RPi 5 support, which will reuse most of the RPi 4
logic except for DTB patching.

Change-Id: I6f6ef96933711a1798757a338

refactor(rpi): move more platform-specific code into common

In preparation for RPi 5 support, which will reuse most of the RPi 4
logic except for DTB patching.

Change-Id: I6f6ef96933711a1798757a3389adae1b8ee3de6c
Signed-off-by: Mario Bălănică <mariobalanica02@gmail.com>

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Merge "refactor(cm): couple el2 registers with dependent feature flags" into integration

Merge changes from topic "commitizen-fixes" into integration

* changes:
build(npm): fix Commitizen ES Module errors
build(npm): adhere to Husky deprecation notice

Merge "docs: add documentation for `entry_point_info`" into integration

Merge "fix(tc): do not use r0 for HW_CONFIG" into integration

docs: add documentation for `entry_point_info`

Change-Id: I20b5f2cf70bfff09126f3c0645f40d3e410a4c70
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

Merge changes from topic "xlnx_smc_doc" into integration

* changes:
docs(versal-net): update SMC convention
docs(versal): update SMC convention
docs(zynqmp): update SMC convention

Merge "fix(misra): fix MISRA defects" into integration

Merge changes from topic "DPE" into integration

* changes:
feat(tc): group components into certificates
feat(dice): add cert_id argument to dpe_derive_context()
refactor(sds): modify log level

Merge changes from topic "DPE" into integration

* changes:
feat(tc): group components into certificates
feat(dice): add cert_id argument to dpe_derive_context()
refactor(sds): modify log level for region validity
feat(tc): add dummy TRNG support to be able to boot pVMs
feat(tc): get the parent component provided DPE context_handle
feat(tc): share DPE context handle with child component
feat(tc): add DPE context handle node to device tree
feat(tc): add DPE backend to the measured boot framework
feat(auth): add explicit entries for key OIDs
feat(dice): add DPE driver to measured boot
feat(dice): add client API for DICE Protection Environment
feat(dice): add QCBOR library as a dependency of DPE
feat(dice): add typedefs from the Open DICE repo
docs(changelog): add 'dice' scope
refactor(tc): align image identifier string macros
refactor(fvp): align image identifier string macros
refactor(imx8m): align image identifier string macros
refactor(qemu): align image identifier string macros
fix(measured-boot): add missing image identifier string
refactor(measured-boot): move metadata size macros to a common header
refactor(measured-boot): move image identifier strings to a common header

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refactor(sdei): use common create_spsr() in SDEI library

The current SPSR updation code as part of the SDEI interrupt handler
code is outdated. This patch replaces the legacy code with a call to
an

refactor(sdei): use common create_spsr() in SDEI library

The current SPSR updation code as part of the SDEI interrupt handler
code is outdated. This patch replaces the legacy code with a call to
an up-to-date create_spsr()

Change-Id: I1f5fdd41dd14f4b09601310fe881fa3783d7f505
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>

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build(npm): fix Commitizen ES Module errors

Commitizen is currently generating errors due to ES Module/CommonJS
incompatibilities described by the following GitHub issue:

https://github.com/con

build(npm): fix Commitizen ES Module errors

Commitizen is currently generating errors due to ES Module/CommonJS
incompatibilities described by the following GitHub issue:

https://github.com/conventional-changelog/commitlint/issues/3842

This change implements the temporary workaround described by the issue.

Change-Id: Idb74a3366bf046a0c9bac83380de904c5c059087
Signed-off-by: Chris Kay <chris.kay@arm.com>

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build(npm): adhere to Husky deprecation notice

Husky v8 adds the `husky init` subcommand, and v9 changes how it handles
hooks. We no longer need the Husky preamble in our hooks, so update to
the new

build(npm): adhere to Husky deprecation notice

Husky v8 adds the `husky init` subcommand, and v9 changes how it handles
hooks. We no longer need the Husky preamble in our hooks, so update to
the new `init` subcommand and remove the preambles.

Change-Id: I18ea1bbaedbb4213cc04c21413d75c9757ff7986
Signed-off-by: Chris Kay <chris.kay@arm.com>

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Merge "fix(cpus): workaround for Cortex-A715 erratum 2344187" into integration

fix(misra): fix MISRA defects

This patch resolves the MISRA issues reported in mailing list.
It addresses the following MISRA Rules violations - Rule 15.7 and
Rule 2.4.

* As per Rule 15.7, All if..

fix(misra): fix MISRA defects

This patch resolves the MISRA issues reported in mailing list.
It addresses the following MISRA Rules violations - Rule 15.7 and
Rule 2.4.

* As per Rule 15.7, All if.. else if constructs should be terminated
with an else statement and hence the conditional block
has been changed to switch..case. Updated get_el_str() to include
all EL cases.

* As per Rule 2.4, A project should not contain unused tag declarations,
hence intr_type_desc tag is removed.

* bl31_lib_init is only used in translation unit and hence it's
declaration is removed from bl31.h and the definition is made static to
maintain visibility.

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: Ica1d3041566baf51befcad5fd3714189117ba193

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Merge "feat(st-sdmmc2): set FIFO size to 1024 on STM32MP25" into integration

Merge "fix(cpus): workaround for Cortex-X4 erratum 2701112" into integration

refactor(cm): couple el2 registers with dependent feature flags

Currently the EL2 part of the context structure (el2_sysregs_t), is
mostly feature dependent.

For instance, CTX_HCRX_EL2 is only need

refactor(cm): couple el2 registers with dependent feature flags

Currently the EL2 part of the context structure (el2_sysregs_t), is
mostly feature dependent.

For instance, CTX_HCRX_EL2 is only needed when FEAT_HCX
(ENABLE_FEAT_HCX=1) is set, but the entry is unconditionally added
in the EL2 context structure and thereby consuming memory even in
build configurations where FEAT_HCX is disabled.

Henceforth, all such context entries should be coupled/tied with
their respective feature enables and be optimized away when unused.
This would reduce the context memory allocation for platforms, that
dont enable/support all the architectural features at once.

Further, converting the assembly context-offset entries into
a c structure relies on garbage collection of the linker
removing unreferenced structures from memory, as well as aiding
in readability and future maintenance.

Change-Id: I0cf49498ee3033cb6f3ee3810331121b26627783
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

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fix(tc): do not use r0 for HW_CONFIG

populate_next_bl_params_config already configures the register values
to be passed to BL33 and puts the HW_CONFIG address in r1. Therefore,
we do not need to ove

fix(tc): do not use r0 for HW_CONFIG

populate_next_bl_params_config already configures the register values
to be passed to BL33 and puts the HW_CONFIG address in r1. Therefore,
we do not need to override r0 here and should instead use r1 in BL33.

Change-Id: I00b425301957b5b0510416e1fa1f3599c0359bfc
Signed-off-by: Jackson Cooper-Driver <jackson.cooper-driver@arm.com>

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feat(mhu): use compile flag to choose mhu version

MHUv3 and MHUv2 drivers can now be selected at build time by using
PLAT_MHU_VERSION.

Signed-off-by: Joel Goddard <joel.goddard@arm.com>
Change-Id:

feat(mhu): use compile flag to choose mhu version

MHUv3 and MHUv2 drivers can now be selected at build time by using
PLAT_MHU_VERSION.

Signed-off-by: Joel Goddard <joel.goddard@arm.com>
Change-Id: I24f9e05f7969ed3be8f3261fdfed881a4ad18ba4

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feat(mhu): add MHUv3 wrapper APIs for RSS comm driver

RSS comm driver interfaces with MHUv3 driver through specific
API calls. Add APIs to support the interface.

Signed-off-by: Aziz IDOMAR <aziz.id

feat(mhu): add MHUv3 wrapper APIs for RSS comm driver

RSS comm driver interfaces with MHUv3 driver through specific
API calls. Add APIs to support the interface.

Signed-off-by: Aziz IDOMAR <aziz.idomar@arm.com>
Signed-off-by: Sayanta Pattanayak <sayanta.pattanayak@arm.com>
Signed-off-by: Shriram K <shriram.k@arm.com>
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Signed-off-by: Joel Goddard <joel.goddard@arm.com>
Change-Id: I815d43ca548d3640fceb4c91fe3bbeec31687210

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feat(mhu): add MHUv3 doorbell driver

MHUv3 reworks parts of MHUv2 and introduces MHU extensions. There are
currently 3 extensions:

* Doorbell extension: which works like MHUv2
* FIFO extension: whi

feat(mhu): add MHUv3 doorbell driver

MHUv3 reworks parts of MHUv2 and introduces MHU extensions. There are
currently 3 extensions:

* Doorbell extension: which works like MHUv2
* FIFO extension: which uses a buffer for faster inband data transfer
* Fastchannel extension: for fast data transfer

Add MHUv3 driver with support for Doorbell extension for both postbox
sender MHUs and mailbox receiver MHUs.

Signed-off-by: Aziz IDOMAR <aziz.idomar@arm.com>
Signed-off-by: Sayanta Pattanayak <sayanta.pattanayak@arm.com>
Signed-off-by: Shriram K <shriram.k@arm.com>
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Signed-off-by: Joel Goddard <joel.goddard@arm.com>
Change-Id: Icf49df56f1159f4c9830e0ffcda5b3a4bea8d2fd

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fix(cpus): workaround for Cortex-A715 erratum 2344187

Cortex-A715 erratum 2344187 is a Cat B erratum that applies to r0p0,
r1p0 and is fixed in r1p1. The workaround is to set GCR_EL1.RRND to
0b1, an

fix(cpus): workaround for Cortex-A715 erratum 2344187

Cortex-A715 erratum 2344187 is a Cat B erratum that applies to r0p0,
r1p0 and is fixed in r1p1. The workaround is to set GCR_EL1.RRND to
0b1, and apply an implementation specific patch sequence.

SDEN: https://developer.arm.com/documentation/SDEN2148827/latest

Change-Id: I78ea39a91254765c964bff89f771af33b23f29c1
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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fix(cpus): workaround for Cortex-X4 erratum 2701112

Cortex-X4 erratum 2701112 is cat B erratum that applies to
revision r0p0 and is fixed in r0p1. This erratum affects
system configurations that do

fix(cpus): workaround for Cortex-X4 erratum 2701112

Cortex-X4 erratum 2701112 is cat B erratum that applies to
revision r0p0 and is fixed in r0p1. This erratum affects
system configurations that do not use an Arm interconnect IP.

The workaround for this erratum is not implemented in EL3.
The erratum can be enabled/disabled on a platform level.
The flag is used when the errata ABI feature is enabled and can
assist the Kernel in the process of mitigation of the erratum.

SDEN Documentation:
https://developer.arm.com/documentation/SDEN2432808/latest

Change-Id: I8ede1ee75b0ea1658369a0646d8af91d44a8759b
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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Merge changes from topic "errata" into integration

* changes:
fix(cpus): workaround for Cortex-A715 erratum 2331818
fix(cpus): workaround for Cortex-A715 erratum 2420947

Merge "fix(gic600): workaround for Part 1 of GIC600 erratum 2384374" into integration