| 36ffe3e1 | 10-May-2024 |
Leo Yan <leo.yan@arm.com> |
feat(tc): add MHUv3 register addresses for TC4
Change-Id: I06351fc048d792943f338291f8f64827339e8e1c Signed-off-by: Leo Yan <leo.yan@arm.com> |
| 3cedc47b | 30-Apr-2024 |
Leo Yan <leo.yan@arm.com> |
feat(tc): add device tree binding for TC4
Since TC3 and TC4 share most components in the hardware design, they can reuse the device tree binding. For this reason, this patch extracts the common modu
feat(tc): add device tree binding for TC4
Since TC3 and TC4 share most components in the hardware design, they can reuse the device tree binding. For this reason, this patch extracts the common modules from tc3.dts and put into the file tc3-4-based.dtsi.
As a result, a new created tc4.dts file includes tc3-4-based.dtsi for support DT binding for the TC4 platform.
Change-Id: Ib7497162cb131d94a722aeaa14a1a37fb0095829 Signed-off-by: Leo Yan <leo.yan@arm.com>
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| 241ec3a5 | 29-Aug-2024 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "mb/cot-fixes" into integration
* changes: fix(cot-dt2c): fix various breakages fix(cot-dt2c): use processed Device Tree source file as input |
| 881b041e | 29-Aug-2024 |
Soby Mathew <soby.mathew@arm.com> |
Merge "feat(rme): change the default max GPT block size to 512MB" into integration |
| 13be7c2f | 29-Aug-2024 |
Julius Werner <jwerner@chromium.org> |
Merge "docs(maintainers): remove jwerner from Rockchip" into integration |
| a12ff039 | 28-Aug-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "fix(rpi3): use correct define for GPIO reg_clr" into integration |
| 75c69358 | 28-Aug-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(sdei): fix a crash when attempting to bind more events than are available" into integration |
| 73f7b7dd | 15-Aug-2024 |
Chris Kay <chris.kay@arm.com> |
fix(cot-dt2c): fix various breakages
This change fixes several breakages that were introduced in some build configurations by the introduction of the cot-dt2c tool.
Some Python environments cannot
fix(cot-dt2c): fix various breakages
This change fixes several breakages that were introduced in some build configurations by the introduction of the cot-dt2c tool.
Some Python environments cannot be managed directly via `pip`, and invocations of `make`, including `make distclean`, would cause errors along the lines of:
error: externally-managed-environment
× This environment is externally managed ╰─> To install Python packages system-wide, try apt install python3-xyz, where xyz is the package you are trying to install.
This change has been resolved by ensuring that calls to the cot-dt2c tool from the build system happen exclusively through Poetry, which automatically sets up a virtual environment that *can* be modified.
Some environments saw the following error when building platforms where the cot-dt2c tool was used:
make: *** No rule to make target '<..>/debug/bl2_cot.c', needed by '<..>/debug/bl2/bl2_cot.o'. Stop.
Additionally, environments with a more recent version of Python saw the following error:
File "<...>/lib/python3.12/site-packages/cot_dt2c/cot_parser.py", line 637, in img_to_c if ifdef: ^^^^^ NameError: name 'ifdef' is not defined
Both of these errors have now been resolved by modifications to the build system and the cot-dt2c tool to enable preprocessing of the device tree source file before it is processed by the tool.
As a consequence of this change, the `pydevicetree` library is no longer vendored into the repository tree, and we instead pull it in via a dependency in Poetry.
This change also resolves several MyPy warnings and errors related to missing type hints.
Change-Id: I72b2d01caca3fcb789d3fe2549f318a9c92d77d1 Signed-off-by: Chris Kay <chris.kay@arm.com>
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| 6b206d1d | 28-Aug-2024 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "fix(zynqmp): handle secure SGI at EL1 for OP-TEE" into integration |
| 8f20266a | 28-Aug-2024 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "fix(intel): software workaround for bridge timeout" into integration |
| 26cadf59 | 28-Aug-2024 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "fix(poplar): use sysctrl module to reset" into integration |
| c961e68e | 12-Mar-2024 |
Yang Xiwen <forbidden405@foxmail.com> |
fix(poplar): use sysctrl module to reset
Use sysctrl module rather than watchdog0 to reset the entire system. Sysctrl is more reliable and requires less resources such as clocks and resets. Doing th
fix(poplar): use sysctrl module to reset
Use sysctrl module rather than watchdog0 to reset the entire system. Sysctrl is more reliable and requires less resources such as clocks and resets. Doing this also allows non-secure OS to use the watchdog.
Change-Id: I30ac2780cc70055d81b35e55e35c9cb7f58b40cc Signed-off-by: Yang Xiwen <forbidden405@foxmail.com>
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| 6a398523 | 28-Aug-2024 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "fix(poplar): shutdown wdt0 before powering off" into integration |
| 95b228fe | 28-Aug-2024 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "feat(mt8188): update SVP region ID protection flow" into integration |
| b5a0c9be | 27-Aug-2024 |
Julius Werner <jwerner@chromium.org> |
docs(maintainers): remove jwerner from Rockchip
I originally added myself here because I had experience with the rk3399 code, when there were no other maintainers and that was the only supported Roc
docs(maintainers): remove jwerner from Rockchip
I originally added myself here because I had experience with the rk3399 code, when there were no other maintainers and that was the only supported Rockchip SoC. Nowadays there are maintainers from the actual manufacturer and most changes concern other SoCs, so I don't think it makes sense for me to still be on here.
Change-Id: Id75089e62cf1a8b4cf1a27903808922968520636 Signed-off-by: Julius Werner <jwerner@chromium.org>
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| cc4f3838 | 27-Aug-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "clean-up-errata-compatibility" into integration
* changes: refactor(cpus): remove cpu specific errata funcs refactor(cpus): directly invoke errata reporter |
| 4b0ccc5e | 27-Aug-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "fix(corstone-1000): fix Makefile error reporting" into integration |
| e19977d6 | 27-Aug-2024 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
fix(cot-dt2c): use processed Device Tree source file as input
Update the test files to eliminate the use of preprocessor macros, as the tool now requires processed output. The documentation has also
fix(cot-dt2c): use processed Device Tree source file as input
Update the test files to eliminate the use of preprocessor macros, as the tool now requires processed output. The documentation has also been revised accordingly.
Additionally, remove the Device Tree Source test files that were added to test the #ifdef conditions.
Change-Id: I13a682db20e5e44170fc25a2e2dbedd45b9c7321 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 09bf366b | 27-Aug-2024 |
Andre Przywara <andre.przywara@arm.com> |
fix(corstone-1000): fix Makefile error reporting
When trying to build for the Corstone-1000 platform without specifying a valid TARGET_PLATFORM value, the "make" call reports a Makefile error instea
fix(corstone-1000): fix Makefile error reporting
When trying to build for the Corstone-1000 platform without specifying a valid TARGET_PLATFORM value, the "make" call reports a Makefile error instead of the expected error messages pointing to the variable omission: ==================== platform.mk: *** recipe commences before first target. Stop. ==================== This is due to the make's infamous special handling of the tab character.
Fix the error report by replacing the tab with spaces.
Change-Id: I38264b6731793e5d5b929c189bb963e55bd5ce2d Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| 4096bd66 | 07-Aug-2024 |
Charlie Bareham <charlie.bareham@arm.com> |
fix(sdei): fix a crash when attempting to bind more events than are available
You can only bind a limited number of events in each range. If you attempt to bind more, it was crashing. This patch mak
fix(sdei): fix a crash when attempting to bind more events than are available
You can only bind a limited number of events in each range. If you attempt to bind more, it was crashing. This patch makes it return an error code instead.
Change-Id: Ib19f0f0780959ded244d45349d9d6c8607255c15 Signed-off-by: Charlie Bareham <charlie.bareham@arm.com>
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| e264b557 | 25-Aug-2024 |
Sieu Mun Tang <sieu.mun.tang@intel.com> |
fix(intel): update memcpy to memcpy_s
memcpy does not check the dst_size which may create vulnerable issue as it can overflow the buffer. Using memcpy_s which check the dst_size will help to reduce
fix(intel): update memcpy to memcpy_s
memcpy does not check the dst_size which may create vulnerable issue as it can overflow the buffer. Using memcpy_s which check the dst_size will help to reduce the risk. Also, this memcpy is always 4 bytes each time.
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com> Change-Id: I413e6ae2ee9330501703c4cd63b7943c6f55b4c7
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| 8fb91783 | 23-Aug-2024 |
Yann Gautier <yann.gautier@st.com> |
Merge "fix(intel): add in missing ECC register" into integration |
| 46839460 | 22-Aug-2024 |
Jit Loon Lim <jit.loon.lim@intel.com> |
fix(intel): add in missing ECC register
This patch is to add in missing ECC register (INITSTAT)
Change-Id: Iecf03dc9597ec2884901c132fb9cef7e90ab06a0 Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.
fix(intel): add in missing ECC register
This patch is to add in missing ECC register (INITSTAT)
Change-Id: Iecf03dc9597ec2884901c132fb9cef7e90ab06a0 Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
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| 44418fce | 22-Aug-2024 |
Mark Dykes <mark.dykes@arm.com> |
Merge changes from topics "rockchip", "rockchip-rk3588" into integration
* changes: feat(rk3588): support SCMI for clock/reset domain feat(rk3588): support rk3588 |
| d76d27e9 | 22-Aug-2024 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "stm32mp2_bl2_updates" into integration
* changes: feat(stm32mp2): load fw-config file feat(stm32mp2): add fw-config compilation feat(stm32mp2-fdts): add fw-config fil
Merge changes from topic "stm32mp2_bl2_updates" into integration
* changes: feat(stm32mp2): load fw-config file feat(stm32mp2): add fw-config compilation feat(stm32mp2-fdts): add fw-config files for STM32MP257F-EV1 feat(stm32mp2-fdts): add fw-config file feat(stm32mp2-fdts): add clock tree for STM32MP257F-EV1 feat(stm32mp2): enable DDR sub-system clock feat(stm32mp2): add fixed regulators support feat(stm32mp2): print board info feat(stm32mp2): display CPU info feat(stm32mp2): get chip ID feat(stm32mp2): add BL2 boot first steps feat(stm32mp2): add defines for the PWR peripheral feat(stm32mp2-fdts): add SD-card and eMMC support on STM32MP257F-EV1 feat(stm32mp2-fdts): add sdmmc pins definition feat(stm32mp2-fdts): add sdmmc nodes in SoC DT file feat(stm32mp2-fdts): add io_policies feat(stm32mp2-fdts): remove pins-are-numbered
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