fix(romlib): wrap indirectly included functions

The problem that this resolves is a bit involved; the following
must be met at the same time for some function <to_be_wrapped>:

* to_be_wrapped must

fix(romlib): wrap indirectly included functions

The problem that this resolves is a bit involved; the following
must be met at the same time for some function <to_be_wrapped>:

* to_be_wrapped must be specified as part of the romlib
* to_be_wrapped must _not_ be referenced by any translation unit
in TF-A
* to_be_wrapped must be referenced by a translation unit in a
dependent library, mbedtls for example.

Under these circumstances, to_be_wrapped will not be wrapped, and
will instead reference its original definition while simultaneously
residing in romlib.

This is a side effect of two issues with romlib prior to this patch:

1 to_be_wrapped is expected to wrap by duplicating its definition.
This causes any condition that links against both the base and
wrapper functions to be a link error (duplicate symbol definition).
2 to_be_wrapped is in its own translation unit
This causes the wrappers to be used by TF-A in an as needed.

The duplicate function definitions can be worked around using the
linker's `--wrap` flag, which redirects all references to a symbol
to resolve to `__wrap_<symbol>` and the original symbol to be
available as `__real_<symbol>`. Most of the changes handle creating
this arguments and passing them to the linker.

Further, once you use the linker's wrap, you will encounter another
issue: if TF-A does not use a function, its wrapper is not present.
This causes link issues when a library and not TF-A uses the wrapper.
Note that this issue would have been resolved previously by ignoring
the wrapper and using the base definition.

This further issue is worked around by concatenating the assembly for
all of the wrappers into a single translation unit. It's possible to
work around this issue in a few other ways, including reordering the
libraries passed to the linker to place libwrapper.a last or grouping
the libraries so that symbols from later libraries may be resolved
with prior libraries.

I chose the translation unit concatenation approach as it revealed
that a jumptable has duplicate symbols within it.

Change-Id: Ie57b5ae69bde2fc8705bdc7a93fae3ddb5341ed9
Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>

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docs(maintainers): update Corstone-1000 maintainers

* Add new maintainers: Hugues Kamba Mpiana
* Remove maintainers: Xueliang Zhong
* Update contact information for existing maintainers

Change-Id:

docs(maintainers): update Corstone-1000 maintainers

* Add new maintainers: Hugues Kamba Mpiana
* Remove maintainers: Xueliang Zhong
* Update contact information for existing maintainers

Change-Id: Ie4b7e7a1a179e3bf6f8d8e6c8e7ff0ad788e9f8f
Signed-off-by: Hugues Kamba-Mpiana <hugues.kambampiana@arm.com>

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feat(mt8188): update SVP region ID protection flow

- Extend the SVP region number from 1 to 10
- Mapping one region each time

Change-Id: I2dd517127018c71174f3d52a2118463370caf569
Signed-off-by: Gav

feat(mt8188): update SVP region ID protection flow

- Extend the SVP region number from 1 to 10
- Mapping one region each time

Change-Id: I2dd517127018c71174f3d52a2118463370caf569
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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Merge changes from topic "cot-dt2c" into integration

* changes:
feat(arm): update documentation for cot-dt2c
feat(arm): remove the bl2 static c file
feat(arm): generate tbbr c file CoT dt2c

Merge changes from topic "cot-dt2c" into integration

* changes:
feat(arm): update documentation for cot-dt2c
feat(arm): remove the bl2 static c file
feat(arm): generate tbbr c file CoT dt2c
feat(arm): makefile invoke CoT dt2c
feat(auth): standalone CoT dt2c tool
refactor(auth): separate bl1 and bl2 CoT
refactor(st): align the NV counter naming
refactor(fvp): align the NV counter naming

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Merge "fix(gicv3): wait rwp when gicr_ctrl.enablelpis from 1 to 0" into integration

Merge changes from topic "mp/ffa_bindings_update" into integration

* changes:
docs: add binding for vm availability messages
docs: fix discrepancies in value type of manifest fields
docs: upda

Merge changes from topic "mp/ffa_bindings_update" into integration

* changes:
docs: add binding for vm availability messages
docs: fix discrepancies in value type of manifest fields
docs: update ff-a manifest bindings
chore(docs): remove hafnium specific documentation

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Merge "feat(spm): change UART0-1 to NS device region" into integration

feat(rk3588): support SCMI for clock/reset domain

rockchip scmi clock controls clocks which only available in secure mode.

Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: I5

feat(rk3588): support SCMI for clock/reset domain

rockchip scmi clock controls clocks which only available in secure mode.

Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: I5b983877a5b4e8acababbf7e0a3e2725e6479e08

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feat(rk3588): support rk3588

rk3588 is an Octa-core soc with Cortex-a55/a76 inside.
This patch supports the following functions:
1. basic platform setup
2. power up/off cpus
3. suspend/resume cpus
4

feat(rk3588): support rk3588

rk3588 is an Octa-core soc with Cortex-a55/a76 inside.
This patch supports the following functions:
1. basic platform setup
2. power up/off cpus
3. suspend/resume cpus
4. suspend/resume system
5. reset system
6. power off system

Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: I598109f15a2efd5b33aedd176cf708c08cb1dcf4

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fix(gicv3): wait rwp when gicr_ctrl.enablelpis from 1 to 0

Per GIC architecture version 3 and version 4, Where the GICR_CTRL.EnableLPIs
remains programmable:
- Software must observe GICR_CTLR.RWP==0

fix(gicv3): wait rwp when gicr_ctrl.enablelpis from 1 to 0

Per GIC architecture version 3 and version 4, Where the GICR_CTRL.EnableLPIs
remains programmable:
- Software must observe GICR_CTLR.RWP==0 after clearing GICR_CTLR.EnableLPIs
from 1 to 0 before writing GICR_PENDBASER or GICR_PROPBASER, otherwise
behavior is UNPREDICTABLE.
- Software must observe GICR_CTLR.RWP==0 after clearing GICR_CTLR.EnableLPIs
from 1 to 0 before setting GICR_CTLR.EnableLPIs to 1, otherwise behavior is
UNPREDICTABLE.

After changing EnableLPIs from 1 to 0, wait RWP got cleared, otherwise
setting EnableLPIs from 0 to 1 may fail.

Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Tested-by: Clark Wang <xiaoning.wang@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Change-Id: I6aaf96dc9984376de9399d0dac8a8504ba095149

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fix(mte): improve ENABLE_FEAT_MTE deprecation warning

ENABLE_FEAT_MTE was deprecated in commit c282384dbb45 ("refactor(mte):
remove mte, mte_perm"), but the check in the build system is only
coverin

fix(mte): improve ENABLE_FEAT_MTE deprecation warning

ENABLE_FEAT_MTE was deprecated in commit c282384dbb45 ("refactor(mte):
remove mte, mte_perm"), but the check in the build system is only
covering the "ENABLE_FEAT_MTE=1" case.
Fix the check to cover every mentioning of ENABLE_FEAT_MTE.

Change-Id: Ia663f50016455f93ecfdac8aeaba34d9059600ea
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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feat(stm32mp2): load fw-config file

Add FW_CONFIG_ID entry in bl2_mem_params_descs to be loaded, and add
its parsing in bl2_plat_handle_post_image_load().

Signed-off-by: Yann Gautier <yann.gautier@

feat(stm32mp2): load fw-config file

Add FW_CONFIG_ID entry in bl2_mem_params_descs to be loaded, and add
its parsing in bl2_plat_handle_post_image_load().

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I151289474325067204ffae62e17c2e1e00f79b1c

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feat(stm32mp2): add fw-config compilation

The DT file will be in the FIP, and loaded at the beginning of SYSRAM.
The info for hw-config (U-Boot DT by default) is also added, it will
be loaded just a

feat(stm32mp2): add fw-config compilation

The DT file will be in the FIP, and loaded at the beginning of SYSRAM.
The info for hw-config (U-Boot DT by default) is also added, it will
be loaded just after BL33 (U-Boot binary).

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I9d58428c2d911c5c16cae5164122bf833a847a7d

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feat(stm32mp2-fdts): add fw-config files for STM32MP257F-EV1

Add the Firmware Config DT file for STM32MP257F-EV1 board.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I895ef919b1f388b

feat(stm32mp2-fdts): add fw-config files for STM32MP257F-EV1

Add the Firmware Config DT file for STM32MP257F-EV1 board.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I895ef919b1f388be1e8d25490f25b1e7195984f8

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feat(stm32mp2-fdts): add fw-config file

This is a generic file to be use on all STM32MP2 boards, as what is
done for STM32MP15.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I4ae0cf0

feat(stm32mp2-fdts): add fw-config file

This is a generic file to be use on all STM32MP2 boards, as what is
done for STM32MP15.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I4ae0cf0b7d21b1a2072b7ff5e6b98837d603c860

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feat(stm32mp2-fdts): add clock tree for STM32MP257F-EV1

Add dedicated RCC file to define clock tree and include it in
STM32MP257F-EV1 board DT file.

Signed-off-by: Yann Gautier <yann.gautier@st.com

feat(stm32mp2-fdts): add clock tree for STM32MP257F-EV1

Add dedicated RCC file to define clock tree and include it in
STM32MP257F-EV1 board DT file.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I259075f34d02534063c95fb571aec6ada480ce5f

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feat(stm32mp2): enable DDR sub-system clock

Create a DDR helper files, and add a function to enable DDR clocks
in RCC_DDRCPCFGR register.
Call this ddr_sub_system_clk_init() just before clock driver

feat(stm32mp2): enable DDR sub-system clock

Create a DDR helper files, and add a function to enable DDR clocks
in RCC_DDRCPCFGR register.
Call this ddr_sub_system_clk_init() just before clock driver init,
as it needs to be done before enabling DDR PLL clock (PLL2).

Change-Id: I365d6aa034363d0c036ce2d9f944f077ba86e193
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(stm32mp2): add fixed regulators support

Call fixed_regulator_register() in bl2_el3_plat_arch_setup() to
configure fixed regulators, if any are present in device tree.

Signed-off-by: Yann Gauti

feat(stm32mp2): add fixed regulators support

Call fixed_regulator_register() in bl2_el3_plat_arch_setup() to
configure fixed regulators, if any are present in device tree.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Iab2d3a4b6b294727b2b6722a6a13bf3f194ec0f9

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feat(stm32mp2): print board info

Call stm32mp_print_boardinfo() during BL2 setup. As for STM32MP1,
the board info is taken in the dedicated OTP fuse. This fuse will be
taken from device tree.

Signe

feat(stm32mp2): print board info

Call stm32mp_print_boardinfo() during BL2 setup. As for STM32MP1,
the board info is taken in the dedicated OTP fuse. This fuse will be
taken from device tree.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I2de0199378562b459b27427109ce66239316b8d9

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feat(stm32mp2): display CPU info

Print information about CPU type, package and revision.
SoC revision ID of MP2 family are defined with the OTP 102.

Signed-off-by: Maxime Méré <maxime.mere@foss.st.

feat(stm32mp2): display CPU info

Print information about CPU type, package and revision.
SoC revision ID of MP2 family are defined with the OTP 102.

Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I14a95c8a7cb9b06ce32c2e592ae69a1741067e8d

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feat(stm32mp2): get chip ID

Add a function to get chip ID from SYSCFG peripheral.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I32b15fca00e52d31f253e02873ab01b804399658

feat(stm32mp2): add BL2 boot first steps

Configure the first steps for STM32MP2 BL2 platform boot:
- Save boot context address for later use
- Configure BL2 MMU
- Load and use BL2 DT
- Reset backup

feat(stm32mp2): add BL2 boot first steps

Configure the first steps for STM32MP2 BL2 platform boot:
- Save boot context address for later use
- Configure BL2 MMU
- Load and use BL2 DT
- Reset backup domain
- Initialize clocks
- Configure UART for console
- Print some info about board and reset reason
- Setup storage (only SD-card for the moment)

The platform boot stops at BL2 image load, as bl2_mem_params_descs[]
is still empty.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: If6127cfbf77825a03afe8d65ba47c8c0661de496

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feat(stm32mp2): add defines for the PWR peripheral

This peripheral controls power on STM232MP2 platform.

Change-Id: Ieedca580b5ec897a2fac9e88c7c8c327df6f19c2
Signed-off-by: Yann Gautier <yann.gauti

feat(stm32mp2): add defines for the PWR peripheral

This peripheral controls power on STM232MP2 platform.

Change-Id: Ieedca580b5ec897a2fac9e88c7c8c327df6f19c2
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(stm32mp2-fdts): add SD-card and eMMC support on STM32MP257F-EV1

Add sdmmc1 node to support SD-cards on STM32MP257F-EV1 board, and
sdmmc2 node for eMMC.

Signed-off-by: Yann Gautier <yann.gautie

feat(stm32mp2-fdts): add SD-card and eMMC support on STM32MP257F-EV1

Add sdmmc1 node to support SD-cards on STM32MP257F-EV1 board, and
sdmmc2 node for eMMC.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I375e35aa6a96719a69df976500915be51c395b00

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feat(stm32mp2-fdts): add sdmmc pins definition

Add the pins nodes for SD-card or eMMC. Those pins are used on
STM32MP257F-EV1 board.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I96

feat(stm32mp2-fdts): add sdmmc pins definition

Add the pins nodes for SD-card or eMMC. Those pins are used on
STM32MP257F-EV1 board.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I96fe8210502b073bc222a70453bee1863a257c7b

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