History log of /rk3399_ARM-atf/ (Results 2501 – 2525 of 18314)
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45db86e012-Dec-2024 Manish Pandey <manish.pandey2@arm.com>

Merge "feat(fpmr): disable FPMR trap" into integration

a57e18e411-Nov-2024 Arvind Ram Prakash <arvind.ramprakash@arm.com>

feat(fpmr): disable FPMR trap

This patch enables support of FEAT_FPMR by enabling access
to FPMR register. It achieves it by setting the EnFPM bit of
SCR_EL3. This feature is currently enabled for N

feat(fpmr): disable FPMR trap

This patch enables support of FEAT_FPMR by enabling access
to FPMR register. It achieves it by setting the EnFPM bit of
SCR_EL3. This feature is currently enabled for NS world only.

Reference:
https://developer.arm.com/documentation/109697/2024_09/
Feature-descriptions/The-Armv9-5-architecture-extension?lang=en

Change-Id: I580c409b9b22f8ead0737502280fb9093a3d5dd2
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>

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537a25ef02-Dec-2024 J-Alves <joao.alves@arm.com>

fix(tlc): pass the flags from client interface

Provide the 'flags' from the arguments of the create
command to the TransferList __init__ function.

This is so that the '--flags' argument to the tool

fix(tlc): pass the flags from client interface

Provide the 'flags' from the arguments of the create
command to the TransferList __init__ function.

This is so that the '--flags' argument to the tool is actually
used.

Signed-off-by: J-Alves <joao.alves@arm.com>
Change-Id: Ic3f548e0ce7e704b3a12c2908f03d6a639bfa6f0

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06fa4c4d08-Jul-2024 Yu Shihai <yu.shihai@arm.com>

feat(tc): add devicetree node for AP/RSE MHU

These dts nodes are used by u-boot MHU/RSE driver to faciliate
communication with RSE over MHU.

FPGA doesn't seem to have the MHU instances which are us

feat(tc): add devicetree node for AP/RSE MHU

These dts nodes are used by u-boot MHU/RSE driver to faciliate
communication with RSE over MHU.

FPGA doesn't seem to have the MHU instances which are used to
communicate with RSE so keep rse mhu disabled for fpga.

Signed-off-by: Yu Shihai <yu.shihai@arm.com>
Signed-off-by: Jackson Cooper-Driver <jackson.cooper-driver@arm.com>
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Icen Zeyada <Icen.Zeyada2@arm.com>
Change-Id: Ib10b3da09626e5beb6d6cd87b1618a143234a5d0

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52d2934511-Nov-2024 Ryan Everett <ryan.everett@arm.com>

fix(psa): increase psa-mbedtls heap size for rsa

The value assigned for the mbedtls heap size for large
rsa keys was too small when PSA_CRYPTO is set to 1,
leading to run-time failures if one was to

fix(psa): increase psa-mbedtls heap size for rsa

The value assigned for the mbedtls heap size for large
rsa keys was too small when PSA_CRYPTO is set to 1,
leading to run-time failures if one was to attempt
to use a large RSA key with PSA_CRYPTO=1.

Change-Id: Id9b2648ae911879f483f1b88301f28694af0721d
Signed-off-by: Ryan Everett <ryan.everett@arm.com>

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cc46166127-Nov-2024 Arvind Ram Prakash <arvind.ramprakash@arm.com>

fix(cpus): workaround for Cortex-X4 erratum 2923985

Cortex-X4 erratum 2923935 is a Cat B erratum that applies
to all revisions <= r0p1 and is fixed in r0p2.

The workaround is to set CPUACTLR4_EL1[1

fix(cpus): workaround for Cortex-X4 erratum 2923985

Cortex-X4 erratum 2923935 is a Cat B erratum that applies
to all revisions <= r0p1 and is fixed in r0p2.

The workaround is to set CPUACTLR4_EL1[11:10] to 0b11.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-2432808/latest

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I9207802ad479919a7f77c1271019fa2479e076ee

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e372c29111-Dec-2024 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge "chore(romlib): remove unused jmptbl.i file" into integration


255d907611-Dec-2024 Mark Dykes <mark.dykes@arm.com>

Merge "feat(intel): add support for query SDM config error and status" into integration

7640df6f11-Dec-2024 Yann Gautier <yann.gautier@st.com>

fix(encrypt-fw): put build_msg under LOG_LEVEL flag

In tools directory, contrary to other parts of TF-A code,
LOG_LEVEL_NOTICE is 20, and LOG_LEVEL_ERROR is 10. If LOG_LEVEL is
set to 10, which is t

fix(encrypt-fw): put build_msg under LOG_LEVEL flag

In tools directory, contrary to other parts of TF-A code,
LOG_LEVEL_NOTICE is 20, and LOG_LEVEL_ERROR is 10. If LOG_LEVEL is
set to 10, which is the case if BUILD_INFO=0, then we can have this
compilation warning:
src/main.c:29:19: warning: ‘build_msg’ defined but not used
[-Wunused-const-variable=]
29 | static const char build_msg[] = "Built : " __TIME__ ",
" __DATE__;
| ^~~~~~~~~

Avoid that by putting it under '#if LOG_LEVEL >= LOG_LEVEL_NOTICE'.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ic724610d6df811fc889775dbd361087e0958d31e

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7dc4334411-Dec-2024 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge changes from topic "update-mbedtls-to-3.6.2" into integration

* changes:
feat(mbedtls): mbedtls config update for v3.6.2
docs(prerequisites): update mbedtls to version 3.6.2
refactor(mbe

Merge changes from topic "update-mbedtls-to-3.6.2" into integration

* changes:
feat(mbedtls): mbedtls config update for v3.6.2
docs(prerequisites): update mbedtls to version 3.6.2
refactor(mbedtls): rename default mbedtls confs

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4bfe49ec15-Jul-2024 Jackson Cooper-Driver <jackson.cooper-driver@arm.com>

fix(tc): map mem_protect flash region

TC platform was missing this region's mapping in its plat_arm_mmap
structure causing a data abort when trying to access it.

Signed-off-by: Jackson Cooper-Drive

fix(tc): map mem_protect flash region

TC platform was missing this region's mapping in its plat_arm_mmap
structure causing a data abort when trying to access it.

Signed-off-by: Jackson Cooper-Driver <jackson.cooper-driver@arm.com>
Signed-off-by: Icen Zeyada <Icen.Zeyada2@arm.com>
Change-Id: I0a6322685f1ee017b0f0cfa795abac0524c13287

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0328f34221-May-2024 Leo Yan <leo.yan@arm.com>

feat(tc): initialize MHU channels with RSE

Initialize MHU channels between TF-A and RSE, this is a preparation
for later sending messages to RSE.

Signed-off-by: Leo Yan <leo.yan@arm.com>
Signed-off

feat(tc): initialize MHU channels with RSE

Initialize MHU channels between TF-A and RSE, this is a preparation
for later sending messages to RSE.

Signed-off-by: Leo Yan <leo.yan@arm.com>
Signed-off-by: Icen Zeyada <Icen.Zeyada2@arm.com>
Change-Id: I66095cafcc1d48249cf957a49dc1dad3059a0010

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4557c0c009-Dec-2024 Boyan Karatotev <boyan.karatotev@arm.com>

fix(docs): put INIT_UNUSED_NS_EL2 docs back

Commit b65dfe40a removed the documentation for this flag in error. Put
it back.

Change-Id: I61a352553a010385997c47116b53d2fbe939ccd4
Signed-off-by: Boyan

fix(docs): put INIT_UNUSED_NS_EL2 docs back

Commit b65dfe40a removed the documentation for this flag in error. Put
it back.

Change-Id: I61a352553a010385997c47116b53d2fbe939ccd4
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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50ad0cfd19-Jun-2024 Jagdish Gediya <jagdish.gediya@arm.com>

feat(tc): add dsu pmu node for TC4

Add DSU PMU node for TC4. DSU PMU interrupt is not connected on TC3
but it is connected on IRQ 290 on TC4, so add interrupt property
specifically for TC4.

Signed-

feat(tc): add dsu pmu node for TC4

Add DSU PMU node for TC4. DSU PMU interrupt is not connected on TC3
but it is connected on IRQ 290 on TC4, so add interrupt property
specifically for TC4.

Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Icen Zeyada <Icen.Zeyada2@arm.com>
Change-Id: Ib1b810df65004987e9f3cf1bbd5deb5d211f3a17

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00397b3019-Jun-2024 Jagdish Gediya <jagdish.gediya@arm.com>

feat(tc): enable DSU PMU el1 access for TC4

Enable DSU PMU EL1 access for TC4 to use DSU PMU using perf
in Linux.

Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Icen Zeyada <

feat(tc): enable DSU PMU el1 access for TC4

Enable DSU PMU EL1 access for TC4 to use DSU PMU using perf
in Linux.

Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Icen Zeyada <Icen.Zeyada2@arm.com>
Change-Id: I5492bab5c95d60ffaaede4606d8d75c00f988eb6

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3e43d1d310-Dec-2024 Mac Shen <mac.shen@mediatek.com>

feat(mt8196): enable DP and eDP for mt8196

- Add register definitions for DP
- Add mmap entry for DP register access

Change-Id: I22ed9fa36a7e13fcaed0c137d0e8f4449b6a52d7
Signed-off-by: Mac Shen <ma

feat(mt8196): enable DP and eDP for mt8196

- Add register definitions for DP
- Add mmap entry for DP register access

Change-Id: I22ed9fa36a7e13fcaed0c137d0e8f4449b6a52d7
Signed-off-by: Mac Shen <mac.shen@mediatek.com>

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19799fd810-Dec-2024 Amit Nagal <amit.nagal@amd.com>

fix(versal-net): remove_redundant_lock_defs

HW_ASSISTED_COHERENCY is always enabled on cortex a78
based versal-net platform.
hence remove the redundant definitions for pm_client_lock_get
and pm_clie

fix(versal-net): remove_redundant_lock_defs

HW_ASSISTED_COHERENCY is always enabled on cortex a78
based versal-net platform.
hence remove the redundant definitions for pm_client_lock_get
and pm_client_lock_release.

Change-Id: Ifcf1bca0d494cfeb4ca23f6c884dfa5a347f786b
Signed-off-by: Amit Nagal <amit.nagal@amd.com>

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f0e15ddc02-Dec-2024 Harrison Mutai <harrison.mutai@arm.com>

fix(tlc): relax entry addition from YAML files

Relax entry addition from YAML files to allow the addition of
entries not known to the tool. It is not possible to keep track of
every possible TE, and

fix(tlc): relax entry addition from YAML files

Relax entry addition from YAML files to allow the addition of
entries not known to the tool. It is not possible to keep track of
every possible TE, and a user might want to add an entry that hasn't
yet been specified.

Change-Id: Ib5d227bc41cd3dd8b530699c1bab3165a3114a3c
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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c4c8e26a20-Nov-2024 J-Alves <joao.alves@arm.com>

feat(tlc): add --align argument

Extended the command line interface to receive an alignment
argument.

TLC tool will align the data of the TEs accordingly.

Signed-off-by: J-Alves <joao.alves@arm.co

feat(tlc): add --align argument

Extended the command line interface to receive an alignment
argument.

TLC tool will align the data of the TEs accordingly.

Signed-off-by: J-Alves <joao.alves@arm.com>
Change-Id: I281b0b4c1851d58377bf6b31fcee03ee2f53367b

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03c2660f27-Nov-2024 J-Alves <joao.alves@arm.com>

fix(tlc): add void entries to align data

Add void entries to ensure proper alignment of data in the TL,
addressing runtime errors caused by previously unaccounted padding bytes
between TE's.

Change

fix(tlc): add void entries to align data

Add void entries to ensure proper alignment of data in the TL,
addressing runtime errors caused by previously unaccounted padding bytes
between TE's.

Change-Id: Id2acee8f4df0dcc52eedc4372b962a51acb9d8ce
Signed-off-by: J-Alves <joao.alves@arm.com>
Co-authored-by:: Harrison Mutai <harrison.mutai@arm.com>

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5ca0241c29-Nov-2024 Harrison Mutai <harrison.mutai@arm.com>

fix(handoff): correct 8-bit modulo csum calculation

Fix the handoff 8-bit modulo checksum calculation to ensure we never get
a checksum larger than 8 bits. The previous calculation failed to
truncat

fix(handoff): correct 8-bit modulo csum calculation

Fix the handoff 8-bit modulo checksum calculation to ensure we never get
a checksum larger than 8 bits. The previous calculation failed to
truncate the sum at the final step in update_checksum

Change-Id: Ice0b72eb139af90f416adeff157d337646d6201a
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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157c619702-Dec-2024 Harrison Mutai <harrison.mutai@arm.com>

feat(tlc): formalise random generation of TEs

To facillitate our testing, add some fixtures to make it easier to
generate transfer entry data.

Change-Id: Ieb76e54e69f410f4f7e1b55fc2cff282e592d1a4
S

feat(tlc): formalise random generation of TEs

To facillitate our testing, add some fixtures to make it easier to
generate transfer entry data.

Change-Id: Ieb76e54e69f410f4f7e1b55fc2cff282e592d1a4
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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c307efce09-Dec-2024 Ryan Everett <ryan.everett@arm.com>

feat(mbedtls): mbedtls config update for v3.6.2

This new update to the LTS branch of MbedTLS provides
the fix for a buffer underrun vulnerability. TF-A does
not use the previously vulnerable functio

feat(mbedtls): mbedtls config update for v3.6.2

This new update to the LTS branch of MbedTLS provides
the fix for a buffer underrun vulnerability. TF-A does
not use the previously vulnerable functions
`mbedtls_pk_write_key_der` or `mbedtls_pk_write_key_pem`.
Full patch notes to this MbedTLS update can be found at
https://github.com/Mbed-TLS/mbedtls/releases/tag/mbedtls-3.6.2.

We now enforce the mbedtls version to be greater than or equal
to 3.6.2 in our default configs.

Change-Id: I79027f6c741ab3f419f7b555321507e6a78b977b
Signed-off-by: Ryan Everett <ryan.everett@arm.com>

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9503702909-Dec-2024 Ryan Everett <ryan.everett@arm.com>

docs(prerequisites): update mbedtls to version 3.6.2

This new update to the LTS branch of MbedTLS provides
the fix for a buffer underrun vulnerability. TF-A does
not use the previously vulnerable fu

docs(prerequisites): update mbedtls to version 3.6.2

This new update to the LTS branch of MbedTLS provides
the fix for a buffer underrun vulnerability. TF-A does
not use the previously vulnerable functions
`mbedtls_pk_write_key_der` or `mbedtls_pk_write_key_pem`.
Full patch notes to this MbedTLS update can be found at
https://github.com/Mbed-TLS/mbedtls/releases/tag/mbedtls-3.6.2.

Change-Id: Ibc4a8712c92019648fe0e75390cd3540d86b735d
Signed-off-by: Ryan Everett <ryan.everett@arm.com>

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640ba63409-Dec-2024 Ryan Everett <ryan.everett@arm.com>

refactor(mbedtls): rename default mbedtls confs

Change the name of these confs to be version agnostic,
we will later use these configs to enforce the mbedtls
minimum version

Change-Id: I1f665c24718

refactor(mbedtls): rename default mbedtls confs

Change the name of these confs to be version agnostic,
we will later use these configs to enforce the mbedtls
minimum version

Change-Id: I1f665c2471877ecc833270c511749ff845046f10
Signed-off-by: Ryan Everett <ryan.everett@arm.com>

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