Fix SPSR register size in gp_regs structure

SPSR is a 32-bit register and so its size should be reflected in
the gp_regs structure. This patch fixes the type of gp_regs.spsr
to use a 32-bit variabl

Fix SPSR register size in gp_regs structure

SPSR is a 32-bit register and so its size should be reflected in
the gp_regs structure. This patch fixes the type of gp_regs.spsr
to use a 32-bit variable. It also makes the size of the other
register fields more explicit.

Change-Id: I27e0367df1a91cc501d5217c1b3856d4097c60ba

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Local C library documentation updates

- Update porting guide to describe where files live and how to get
FreeBSD source code.
- Update change-log to describe relocation and new functions.

Change-

Local C library documentation updates

- Update porting guide to describe where files live and how to get
FreeBSD source code.
- Update change-log to describe relocation and new functions.

Change-Id: Id8f30cc7bafdd1064b3a5c5aae958c5aa3fb79f3

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Add strchr() and putchar() to local C library

Change-Id: I3659e119a242f8ef828e32bfdf5d0b4b7ac4f716

Create local C library implementation (2/2)

- This change is split into two separate patches in order to
simplify the history as interpreted by 'git'. The split is
between the move/rename and ad

Create local C library implementation (2/2)

- This change is split into two separate patches in order to
simplify the history as interpreted by 'git'. The split is
between the move/rename and addition of new files.
- Remove dependency on toolchain C library headers and functions in
order to ensure behavioural compatibility between toolchains.
- Use FreeBSD as reference for C library implementation.
- Do not let GCC use default library include paths.
- Remove unused definitions in modified headers and implementations.
- Move C library files to 'lib/stdlib' and 'include/stdlib'.
- Break std.c functions out into separate files.

Change-Id: I3e3d8d992052264d2a02489034ae4c03bf0f5512

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Create local C library implementation (1/2)

- This change is split into two separate patches in order to
simplify the history as interpreted by 'git'. The split is
between the move/rename and ad

Create local C library implementation (1/2)

- This change is split into two separate patches in order to
simplify the history as interpreted by 'git'. The split is
between the move/rename and addition of new files.
- Remove dependency on toolchain C library headers and functions in
order to ensure behavioural compatibility between toolchains.
- Use FreeBSD as reference for C library implementation.
- Do not let GCC use default library include paths.
- Remove unused definitions in modified headers and implementations.
- Move C library files to 'lib/stdlib' and 'include/stdlib'.
- Break std.c functions out into separate files.

Change-Id: I91cddfb3229775f770ad781589670c57d347a154

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Add debug macros

- Add 'debug.h' with INFO, WARN and ERROR macros.
- This prints the specified message with the appropriate tag.
- INFO and WARN messages are only displayed when building with
the

Add debug macros

- Add 'debug.h' with INFO, WARN and ERROR macros.
- This prints the specified message with the appropriate tag.
- INFO and WARN messages are only displayed when building with
the DEBUG flag set. Error messages are always printed.

Change-Id: I21835b6063fcc99649b30ac7489387cbd3705bc0

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Make BL31's ns_entry_info a single-cpu area

ns_entry_info used to be a per-cpu array. This is a waste of space
because it is only accessed by the primary CPU on the cold boot path.
This patch reduc

Make BL31's ns_entry_info a single-cpu area

ns_entry_info used to be a per-cpu array. This is a waste of space
because it is only accessed by the primary CPU on the cold boot path.
This patch reduces ns_entry_info to a single-cpu area.

Change-Id: I647c70c4e76069560f1aaad37a1d5910f56fba4c

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BL2: Sanity check value in x0 in the entry point code

Change-Id: Icef68e314e6ba0f3694189b57f4b1dbbea5ba255

Move RUN_IMAGE constant from bl1.h to bl_common.h

RUN_IMAGE constant is used by all bootloader stages.

Change-Id: I1b4e28d8fcf3ad1363f202c859f5efab0f320efe

Remove useless copies of meminfo structures

Platform setup code has to reserve some memory for storing the
memory layout information. It is populated in early platform setup
code.

blx_get_sec_mem_

Remove useless copies of meminfo structures

Platform setup code has to reserve some memory for storing the
memory layout information. It is populated in early platform setup
code.

blx_get_sec_mem_layout() functions used to return a copy of this
structure. This patch modifies blx_get_sec_mem_layout() functions
so that they now directly return a pointer to their memory layout
structure. It ensures that the memory layout returned by
blx_get_sec_mem_layout() is always up-to-date and also avoids a
useless copy of the meminfo structure.

Also rename blx_get_sec_mem_layout() to blx_plat_sec_mem_layout()
to make it clear those functions are platform specific.

Change-Id: Ic7a6f9d6b6236b14865ab48a9f5eff545ce56551

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psci: update docs with status of cpu_suspend api

This patch makes changes to the documents to reflect the current
state of play of the psci cpu_suspend function.

Change-Id: I086509fb75111b6e9f93b7f

psci: update docs with status of cpu_suspend api

This patch makes changes to the documents to reflect the current
state of play of the psci cpu_suspend function.

Change-Id: I086509fb75111b6e9f93b7f6dbcd33cc4591b9f3

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psci: rectify and homogenise generic code

This patch performs a major rework of the psci generic implementation
to achieve the following:

1. replace recursion with iteration where possible to aid c

psci: rectify and homogenise generic code

This patch performs a major rework of the psci generic implementation
to achieve the following:

1. replace recursion with iteration where possible to aid code
readability e.g. affinity instance states are changed iteratively
instead of recursively.

2. acquire pointers to affinity instance nodes at the beginning of a
psci operation. All subsequent actions use these pointers instead
of calling psci_get_aff_map_node() repeatedly e.g. management of
locks has been abstracted under functions which use these pointers
to ensure correct ordering. Helper functions have been added to
create these abstractions.

3. assertions have been added to cpu level handlers to ensure correct
state transition

4. the affinity level extents specified to various functions have the
same meaning i.e. start level is always less than the end level.

Change-Id: If0508c3a7b20ea3ddda2a66128429382afc3dfc8

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psci: rework cpu_off assertion and minor cleanups

This patch:

1. removes a duplicate assertion to check that the only error
condition that can be returned while turning a cpu off is
PSCI_E_DE

psci: rework cpu_off assertion and minor cleanups

This patch:

1. removes a duplicate assertion to check that the only error
condition that can be returned while turning a cpu off is
PSCI_E_DENIED. Having this assertion after calling
psci_afflvl_off() is sufficient.

2. corrects some incorrect usage of 'its' vs 'it is'

3. removes some unwanted white spaces

Change-Id: Icf014e269b54f5be5ce0b9fbe6b41258e4ebf403

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remove check on non-secure entrypoint parameter

In fvp_affinst_on/suspend, the non-secure entrypoint is always
expected to lie in the DRAM. This check will not be valid if
non-secure code executes d

remove check on non-secure entrypoint parameter

In fvp_affinst_on/suspend, the non-secure entrypoint is always
expected to lie in the DRAM. This check will not be valid if
non-secure code executes directly out of flash e.g. a baremetal
test. This patch removes this check.

Change-Id: I0436e1138fc394aae8ff1ea59ebe38b46a440b61

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move timer #defines & remove duplicate declaration

This patch removes the duplicate declaration of psci_cpu_on in psci.h
and moves the constants for the system level implementation of the
generic ti

move timer #defines & remove duplicate declaration

This patch removes the duplicate declaration of psci_cpu_on in psci.h
and moves the constants for the system level implementation of the
generic timer from arch_helpers.h to arch.h. All other architectural
constants are defined in arch.h so there is no need to add them to
arch_helpers.h

Change-Id: Ia8ad3f91854f7e57fce31873773eede55c384ff1

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psci: fix error due to a non zero context id

In the previous psci implementation, the psci_afflvl_power_on_finish()
function would run into an error condition if the value of the context
id paramete

psci: fix error due to a non zero context id

In the previous psci implementation, the psci_afflvl_power_on_finish()
function would run into an error condition if the value of the context
id parameter in the cpu_on and cpu_suspend psci calls was != 0. The
parameter was being restored as the return value of the affinity level
0 finisher function. A non zero context id would be treated as an
error condition. This would prevent successful wake up of the cpu from
a power down state. Also, the contents of the general purpose
registers were not being cleared upon return to the non-secure world
after a cpu power up. This could potentially allow the non-secure
world to view secure data.

This patch ensures that all general purpose registers are set to ~0
prior to the final eret that drops the execution to the non-secure
world. The context id is used to initialize the general purpose
register x0 prior to re-entry into the non-secure world and is no
longer restored as a function return value. A platform helper
(platform_get_stack()) has been introduced to facilitate this change.

Change-Id: I2454911ffd75705d6aa8609a5d250d9b26fa097c

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psci: fix values of incorrectly defined constants

This patch fixes the following constant values in the psci.h:

1. The affinity level shift value in the power_state parameter of the
cpu_suspend

psci: fix values of incorrectly defined constants

This patch fixes the following constant values in the psci.h:

1. The affinity level shift value in the power_state parameter of the
cpu_suspend psci call. The previous value was preventing shutdown
of the affinity level 1.

2. The values used for affinity state constants (ON, OFF,
ON_PENDING). They did not match the values expected to be returned
by the affinity_info psci api as mentioned in the spec.

3. The state id shift value in the power_state parameter of the
cpu_suspend psci call.

Change-Id: I62ed5eb0e9640b4aa97b93923d6630e6b877a097

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clear wakeup enable bit upon resuming from suspend

The FVP specific code that gets called after a cpu has been physically
powered on after having been turned off or suspended earlier does not
clear

clear wakeup enable bit upon resuming from suspend

The FVP specific code that gets called after a cpu has been physically
powered on after having been turned off or suspended earlier does not
clear the PWRC.PWKUPR.WEN bit. Not doing so causes problems if: a cpu
is suspended, woken from suspend, powered down through a cpu_off call
& receives a spurious interrupt. Since the WEN bit is not cleared
after the cpu woke up from suspend, the spurious wakeup will power the
cpu on. Since the cpu_off call clears the jump address in the mailbox
this spurious wakeup will cause the cpu to crash.

This patch fixes this issue by clearing the WEN bit whenever a cpu is
powered up.

Change-Id: Ic91f5dffe1ed01d76bc7fc807acf0ecd3e38ce5b

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rework general purpose registers save and restore

The runtime exception handling assembler code used magic numbers for
saving and restoring the general purpose register context on stack
memory. The

rework general purpose registers save and restore

The runtime exception handling assembler code used magic numbers for
saving and restoring the general purpose register context on stack
memory. The memory is interpreted as a 'gp_regs' structure and the
magic numbers are offsets to members of this structure. This patch
replaces the magic number offsets with constants. It also adds compile
time assertions to prevent an incorrect assembler view of this
structure.

Change-Id: Ibf125bfdd62ba3a33e58c5f1d71f8c229720781c

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Enable third party contributions

- Add instructions for contributing to ARM Trusted Firmware.

- Update copyright text in all files to acknowledge contributors.

Change-Id: I9311aac81b00c6c167d2f8c8

Enable third party contributions

- Add instructions for contributing to ARM Trusted Firmware.

- Update copyright text in all files to acknowledge contributors.

Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5

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Update user guide further to linker scripts changes

This patch updates the user guide section about the memory layout.
- Explain the verifications that the linker scripts does on the
global me

Update user guide further to linker scripts changes

This patch updates the user guide section about the memory layout.
- Explain the verifications that the linker scripts does on the
global memory layout.
- Refer to the new linker symbols.
- Describe the linker symbols exported to the trusted firmware code.

Change-Id: I033ab2b867e8b9776deb4185b9986bcb8218f286

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Properly initialise the C runtime environment

This patch makes sure the C runtime environment is properly
initialised before executing any C code.

- Zero-initialise NOBITS sections (e.g. the bss

Properly initialise the C runtime environment

This patch makes sure the C runtime environment is properly
initialised before executing any C code.

- Zero-initialise NOBITS sections (e.g. the bss section).
- Relocate BL1 data from ROM to RAM.

Change-Id: I0da81b417b2f0d1f7ef667cc5131b1e47e22571f

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Various improvements/cleanups on the linker scripts

- Check at link-time that bootloader images will fit in memory
at run time and that they won't overlap each other.
- Remove text and rodat

Various improvements/cleanups on the linker scripts

- Check at link-time that bootloader images will fit in memory
at run time and that they won't overlap each other.
- Remove text and rodata orphan sections.
- Define new linker symbols to remove the need for platform setup
code to know the order of sections.
- Reduce the size of the raw binary images by cutting some sections
out of the disk image and allocating them at load time, whenever
possible.
- Rework alignment constraints on sections.
- Remove unused linker symbols.
- Homogenize linker symbols names across all BLs.
- Add some comments in the linker scripts.

Change-Id: I47a328af0ccc7c8ab47fcc0dc6e7dd26160610b9

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Treat compiler, assembler and linker warnings as errors

Change-Id: I56284ebf63bef99de1beb4fd86e2d8b6a7962ac0

Generate build products in sub-directories

A single binary can be compiled using a command such as:
make CROSS_COMPILE=aarch64-none-elf- bl1

Also make use of brackets consistent in the Makefile.

Generate build products in sub-directories

A single binary can be compiled using a command such as:
make CROSS_COMPILE=aarch64-none-elf- bl1

Also make use of brackets consistent in the Makefile.

Change-Id: I2180fdb473411ef7cffe39670a7b2de82def812e

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