fix(changelog): fix platform order and add smcc to deprecated

Some platforms were not added in alphabetical order
and this patch fixes it. This patch also deprecates
the scope "smcc".

Signed-off-by

fix(changelog): fix platform order and add smcc to deprecated

Some platforms were not added in alphabetical order
and this patch fixes it. This patch also deprecates
the scope "smcc".

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: Ieea2d49ab7d24377edad840f25af563f38ac7e41

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Merge "docs(n1sdp): update PSCI instrumentation data" into integration

docs(n1sdp): update PSCI instrumentation data

Update for v2.14 release based on v2.14-rc0

Change-Id: I74461f8ff009384c7db64a0a7f5b67a071a53334
Signed-off-by: Slava Andrianov <slava.andrianov@arm.co

docs(n1sdp): update PSCI instrumentation data

Update for v2.14 release based on v2.14-rc0

Change-Id: I74461f8ff009384c7db64a0a7f5b67a071a53334
Signed-off-by: Slava Andrianov <slava.andrianov@arm.com>

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Merge "feat(handoff): add firmware handoff threat model" into integration

feat(handoff): add firmware handoff threat model

Add threat model covering the Transfer List library (libTL) which
provides TF-A's implementation of the firmware handoff framework.

Change-Id: Idac6

feat(handoff): add firmware handoff threat model

Add threat model covering the Transfer List library (libTL) which
provides TF-A's implementation of the firmware handoff framework.

Change-Id: Idac6d5d423ed95bc4f0460a80007fd8d45976b19
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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Merge "docs: remove RME out of box testing instructions" into integration

Merge changes from topic "hm/release" into integration

* changes:
chore: bump libeventlog to latest version
docs: update docs w/ min tool version

Merge "docs(juno): update PSCI instrumentation data" into integration

docs: remove RME out of box testing instructions

Those instructions have proven difficult to maintain over time with
multiple components as moving targets. Nowadays prefer relying on
shrinkwrap offe

docs: remove RME out of box testing instructions

Those instructions have proven difficult to maintain over time with
multiple components as moving targets. Nowadays prefer relying on
shrinkwrap offering an integrated end to end build system capable of
running most RME related scenarios on the Base FVP.

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I27add62bf1fe9bd7a1a619566202192c3010ef10

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chore: bump libeventlog to latest version

Pulls in a fix to the version specified in the CMake file.

Change-Id: I49ce12e12c76a1c1070105c576a6791a065f85bb
Signed-off-by: Harrison Mutai <harrison.mut

chore: bump libeventlog to latest version

Pulls in a fix to the version specified in the CMake file.

Change-Id: I49ce12e12c76a1c1070105c576a6791a065f85bb
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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docs: update docs w/ min tool version

The minimum Node version was updated to the latest LTS release. Update
the docs to reflect this change. While we're at it, clean up remaining
references from th

docs: update docs w/ min tool version

The minimum Node version was updated to the latest LTS release. Update
the docs to reflect this change. While we're at it, clean up remaining
references from the Arm GNU toolchain version update and set the minimum
for GNU Make to whatever is provided by Ubuntu 22.04.

Change-Id: I16923c9cf69b34f78f19bc10e3bed72b70ae8132
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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fix(tc): correct register write in rng trap handler

Fix the TC rng trap handler to write the random value to the correct
GP register. The handler previously passed the register number to
write_ctx_r

fix(tc): correct register write in rng trap handler

Fix the TC rng trap handler to write the random value to the correct
GP register. The handler previously passed the register number to
write_ctx_reg() instead of the register offset which resulted in the
incorrect register being modified.

Change-Id: I1063b7d1e17037f60a745ceb6653cd3419ec6a67
Signed-off-by: Aditya Deshpande <aditya.deshpande@arm.com>

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feat(imx8m): keep console at runtime when building TF-A/bl31 with DEBUG

Have informal console output at runtime is useful when searching
errors in TF-A.

Change-Id: I56b5c4fc184e571f79d92bd0aa4fc74f

feat(imx8m): keep console at runtime when building TF-A/bl31 with DEBUG

Have informal console output at runtime is useful when searching
errors in TF-A.

Change-Id: I56b5c4fc184e571f79d92bd0aa4fc74ff4ed6074
Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>

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Merge "docs: describe RAS KFH limitations and its mitigation in future" into integration

feat(fvp): extend image decryption support for FVP

Add encryption IO layer to be stacked above FIP IO layer for optional
encryption of the BL31 and BL32 images in case the ENCRYPT_BL31 or
ENCRYPT_BL

feat(fvp): extend image decryption support for FVP

Add encryption IO layer to be stacked above FIP IO layer for optional
encryption of the BL31 and BL32 images in case the ENCRYPT_BL31 or
ENCRYPT_BL32 build flag is set.

Enable decryption support for FVP through setting the DECRYPTION_SUPPORT
build flag. "DECRYPTION_SUPPORT = aes_gcm" is set to perform authenticated
decryption using AES-GCM algorithm.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: Iebc3b360b4a0dc0d933b816d28015ac551b79405

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fix(io): add NULL check for spec io_open FIP

Add check to skip io_open() when spec is NULL to prevent invalid access.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I9e9d

fix(io): add NULL check for spec io_open FIP

Add check to skip io_open() when spec is NULL to prevent invalid access.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I9e9df8028c16d57bb9293c00afc1ce61601d8fd8

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Merge changes Ib172b554,I9971fd47 into integration

* changes:
docs(per-cpu): clean up NUMA docs
fix(per-cpu): remove redundant casts

Merge "fix(smccc): ignore SCR_EEL2_BIT" into integration

Merge "fix(allwinner): avoid crash when running without DTB" into integration

fix(smccc): ignore SCR_EEL2_BIT

Commit cbba59c41a99 ("enable SMCCC_ARCH_FEATURE_AVAILABILITY for RMM")
enables ARCH_FEATURE_AVAILABILITY by default when RME is enabled which
results into below asser

fix(smccc): ignore SCR_EEL2_BIT

Commit cbba59c41a99 ("enable SMCCC_ARCH_FEATURE_AVAILABILITY for RMM")
enables ARCH_FEATURE_AVAILABILITY by default when RME is enabled which
results into below assertion when RMM queries the features.

ERROR: Unexpected bits 0x40000 were set in register 1e1100!
ASSERT: services/arm_arch_svc/arm_arch_svc_setup.c:251

This happpens because SCR_EEL2_BIT is neither part of SCR_EL3_FEATS nor
part of SCR_EL3_IGNORED, as the SMCCC spec doesn't list SCR_EEL2_BIT as
reported, add it to SCR_EL3_IGNORED.

Change-Id: I0465744dc7f0ae589d6a8345c1cca63ac6f7f357
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>

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docs(per-cpu): clean up NUMA docs

This change incorporates resolutions for the remaining code review
comments on the NUMA documentation, which were intentionally left
unresolved when the NUMA stack

docs(per-cpu): clean up NUMA docs

This change incorporates resolutions for the remaining code review
comments on the NUMA documentation, which were intentionally left
unresolved when the NUMA stack was expedited.

Additionally, general improvements include:

- Documentation has been re-flowed with Pandoc;
- Diagram file-names follow naming conventions;
- Diagram alt-text better reflects the image content;
- Diagram widths scale with the content body width; and
- Grammar and spelling follow American English.

Change-Id: Ib172b554347caa8a72229081682b07fdb6417b64
Signed-off-by: Chris Kay <chris.kay@arm.com>

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fix(per-cpu): remove redundant casts

The casts replaced in this change were redundant; they were initially
added after some consideration of pointer provenance, but in these
particular cases loss of

fix(per-cpu): remove redundant casts

The casts replaced in this change were redundant; they were initially
added after some consideration of pointer provenance, but in these
particular cases loss of provenance is deliberate.

Change-Id: I9971fd47155b4ec395b2d8d7991c215d0c6a06d3
Signed-off-by: Chris Kay <chris.kay@arm.com>

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Merge "fix(build): set linker to lld before evaluating ld_option" into integration

Merge "docs(cpufeat): mark RME_GDI, IDTE3 and RME_GPC2 as supported" into integration

docs(cpufeat): mark RME_GDI, IDTE3 and RME_GPC2 as supported

Update architecture_features.rst to reflect that FEAT_RME_GDI,
FEAT_IDTE3, and FEAT_RME_GPC2 are now marked as OK instead of WIP.

Signed

docs(cpufeat): mark RME_GDI, IDTE3 and RME_GPC2 as supported

Update architecture_features.rst to reflect that FEAT_RME_GDI,
FEAT_IDTE3, and FEAT_RME_GPC2 are now marked as OK instead of WIP.

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I27cfd01657fe6df4b0a4e4551f120dd279830213

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