docs(changelog): add subsection for uSDHC

Add a new subsection for the NXP uSDHC driver, placed under the
drivers/imx/usdhc folder. Choose 'mmc' over 'usdhc' due to the length
advantage. This will l

docs(changelog): add subsection for uSDHC

Add a new subsection for the NXP uSDHC driver, placed under the
drivers/imx/usdhc folder. Choose 'mmc' over 'usdhc' due to the length
advantage. This will leave more space for the commit titles.

Change-Id: Ie024272c201b7cabf231c78143f4179c885020a5
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>

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Merge "fix(nxp): imx_trdc.h header guard" into integration

fix(nxp): imx_trdc.h header guard

The header guard define is IMX_XRDC_H where everything
else is IMX_TRDC_H, gcc-15 complains about this so
update the define to what it should be.

Fixes: 293529100

fix(nxp): imx_trdc.h header guard

The header guard define is IMX_XRDC_H where everything
else is IMX_TRDC_H, gcc-15 complains about this so
update the define to what it should be.

Fixes: 293529100 ("feat(imx93): add the trdc driver")
Change-Id: I4767dc4d1c26ebe95d417be724f5cb848f54a524
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>

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Merge "fix(libc): add const qualifier" into integration

Merge "chore(docs): add a SBOM template in CycloneDX format" into integration

Merge changes from topic "psa_key_id_mgmt" into integration

* changes:
feat(auth): extend REGISTER_CRYPTO_LIB calls
feat(bl): adding psa crypto - crypto_mod_finish()
feat(fvp): increase BL1 RW

Merge changes from topic "psa_key_id_mgmt" into integration

* changes:
feat(auth): extend REGISTER_CRYPTO_LIB calls
feat(bl): adding psa crypto - crypto_mod_finish()
feat(fvp): increase BL1 RW for PSA Crypto
feat(auth): mbedtls psa key id mgmt
feat(auth): add crypto_mod_finish() function
feat(auth): add update of current_pk_oid in auth
feat(auth): add util file for current pk_oid
feat(auth): increase mbedtls heap for PSA RSA
feat(auth): introducing auth.mk

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feat(auth): extend REGISTER_CRYPTO_LIB calls

Extend REGISTER_CRYPTO_LIB calls with NULL to allow for
the addition of the cryto_mod_finish() function.

Signed-off-by: Lauren Wehrmeister <lauren.wehrm

feat(auth): extend REGISTER_CRYPTO_LIB calls

Extend REGISTER_CRYPTO_LIB calls with NULL to allow for
the addition of the cryto_mod_finish() function.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: If41ed1be50e1d98b42b266c7905269f142bb67c7

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feat(bl): adding psa crypto - crypto_mod_finish()

Adding call to crypto_mod_finish() at the end of crypto usage in the
bl mains. This is currently used for psa crytpo to destroy the
psa_key_ids in t

feat(bl): adding psa crypto - crypto_mod_finish()

Adding call to crypto_mod_finish() at the end of crypto usage in the
bl mains. This is currently used for psa crytpo to destroy the
psa_key_ids in the psa key store, but could be expanded if required
later.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I3dba9fe87b6bb64b629dda9d6c4653b116e7ee62

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feat(fvp): increase BL1 RW for PSA Crypto

Increase BL1 RW for PSA Crypto due to PSA key ID management redesign
needing an increase in heap size.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeiste

feat(fvp): increase BL1 RW for PSA Crypto

Increase BL1 RW for PSA Crypto due to PSA key ID management redesign
needing an increase in heap size.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I7c8d009f244be6252eff0d3ded3f1ca83fb1de21

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feat(auth): mbedtls psa key id mgmt

Currently the psa key is created and destroyed after each usage during
signature verification.

This redesign adds a key_cache to store the key ID, psa algorithm,

feat(auth): mbedtls psa key id mgmt

Currently the psa key is created and destroyed after each usage during
signature verification.

This redesign adds a key_cache to store the key ID, psa algorithm, and
key attributes associated with a particular pk_oid. This allows for the
psa key to be reused by each image that has the associated pk_oid.

The pk_oid of the image being authenticated is stored as the global
current_pk_oid variable, which is used during the psa crypto
verification stage to associate a key_cache entry with a particular
pk_oid.

Since the psa key is no longer destroyed after each usage, the psa keys
are therefore destroyed after all images have been loaded during each
boot phase in the new crypto_mod_finish() function that is registered
by the REGISTER_CRYPTO_LIB and enabled through the build option of
PSA_CRYTPO.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: Iba330bc659a76493bd958673424efcc621bab1c4

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feat(auth): add crypto_mod_finish() function

Adding crypto_mod_finish() function to be run at the end of crypto usage
to cleanup.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Chan

feat(auth): add crypto_mod_finish() function

Adding crypto_mod_finish() function to be run at the end of crypto usage
to cleanup.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: Ib6d099ddaa278f293fe14b805070985522a85686

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feat(auth): add update of current_pk_oid in auth

Adding the set of current_pk_oid during the authentication process,
include the new file in auth makefile.

Signed-off-by: Lauren Wehrmeister <lauren

feat(auth): add update of current_pk_oid in auth

Adding the set of current_pk_oid during the authentication process,
include the new file in auth makefile.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I3e05b8607060b424e34642d23e4960d2ef0f71f0

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feat(auth): add util file for current pk_oid

Adding new auth util file for the current_pk_oid and get and set
functions.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I9

feat(auth): add util file for current pk_oid

Adding new auth util file for the current_pk_oid and get and set
functions.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I91220f94d469c86f2e18570e13f1419125447288

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feat(auth): increase mbedtls heap for PSA RSA

Increase default mbedtls PSA crypto heap size for key id management
redesign where the key information is stored for reuse during
verification and needs

feat(auth): increase mbedtls heap for PSA RSA

Increase default mbedtls PSA crypto heap size for key id management
redesign where the key information is stored for reuse during
verification and needs more heap size for RSA keys.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I3afe0107a8e22ededd3eb4c0e1f635f18960d341

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feat(auth): introducing auth.mk

Introducing authentication specific makefile auth.mk to include common
auth source files.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I

feat(auth): introducing auth.mk

Introducing authentication specific makefile auth.mk to include common
auth source files.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: Ifb07c48861fe415d82cb7390c3a5f6e60ba699d9

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Merge changes from topic "refactor_eip76_driver" into integration

* changes:
feat(marvell): add trng driver
revert(rambus-trng): remove ip-76 driver

chore(docs): add a SBOM template in CycloneDX format

Improve supply chain security by including a SBOM file with substituted
values.

This will be used to construct a composite platform SBOM.

Chang

chore(docs): add a SBOM template in CycloneDX format

Improve supply chain security by including a SBOM file with substituted
values.

This will be used to construct a composite platform SBOM.

Change-Id: Ia34338854a0eaa4f3a8799c23e46aae382792252
Signed-off-by: Richard Hughes <richard@hughsie.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(marvell): add trng driver

Armada-7K/8K and CN913x integrated the Rambus EIP-97 IP on CP11x die. It
supports to generate up to 4 32-bit random number in one shot.

This trivial driver provisions

feat(marvell): add trng driver

Armada-7K/8K and CN913x integrated the Rambus EIP-97 IP on CP11x die. It
supports to generate up to 4 32-bit random number in one shot.

This trivial driver provisions a simple API to read the random numbers
from hardware. It allows the bootloader to get one 32-bit or 64-bit
random number via SMC call to support KASLR.

Change-Id: I1707a85512ca163b8c7ab1644ff0f7e2fcf57344
Signed-off-by: Wilson Ding <dingwei@marvell.com>

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Merge "fix(imx93): trdc: restrict BLK_CTRL_S_AONMIX to secure world" into integration

Merge "fix(rcar): use platform_def" into integration

Merge "fix(cpus): drop esb from the Neoverse N1" into integration

Merge changes from topic "xlnx_versal_misra_fixes" into integration

* changes:
fix(xilinx): resolve misra rule 2.3 violations
fix(xilinx): resolve misra rule 2.7 violations
fix(xilinx): resolv

Merge changes from topic "xlnx_versal_misra_fixes" into integration

* changes:
fix(xilinx): resolve misra rule 2.3 violations
fix(xilinx): resolve misra rule 2.7 violations
fix(xilinx): resolve misra rule 8.6 violations
fix(xilinx): resolve misra rule 11.3 violations
fix(xilinx): resolve misra rule 2.2 violations
fix(xilinx): resolve misra rule 15.7 violations

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refactor(zynqmp): refactor custom sip service

Refactored the custom SIP service code and relocated it to a
common directory to support additional platforms and enhance
code readability. Renamed ZYNQ

refactor(zynqmp): refactor custom sip service

Refactored the custom SIP service code and relocated it to a
common directory to support additional platforms and enhance
code readability. Renamed ZYNQMP_SIP_SVC_CUSTOM to a generic
SOC_SIP_SVC_CUSTOM for better with other across SoCs

Change-Id: Id114f717d0397e257a831c7d5b67104c2c766d09
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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Merge "docs: update maintainers file with active code owners" into integration

fix(cpus): drop esb from the Neoverse N1

An esb is only necessary when FEAT_IESB is not present in hardware but
FEAT_RAS is. When FEAT_RAS is present we rely on the fact that FEAT_IESB
will also be

fix(cpus): drop esb from the Neoverse N1

An esb is only necessary when FEAT_IESB is not present in hardware but
FEAT_RAS is. When FEAT_RAS is present we rely on the fact that FEAT_IESB
will also be present and an implicit esb will pre present on eret.

Well the N1 implements FEAT_RAS and FEAT_IESB and the platforms that use
it (n1sdp) enable the features in firmware. So the esb is redundant.
There are dynamic platforms where this may not necessarily be true,
however, the esb is in an erratum workaround which cannot be present in
these platforms.

Change-Id: I5775180ec61373cc5d1b9831e3fa0f2fbb19eab9
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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