| ee6ff1bb | 19-Feb-2018 |
Jeenu Viswambharan <jeenu.viswambharan@arm.com> |
RAS: Validate stack pointer after error handling
RAS handling flows might involve using setjmp/longjump calls introduced in earlier patches; therefore, it'd be good to make sure the stack has been u
RAS: Validate stack pointer after error handling
RAS handling flows might involve using setjmp/longjump calls introduced in earlier patches; therefore, it'd be good to make sure the stack has been unwound completely after the handling.
This patch inserts ASM assertions on the RAS handling path to validate stack.
Change-Id: I59d40d3122010c977cdeab3cce3160f3909e7e69 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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| df8f3188 | 05-Jul-2018 |
Jeenu Viswambharan <jeenu.viswambharan@arm.com> |
RAS: Move EA handling to a separate file
A new file ea_delegate.S is introduced, and all EA-related functions are moved into it. This makes runtime_exceptions.S less crowded and reads better.
No fu
RAS: Move EA handling to a separate file
A new file ea_delegate.S is introduced, and all EA-related functions are moved into it. This makes runtime_exceptions.S less crowded and reads better.
No functional changes.
Change-Id: I64b653b3931984cffd420563f8e8d1ba263f329f Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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| aa49bde8 | 15-Jul-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
rpi3: Move NS-DRAM out of the protected region
The Non-secure DRAM region shouldn't be protected in the range specified in the Linux command line with memmap.
This change also increases the size of
rpi3: Move NS-DRAM out of the protected region
The Non-secure DRAM region shouldn't be protected in the range specified in the Linux command line with memmap.
This change also increases the size of the Secure DRAM region.
Change-Id: I306e9e443a84b834c99739f54a534a3ca3be2424 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 97fb05e1 | 15-Jul-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
rpi3: Switch addresses of kernel and DTB
In the memory map of the documentation the kernel only had 16MiB of allocated space. This leaves very little room for growth, so the addresses of the DTB and
rpi3: Switch addresses of kernel and DTB
In the memory map of the documentation the kernel only had 16MiB of allocated space. This leaves very little room for growth, so the addresses of the DTB and the kernel have been interchanged.
The documentation has been updated to reflect this change.
Change-Id: Ib6eab69f047fa88561fb755397ce3a0b356c8860 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 5e2e024b | 14-Jul-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
rpi3: Update documentation
Add information about direct Linux kernel boot for kernels that support PSCI.
Change-Id: I05f76aa36398edabf411cb25a646437af1862e6e Signed-off-by: Antonio Nino Diaz <anton
rpi3: Update documentation
Add information about direct Linux kernel boot for kernels that support PSCI.
Change-Id: I05f76aa36398edabf411cb25a646437af1862e6e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 76c944a4 | 15-Jul-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
rpi3: Add support for direct Linux kernel boot
This option allows the Trusted Firmware to pass the correct arguments to a 32 or 64-bit Linux kernel without the need of an intermediate loader such as
rpi3: Add support for direct Linux kernel boot
This option allows the Trusted Firmware to pass the correct arguments to a 32 or 64-bit Linux kernel without the need of an intermediate loader such as U-Boot.
Change-Id: I2b22e8933fad6a614588ace559f893e97329801f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 6d924ca9 | 14-Jul-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
rpi3: Don't wire mailbox 3 to FIQ line
FIQs shouldn't be used at all as long as the interrupt routing doesn't support them properly.
Change-Id: Ib1db7b523a62de2035d41197bc791048337cf791 Signed-off-
rpi3: Don't wire mailbox 3 to FIQ line
FIQs shouldn't be used at all as long as the interrupt routing doesn't support them properly.
Change-Id: Ib1db7b523a62de2035d41197bc791048337cf791 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 6297d6fe | 14-Jul-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
rpi3: Fix warm entrypoint setup for PSCI_CPU_ON
Remove unused variable and set the secure entrypoint correctly.
Change-Id: I7447ea62771092de6be35704077ae28c519d6993 Signed-off-by: Antonio Nino Diaz
rpi3: Fix warm entrypoint setup for PSCI_CPU_ON
Remove unused variable and set the secure entrypoint correctly.
Change-Id: I7447ea62771092de6be35704077ae28c519d6993 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 1aad932c | 13-Jul-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
rpi3: Add support for the stack protector
It uses the hardware RNG in a similar way as Juno (it gets 128 bits of entropy and does xor on them).
It is disabled by default.
Change-Id: I8b3adb61f5a56
rpi3: Add support for the stack protector
It uses the hardware RNG in a similar way as Juno (it gets 128 bits of entropy and does xor on them).
It is disabled by default.
Change-Id: I8b3adb61f5a5623716e0e8b6799404c68dd94c60 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 4ad2696d | 13-Jul-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
rpi3: Introduce hardware RNG driver
Note that this is a non-secure RNG. This is only useful for educational purposes.
Change-Id: If359c8d0f755ef8e416986de7fbca34679a523e1 Signed-off-by: Antonio Nin
rpi3: Introduce hardware RNG driver
Note that this is a non-secure RNG. This is only useful for educational purposes.
Change-Id: If359c8d0f755ef8e416986de7fbca34679a523e1 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 98967fb1 | 13-Jul-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
rpi3: Remove broken support of RESET_TO_BL31
There is no way to boot BL31 at the addresses specified in the platform memory map unless an extra loader is used at address 0x00000000. It is better to
rpi3: Remove broken support of RESET_TO_BL31
There is no way to boot BL31 at the addresses specified in the platform memory map unless an extra loader is used at address 0x00000000. It is better to remove it to prevent confusion. Having it enabled was a bug.
Change-Id: I3229fbc080f5996cff47efce8e799bae94e0d5cb Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| f9d2808a | 16-Jul-2018 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1478 from antonio-nino-diaz-arm/an/rpi3-improvements
rpi3: A few improvements |
| 1dd6c051 | 12-Jul-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
xlat: Remove references to the Trusted Firmware
This library can be used in other projects. All comments that talk about the Trusted Firmware should be talking about the library itself.
Change-Id:
xlat: Remove references to the Trusted Firmware
This library can be used in other projects. All comments that talk about the Trusted Firmware should be talking about the library itself.
Change-Id: I3b98d42f7132be72c1f8a4900acfaa78dbd2daa2 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 73b0eaf1 | 11-Jul-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
SPM: Use generic MMU setup functions
Instead of having a different initialization routine than the rest of the codebase, use the common implementation.
Change-Id: I27c03b9905f3cf0af8810aad9e4309200
SPM: Use generic MMU setup functions
Instead of having a different initialization routine than the rest of the codebase, use the common implementation.
Change-Id: I27c03b9905f3cf0af8810aad9e43092005387a1a Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 63ddbae3 | 15-Jul-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
xlat v2: Make setup_mmu_config public
This allows other parts of the code to reuse it. No functional changes.
Change-Id: Ib052ae235c422d9179958bd3016c3e678779ae9b Signed-off-by: Antonio Nino Diaz <
xlat v2: Make setup_mmu_config public
This allows other parts of the code to reuse it. No functional changes.
Change-Id: Ib052ae235c422d9179958bd3016c3e678779ae9b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 4f2f66a2 | 12-Jul-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
rpi3: Detect board revision
Implement VideoCore mailbox interface driver and use it to get the board revision identifier.
For now it is only used to print the model for debug purposes.
This wiki c
rpi3: Detect board revision
Implement VideoCore mailbox interface driver and use it to get the board revision identifier.
For now it is only used to print the model for debug purposes.
This wiki contains the documentation of the mailbox interface:
https://github.com/raspberrypi/firmware/wiki
Change-Id: I11943b99b52cc1409f4a195ebe58eb44ae5b1d6c Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 42ba8f74 | 14-Jul-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
rpi3: Implement PSCI_SYSTEM_OFF
This implementation doesn't actually turn the system off, it simply reboots it and prevents it from booting while keeping it in a low power mode.
Change-Id: I7f72c9f
rpi3: Implement PSCI_SYSTEM_OFF
This implementation doesn't actually turn the system off, it simply reboots it and prevents it from booting while keeping it in a low power mode.
Change-Id: I7f72c9f43f25ba0341db052bc2be4774c88a7ea3 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 64fe343c | 12-Jul-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
rpi3: Concatenate BL1 and FIP automatically
Add a new default makefile target to concatenate BL1 and the FIP and generate armstub8.bin. This way it isn't needed to do it manually.
Documentation upd
rpi3: Concatenate BL1 and FIP automatically
Add a new default makefile target to concatenate BL1 and the FIP and generate armstub8.bin. This way it isn't needed to do it manually.
Documentation updated to reflect the changes.
Change-Id: Id5b5b1b7b9f87767db63fd01180ddfea855a7207 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 9ceda8b9 | 13-Jul-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1477 from dp-arm/dp/css-ap-core
CSS: Add support for SCMI AP core config protocol |
| 6563c0be | 12-Jul-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
xlat v2: Turn MMU parameters into 64-bit values
Most registers are 64-bit wide, even in AArch32 mode:
- MAIR_ELx is equivalent to MAIR0 and MAIR1. - TTBR is 64 bit in both AArch64 and AArch32.
The
xlat v2: Turn MMU parameters into 64-bit values
Most registers are 64-bit wide, even in AArch32 mode:
- MAIR_ELx is equivalent to MAIR0 and MAIR1. - TTBR is 64 bit in both AArch64 and AArch32.
The only difference is the TCR register, which is 32 bit in AArch32 and in EL3 in AArch64. For consistency with the rest of ELs in AArch64, it makes sense to also have it as a 64-bit value.
Change-Id: I2274d66a28876702e7085df5f8aad0e7ec139da9 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| aa1d5f60 | 12-Jul-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
xlat v2: Remove IMAGE_EL define
The Exception Level is now detected at runtime. This means that it is not needed to hardcode the EL used by each image.
This doesn't result in a substantial increase
xlat v2: Remove IMAGE_EL define
The Exception Level is now detected at runtime. This means that it is not needed to hardcode the EL used by each image.
This doesn't result in a substantial increase of the image size because the initialization functions that aren't used are garbage-collected by the linker.
In AArch32 the current EL has been changed from EL3 to EL1 because the the AArch32 PL1&0 translation regime behaves more like the AArch64 EL1&0 translation regime than the EL3 one.
Change-Id: I941404299ebe7666ca17619207c923b49a55cb73 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 8d164bc6 | 11-Jul-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
xlat v2: Remove unused tlbi helper
xlat_arch_tlbi_va_regime() isn't used, so it has been renamed to xlat_arch_tlbi_va() and the previous implementation has been removed.
Change-Id: Ic118bed3fb68234
xlat v2: Remove unused tlbi helper
xlat_arch_tlbi_va_regime() isn't used, so it has been renamed to xlat_arch_tlbi_va() and the previous implementation has been removed.
Change-Id: Ic118bed3fb68234748d86b2e9e95b25650289276 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 468e2382 | 05-Jul-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
xlat v2: Remove architectural headers
They only contained one function that is easily integrated in the private library header and the existing architectural C files.
This also helps making the lib
xlat v2: Remove architectural headers
They only contained one function that is easily integrated in the private library header and the existing architectural C files.
This also helps making the library more portable, as the Makefile of the library now doesn't use the variable INCLUDES, which is specific to this codebase and doesn't respect the namespace of the library.
Change-Id: I22228e6a97e9b4f346f5cd8947609263e8df71d8 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| c426fd70 | 21-Jun-2018 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Tegra: Fix up INFO() message
With commit cf24229e6ef4 ("Run compiler on debug macros for type checking"), the compiler will now always evaluate INFO() macro calls, no matter the LOG_LEVEL value. The
Tegra: Fix up INFO() message
With commit cf24229e6ef4 ("Run compiler on debug macros for type checking"), the compiler will now always evaluate INFO() macro calls, no matter the LOG_LEVEL value. Therefore, any variable referenced in the macro has to be be defined.
Address this issue by removing the local variable and using the expression it was assigned directly in the INFO() call.
Change-Id: Iedc23b3538c1e162372e85390881e50718e50bf3 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| 6f4ee720 | 20-Jun-2018 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Fix verbose messages in SDEI code
Fix mismatches between the format specifier and the corresponding variable type.
Change-Id: Ib9004bd9baa9ba24a50000bea4f2418e1bf7e743 Signed-off-by: Sandrine Baill
Fix verbose messages in SDEI code
Fix mismatches between the format specifier and the corresponding variable type.
Change-Id: Ib9004bd9baa9ba24a50000bea4f2418e1bf7e743 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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