| 6f3ee4a8 | 24-Aug-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "SPMD: Dont forward PARTITION_INFO_GET from secure FF-A instance" into integration |
| 0df3eb70 | 31-Jul-2020 |
Sayanta Pattanayak <sayanta.pattanayak@arm.com> |
n1sdp: remote chip SPI numbering for multichip GIC routing
Allocated 512-959 SPI numbers for remote n1sdp chip and same has been referenced for GIC routing table.
Change-Id: Id79ea493fd665ed93fe964
n1sdp: remote chip SPI numbering for multichip GIC routing
Allocated 512-959 SPI numbers for remote n1sdp chip and same has been referenced for GIC routing table.
Change-Id: Id79ea493fd665ed93fe9644a59e363ec10441098 Signed-off-by: Sayanta Pattanayak <sayanta.pattanayak@arm.com>
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| fafd3ec9 | 13-Aug-2020 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
tools: Get the tool's binary name from the main makefile
Currently, the tool's makefile override the tool's binary name which is already been defined in the main makefile. Hence fix is provided so t
tools: Get the tool's binary name from the main makefile
Currently, the tool's makefile override the tool's binary name which is already been defined in the main makefile. Hence fix is provided so that the tool's makefile get the tool's binary name from the main makefile instead of overriding it.
Change-Id: I8af2bd391a96bba2dbcddef711338a94ebf5f038 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 8d0a3bb3 | 21-Aug-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "Revert "libc/memset: Implement function in assembler"" into integration |
| f5402ef7 | 19-Aug-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Revert "libc/memset: Implement function in assembler"
This reverts commit e7d344de01ad11b856233634717aafe9312697e4. This reverts the patch https://review.trustedfirmware.org/c/TF-A/trusted-firmware
Revert "libc/memset: Implement function in assembler"
This reverts commit e7d344de01ad11b856233634717aafe9312697e4. This reverts the patch https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/5313 due to a timing issue with the merge. The merge occurred at the same time as the additional comments and thusly were were not seen until the merge was done. This reverts the change and additional patches from Alexei will follow to address the concerns expressed in the orignal patch.
Change-Id: Iae5f6403c93ac13ceeda29463883fcd4c437f2b7
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| 545b8eb3 | 28-Jul-2020 |
Ruari Phipps <ruari.phipps@arm.com> |
SPMD: Dont forward PARTITION_INFO_GET from secure FF-A instance
Signed-off-by: Ruari Phipps <ruari.phipps@arm.com> Change-Id: I4e9fbfcfda4ed4b87d5ece1c609c57c73d617d4c |
| a6ab1ae3 | 21-Aug-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "spm-secondary-cores" into integration
* changes: SPMC: embed secondary core ep info into to SPMC context SPMC: manifest changes to support multicore boot SPMD: second
Merge changes from topic "spm-secondary-cores" into integration
* changes: SPMC: embed secondary core ep info into to SPMC context SPMC: manifest changes to support multicore boot SPMD: secondary cores PM on and off SPD hooks relayed to SPMC SPMD: handle SPMC message to register secondary core entry point SPMD: introduce SPMC to SPMD messages SPMD: register the SPD PM hooks SPMD: add generic SPD PM handlers SPMD: enhance SPMC internal boot states SPMD: entry point info get helper
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| 768f8331 | 21-Aug-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "doc: Minor formatting improvement in the coding guidelines document" into integration |
| 02d50bb0 | 19-Jun-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
SPMC: embed secondary core ep info into to SPMC context
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: Icdb15b8664fb3467ffd55
SPMC: embed secondary core ep info into to SPMC context
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: Icdb15b8664fb3467ffd55b44d1f0660457192586
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| 2111b002 | 12-Jun-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
SPMC: manifest changes to support multicore boot
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: Icf90c2ccce75257908ba3d470392
SPMC: manifest changes to support multicore boot
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: Icf90c2ccce75257908ba3d4703926041d64b1dd3
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| a92bc73b | 23-Mar-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
SPMD: secondary cores PM on and off SPD hooks relayed to SPMC
Define SPMD PM hooks for warm boot and off events. svc_on_finish handler enters the SPMC at the entry point defined by the secondary EP
SPMD: secondary cores PM on and off SPD hooks relayed to SPMC
Define SPMD PM hooks for warm boot and off events. svc_on_finish handler enters the SPMC at the entry point defined by the secondary EP register service. The svc_off handler notifies the SPMC that a physical core is being turned off through a notification message.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I2609a75a0c6ffb9f6313fc09553be2b29a41de59
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| f0d743db | 16-Apr-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
SPMD: handle SPMC message to register secondary core entry point
Upon booting, the SPMC running on the primary core shall register the secondary core entry points to which a given secondary core bei
SPMD: handle SPMC message to register secondary core entry point
Upon booting, the SPMC running on the primary core shall register the secondary core entry points to which a given secondary core being woken up shall jump to into the SPMC . The current implementation assumes the SPMC calls a registering service implemented in the SPMD for each core identified by its MPIDR. This can typically happen in a simple loop implemented in the early SPMC initialization routines by passing each core identifier associated with an entry point address and context information. This service is implemented on top of a more generic SPMC<=>SPMD interface using direct request/response message passing as defined by the FF-A specification.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: I1f70163b6b5cee0880bd2004e1fec41e3780ba35
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| c2901419 | 16-Apr-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
SPMD: introduce SPMC to SPMD messages
FF-A interface to handle SPMC to SPMD direct messages requests.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.sve
SPMD: introduce SPMC to SPMD messages
FF-A interface to handle SPMC to SPMD direct messages requests.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: Ia707a308c55561a31dcfa86e554ea1c9e23f862a
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| a334c4e6 | 28-Oct-2019 |
Olivier Deprez <olivier.deprez@arm.com> |
SPMD: register the SPD PM hooks
Change-Id: If88d64c0e3d60accd2638a55f9f3299ec700a8c8 Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> |
| b058f20a | 28-Oct-2019 |
Olivier Deprez <olivier.deprez@arm.com> |
SPMD: add generic SPD PM handlers
This patch defines and registers the SPMD PM handler hooks. This is intended to relay boot and PM events to the SPMC.
Change-Id: If5a758d22b8d2152cbbb83a0cad563b5e
SPMD: add generic SPD PM handlers
This patch defines and registers the SPMD PM handler hooks. This is intended to relay boot and PM events to the SPMC.
Change-Id: If5a758d22b8d2152cbbb83a0cad563b5e1c6bd49 Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
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| 9dcf63dd | 28-Oct-2019 |
Olivier Deprez <olivier.deprez@arm.com> |
SPMD: enhance SPMC internal boot states
This patch adds SPMC states used by the SPMD to track SPMC boot phases specifically on secondary cores.
Change-Id: If97af7352dda7f04a8e46a56892a2aeddcfab91b
SPMD: enhance SPMC internal boot states
This patch adds SPMC states used by the SPMD to track SPMC boot phases specifically on secondary cores.
Change-Id: If97af7352dda7f04a8e46a56892a2aeddcfab91b Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
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| c0267cc9 | 28-Oct-2019 |
Olivier Deprez <olivier.deprez@arm.com> |
SPMD: entry point info get helper
This patch provides a helper to get the entry_point_info structure used by the boot CPU as it is used to initialise the SPMC context on secondary CPUs.
Change-Id:
SPMD: entry point info get helper
This patch provides a helper to get the entry_point_info structure used by the boot CPU as it is used to initialise the SPMC context on secondary CPUs.
Change-Id: I99087dc7a86a7258e545d24a2ff06aa25170f00c Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
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| 06ffa166 | 20-Aug-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
doc: Recommend using C rather than assembly language
Add a section for that in the coding guidelines.
Change-Id: Ie6819c4df5889a861460eb96acf2bc9c0cfb494e Signed-off-by: Sandrine Bailleux <sandrine
doc: Recommend using C rather than assembly language
Add a section for that in the coding guidelines.
Change-Id: Ie6819c4df5889a861460eb96acf2bc9c0cfb494e Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| 1566bc3e | 20-Aug-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "plat: imx8m: Fix the race condition during cpu hotplug" into integration |
| 76380111 | 20-Aug-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "at_errata_fix" into integration
* changes: doc: Update description for AT speculative workaround lib/cpus: Report AT speculative erratum workaround Add wrapper for AT
Merge changes from topic "at_errata_fix" into integration
* changes: doc: Update description for AT speculative workaround lib/cpus: Report AT speculative erratum workaround Add wrapper for AT instruction
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| fe5e1c14 | 07-Jan-2020 |
Jacky Bai <ping.bai@nxp.com> |
plat: imx8m: Fix the race condition during cpu hotplug
CPU hotplug & cpuidle have some race condition when doing CPU hotplug stress test. different CPU cores have the chance to access the same GPC r
plat: imx8m: Fix the race condition during cpu hotplug
CPU hotplug & cpuidle have some race condition when doing CPU hotplug stress test. different CPU cores have the chance to access the same GPC register(A53_AD), so lock is necessary to do exlusive access.
Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: I1296592e05fa78429c3f0fac066951521db755e3
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| 15e54af3 | 20-Aug-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "SPM: Add third cactus partition to manifests" into integration |
| 9061c0c9 | 20-Aug-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
doc: Minor formatting improvement in the coding guidelines document
Change-Id: I5362780db422772fd547dc8e68e459109edccdd0 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> |
| e168b66d | 19-Aug-2020 |
André Przywara <andre.przywara@arm.com> |
Merge changes from topic "aw_drivevbus" into integration
* changes: plat/allwinner: Only enable DRIVEVBUS if really needed plat/allwinner: Use common gicv2.mk |
| e5c84ca6 | 19-Aug-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "libc/memset: Implement function in assembler" into integration |