rockchip: support the suspend/resume for rk3399

This patch adds to support the suspend/resume for rk3399 SoCs.

Signed-off-by: Shengfei xu <xsf@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-c

rockchip: support the suspend/resume for rk3399

This patch adds to support the suspend/resume for rk3399 SoCs.

Signed-off-by: Shengfei xu <xsf@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

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Refactor MediaTek platform common code

Refactor MediaTek platform common code for further mt6795 upstream.

Change the default driver to GICv3 in FVP

This patch changes the default driver for FVP platform from the deprecated
GICv3 legacy to the GICv3 only driver. This means that the default build of
Trust

Change the default driver to GICv3 in FVP

This patch changes the default driver for FVP platform from the deprecated
GICv3 legacy to the GICv3 only driver. This means that the default build of
Trusted Firmware will not be able boot Linux kernel with GICv2 FDT blob. The
user guide is also updated to reflect this change of default GIC driver for
FVP.

Change-Id: Id6fc8c1ac16ad633dabb3cd189b690415a047764

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Remove support for legacy VE memory map in FVP

This patch removes support for legacy Versatile Express memory map for the
GIC peripheral in the FVP platform. The user guide is also updated for the
s

Remove support for legacy VE memory map in FVP

This patch removes support for legacy Versatile Express memory map for the
GIC peripheral in the FVP platform. The user guide is also updated for the
same.

Change-Id: Ib8cfb819083aca359e5b46b5757cb56cb0ea6533

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Conditionally compile `plat_get_syscnt_freq()` in ARM standard platforms

This patch puts the definition of `plat_get_syscnt_freq()`
under `#ifdef ARM_SYS_CNTCTL_BASE` in arm_common.c file.
This is t

Conditionally compile `plat_get_syscnt_freq()` in ARM standard platforms

This patch puts the definition of `plat_get_syscnt_freq()`
under `#ifdef ARM_SYS_CNTCTL_BASE` in arm_common.c file.
This is the fix for compilation error introduced by commit-id
`749ade4`, for platforms that use arm_common.c but do not
provide a memory mapped interface to the generic counter.

Fixes ARM-software/tf-issues#395

Change-Id: I2f2b10bd9500fa15308541ccb15829306a76a745

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zynqmp: FSBL->ATF handover

Parse the parameter structure the FSBL populates, to populate the bl32
and bl33 image structures.

Cc: Sarat Chand Savitala <saratcha@xilinx.com>
Cc: petalinux-dev@xilinx.

zynqmp: FSBL->ATF handover

Parse the parameter structure the FSBL populates, to populate the bl32
and bl33 image structures.

Cc: Sarat Chand Savitala <saratcha@xilinx.com>
Cc: petalinux-dev@xilinx.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
[ SB
- pass pointers to structs instead of structs
- handle execution state parameter
- populate bl32 SPSR
- add documentation
- query bootmode and consider missing handoff parameters an error when
not in JTAG boot mode
]
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>

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zynqmp: Introduce zynqmp_get_bootmode

Provide a function to retrieve the bootmode.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

zynqmp: Remove bogus comment

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

zynqmp: Revise memory configuration options

Drop the current configuration options for selecting the location of
the ATF and TSP (ZYNQMP_ATF_LOCATION, ZYNQMP_TSP_RAM_LOCATION).
The new configuration

zynqmp: Revise memory configuration options

Drop the current configuration options for selecting the location of
the ATF and TSP (ZYNQMP_ATF_LOCATION, ZYNQMP_TSP_RAM_LOCATION).
The new configuration provides one default setup (ATF in OCM,
BL32 in DRAM). Additionally, the new configuration options
- ZYNQMP_ATF_MEM_BASE
- ZYNQMP_ATF_MEM_SIZE
- ZYNQMP_BL32_MEM_BASE
- ZYNQMP_BL32_MEM_SIZE
can be used to freely configure the memory locations used for ATF and
secure payload.

Also, allow setting the BL33 entry point via PRELOADED_BL33_BASE.

Cc: petalinux-dev@xilinx.com
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Alistair Francis <alistair.francis@xilinx.com>

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Merge pull request #602 from rockchip-linux/fixes-for-coreboot_v1

rockchip: fixes for the required

rockchip: fixes for the required

This patch has the following change for rk3399.

* Set the uart to 115200 since the loader decide to set
uart baud to 115200Hz. So the ATF also should set uart bau

rockchip: fixes for the required

This patch has the following change for rk3399.

* Set the uart to 115200 since the loader decide to set
uart baud to 115200Hz. So the ATF also should set uart baud to 115200.

* We need ensure the bl31 base is greater than 4KB since there are have
the shared mem for coreboot.(Note: the previous vesion was tested with uboot)

Otherwise, we will happen the exception crash since the ddr area won't
to work from the shared ram address in some cases.

For example, the exception crash:
CBFS: Found @ offset 19c80 size 24074
exception _sync_sp_el0
ELR = 0x0000000000008000
ESR = 0x0000000002000000
SPSR = 0x600003cc
FAR = 0xffffffff00000000
SP = 0x00000000ff8ed230
...
X29 = 0x00000000ff8c1fc0
X30 = 0x000000000030e3b0
exception death

Change-Id: I8bc557c6bcaf6804d2a313b38667d3e2517881d7
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

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Move `plat_get_syscnt_freq()` to arm_common.c

This patch moves the definition for `plat_get_syscnt_freq()`
from arm_bl31_setup.c to arm_common.c. This could be useful
in case a delay timer needs to

Move `plat_get_syscnt_freq()` to arm_common.c

This patch moves the definition for `plat_get_syscnt_freq()`
from arm_bl31_setup.c to arm_common.c. This could be useful
in case a delay timer needs to be installed based on the
generic timer in other BLs.
This patch also modifies the return type for this function
from `uint64_t` to `unsigned long long` within ARM and other
platform files.

Change-Id: Iccdfa811948e660d4fdcaae60ad1d700e4eda80d

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zynqmp: ipi: Consolidate IRQ #defines

The bit mapping in I(E|D|S)R are equal, consolidate the #defines.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.si

zynqmp: ipi: Consolidate IRQ #defines

The bit mapping in I(E|D|S)R are equal, consolidate the #defines.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

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zynqmp: Remove unused/redundant #includes

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

Dump platform-defined regs in crash reporting

It is up to the platform to implement the new plat_crash_print_regs macro to
report all relevant platform registers helpful for troubleshooting.

plat_c

Dump platform-defined regs in crash reporting

It is up to the platform to implement the new plat_crash_print_regs macro to
report all relevant platform registers helpful for troubleshooting.

plat_crash_print_regs merges or calls previously defined plat_print_gic_regs
and plat_print_interconnect_regs macros for each existing platforms.

NOTE: THIS COMMIT REQUIRES ALL PLATFORMS THAT ENABLE THE `CRASH_REPORTING`
BUILD FLAG TO MIGRATE TO USE THE NEW `plat_crash_print_regs()` MACRO. BY
DEFAULT, `CRASH_REPORTING` IS ENABLED IN DEBUG BUILDS FOR ALL PLATFORMS.

Fixes: arm-software/tf-issues#373

Signed-off-by: Gerald Lejeune <gerald.lejeune@st.com>

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Merge pull request #593 from mtk09422/mtcmos-fix

mt8173: Fix timing issue of mfg mtcmos power off

mt8173: Fix timing issue of mfg mtcmos power off

In mt8173, there are totally 10 non-cpu mtcmos, so we cannot tell
if SPM finished the power control flow by 10 status bits of PASR_PDP_3.
So, extend

mt8173: Fix timing issue of mfg mtcmos power off

In mt8173, there are totally 10 non-cpu mtcmos, so we cannot tell
if SPM finished the power control flow by 10 status bits of PASR_PDP_3.
So, extend PASR_PDP_3 status bits from 10 to 20 so that we can
make sure if the control action has been done precisely.

Change-Id: Ifd4faaa4173c6e0543aa8471149adb9fe7fadedc
Signed-off-by: Fan Chen <fan.chen@mediatek.com>

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Migrate platform ports to the new xlat_tables library

This patch modifies the upstream platform port makefiles to use the new
xlat_tables library files. This patch also makes mmap region setup commo

Migrate platform ports to the new xlat_tables library

This patch modifies the upstream platform port makefiles to use the new
xlat_tables library files. This patch also makes mmap region setup common
between AArch64 and AArch32 for FVP platform port. The file `fvp_common.c`
is moved from the `plat/arm/board/fvp/aarch64` folder to the parent folder
as it is not specific to AArch64.

Change-Id: Id2e9aac45e46227b6f83cccfd1e915404018ea0b

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Fix build error in Rockchip platform

This patch fixes the compilation error in Rockchip rk3368 platform port when
it is built in release mode.

Fixes ARM-software/tf-issues#389

Change-Id: I1a3508ac

Fix build error in Rockchip platform

This patch fixes the compilation error in Rockchip rk3368 platform port when
it is built in release mode.

Fixes ARM-software/tf-issues#389

Change-Id: I1a3508ac3a620289cf700e79db8f08569331ac53

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Merge pull request #569 from Xilinx/zynqmp-v1

Support for Xilinx Zynq UltraScale+ MPSoC

Merge pull request #587 from antonio-nino-diaz-arm/an/rename-bl33-base

Rename BL33_BASE and make it work with RESET_TO_BL31

Merge pull request #586 from antonio-nino-diaz-arm/an/spd-bl32

Remove BL32_BASE when building without SPD for FVP

Rename BL33_BASE option to PRELOADED_BL33_BASE

To avoid confusion the build option BL33_BASE has been renamed to
PRELOADED_BL33_BASE, which is more descriptive of what it does and
doesn't get mistak

Rename BL33_BASE option to PRELOADED_BL33_BASE

To avoid confusion the build option BL33_BASE has been renamed to
PRELOADED_BL33_BASE, which is more descriptive of what it does and
doesn't get mistaken by similar names like BL32_BASE that work in a
completely different way.

NOTE: PLATFORMS USING BUILD OPTION `BL33_BASE` MUST CHANGE TO THE NEW
BUILD OPTION `PRELOADED_BL33_BASE`.

Change-Id: I658925ebe95406edf0325f15aa1752e1782aa45b

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Fix BL33_BASE option to work with RESET_TO_BL31

The BL33 address is now set in arm_bl31_early_platform_setup() so
that the preloaded BL33 boot option is available when RESET_TO_BL31
is also used.

C

Fix BL33_BASE option to work with RESET_TO_BL31

The BL33 address is now set in arm_bl31_early_platform_setup() so
that the preloaded BL33 boot option is available when RESET_TO_BL31
is also used.

Change-Id: Iab93e3916f9199c3387886b055c7cd2315efed29

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Remove BL32_BASE when building without SPD for FVP

Previously, when building TF without SPD support, BL2 tried to load a
BL32 image from the FIP and fails to find one, which resulted on
warning mess

Remove BL32_BASE when building without SPD for FVP

Previously, when building TF without SPD support, BL2 tried to load a
BL32 image from the FIP and fails to find one, which resulted on
warning messages on the console. Even if there is a BL32 image in the
FIP it shouldn't be loaded because there is no way to transfer
control to the Secure Payload without SPD support.

The Makefile has been modified to pass a define of the form
SPD_${SPD} to the source code the same way it's done for PLAT. The
define SPD_none is then used to undefine BL32_BASE when BL32 is not
used to prevent BL2 from trying to load a BL32 image and failing,
thus removing the warning messages mentioned above.

Fixes ARM-software/tf-issues#287

Change-Id: Ifeb6f1c26935efb76afd353fea88e87ba09e9658

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